#include <linux/module.h>
#include <linux/delay.h>
+#include <linux/of.h>
#include <linux/phy.h>
#include <linux/netdevice.h>
#include <linux/firmware.h>
#include <linux/crc32.h>
+#include <linux/sfp.h>
#include <asm/mach-rtl838x/mach-rtl83xx.h>
#include "rtl83xx-phy.h"
#define PHY_PAGE_2 2
#define PHY_PAGE_4 4
-#define PARK_PAGE 0x1f
+
+/* all Clause-22 RealTek MDIO PHYs use register 0x1f for page select */
+#define RTL8XXX_PAGE_SELECT 0x1f
+
+#define RTL8XXX_PAGE_MAIN 0x0000
+#define RTL821X_PAGE_PORT 0x0266
+#define RTL821X_PAGE_POWER 0x0a40
+#define RTL821X_PAGE_GPHY 0x0a42
+#define RTL821X_PAGE_MAC 0x0a43
+#define RTL821X_PAGE_STATE 0x0b80
+#define RTL821X_PAGE_PATCH 0x0b82
+
+/*
+ * Using the special page 0xfff with the MDIO controller found in
+ * RealTek SoCs allows to access the PHY in RAW mode, ie. bypassing
+ * the cache and paging engine of the MDIO controller.
+ */
+#define RTL83XX_PAGE_RAW 0x0fff
+
+/* internal RTL821X PHY uses register 0x1d to select media page */
+#define RTL821XINT_MEDIA_PAGE_SELECT 0x1d
+/* external RTL821X PHY uses register 0x1e to select media page */
+#define RTL821XEXT_MEDIA_PAGE_SELECT 0x1e
+
+#define RTL821X_MEDIA_PAGE_AUTO 0
+#define RTL821X_MEDIA_PAGE_COPPER 1
+#define RTL821X_MEDIA_PAGE_FIBRE 3
+#define RTL821X_MEDIA_PAGE_INTERNAL 8
#define RTL9300_PHY_ID_MASK 0xf0ffffff
static const struct firmware rtl838x_8214fc_fw;
static const struct firmware rtl838x_8218b_fw;
-int rtl838x_read_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 *val);
-int rtl838x_write_mmd_phy(u32 port, u32 devnum, u32 reg, u32 val);
-int rtl839x_read_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 *val);
-int rtl839x_write_mmd_phy(u32 port, u32 devnum, u32 reg, u32 val);
-int rtl930x_read_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 *val);
-int rtl930x_write_mmd_phy(u32 port, u32 devnum, u32 reg, u32 val);
-int rtl931x_read_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 *val);
-int rtl931x_write_mmd_phy(u32 port, u32 devnum, u32 reg, u32 val);
-
-static int read_phy(u32 port, u32 page, u32 reg, u32 *val)
-{ switch (soc_info.family) {
- case RTL8380_FAMILY_ID:
- return rtl838x_read_phy(port, page, reg, val);
- case RTL8390_FAMILY_ID:
- return rtl839x_read_phy(port, page, reg, val);
- case RTL9300_FAMILY_ID:
- return rtl930x_read_phy(port, page, reg, val);
- case RTL9310_FAMILY_ID:
- return rtl931x_read_phy(port, page, reg, val);
- }
- return -1;
-}
-
-static int write_phy(u32 port, u32 page, u32 reg, u32 val)
-{
- switch (soc_info.family) {
- case RTL8380_FAMILY_ID:
- return rtl838x_write_phy(port, page, reg, val);
- case RTL8390_FAMILY_ID:
- return rtl839x_write_phy(port, page, reg, val);
- case RTL9300_FAMILY_ID:
- return rtl930x_write_phy(port, page, reg, val);
- case RTL9310_FAMILY_ID:
- return rtl931x_write_phy(port, page, reg, val);
- }
- return -1;
-}
-
-static int read_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 *val)
-{
- switch (soc_info.family) {
- case RTL8380_FAMILY_ID:
- return rtl838x_read_mmd_phy(port, devnum, regnum, val);
- case RTL8390_FAMILY_ID:
- return rtl839x_read_mmd_phy(port, devnum, regnum, val);
- case RTL9300_FAMILY_ID:
- return rtl930x_read_mmd_phy(port, devnum, regnum, val);
- case RTL9310_FAMILY_ID:
- return rtl931x_read_mmd_phy(port, devnum, regnum, val);
- }
- return -1;
-}
-
-int write_mmd_phy(u32 port, u32 devnum, u32 reg, u32 val)
-{
- switch (soc_info.family) {
- case RTL8380_FAMILY_ID:
- return rtl838x_write_mmd_phy(port, devnum, reg, val);
- case RTL8390_FAMILY_ID:
- return rtl839x_write_mmd_phy(port, devnum, reg, val);
- case RTL9300_FAMILY_ID:
- return rtl930x_write_mmd_phy(port, devnum, reg, val);
- case RTL9310_FAMILY_ID:
- return rtl931x_write_mmd_phy(port, devnum, reg, val);
- }
- return -1;
-}
-
static u64 disable_polling(int port)
{
u64 saved_state;
return 0;
}
-static void rtl8380_int_phy_on_off(int mac, bool on)
+static void rtl8380_int_phy_on_off(struct phy_device *phydev, bool on)
{
- u32 val;
-
- read_phy(mac, 0, 0, &val);
- if (on)
- write_phy(mac, 0, 0, val & ~BIT(11));
- else
- write_phy(mac, 0, 0, val | BIT(11));
+ phy_modify(phydev, 0, BIT(11), on?0:BIT(11));
}
-static void rtl8380_rtl8214fc_on_off(int mac, bool on)
+static void rtl8380_rtl8214fc_on_off(struct phy_device *phydev, bool on)
{
- u32 val;
-
/* fiber ports */
- write_phy(mac, 4095, 30, 3);
- read_phy(mac, 0, 16, &val);
- if (on)
- write_phy(mac, 0, 16, val & ~BIT(11));
- else
- write_phy(mac, 0, 16, val | BIT(11));
+ phy_write_paged(phydev, RTL83XX_PAGE_RAW, RTL821XEXT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_FIBRE);
+ phy_modify(phydev, 0x10, BIT(11), on?0:BIT(11));
/* copper ports */
- write_phy(mac, 4095, 30, 1);
- read_phy(mac, 0, 16, &val);
- if (on)
- write_phy(mac, 0xa40, 16, val & ~BIT(11));
- else
- write_phy(mac, 0xa40, 16, val | BIT(11));
+ phy_write_paged(phydev, RTL83XX_PAGE_RAW, RTL821XEXT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_COPPER);
+ phy_modify_paged(phydev, RTL821X_PAGE_POWER, 0x10, BIT(11), on?0:BIT(11));
}
-static void rtl8380_phy_reset(int mac)
+static void rtl8380_phy_reset(struct phy_device *phydev)
{
- u32 val;
-
- read_phy(mac, 0, 0, &val);
- write_phy(mac, 0, 0, val | BIT(15));
+ phy_modify(phydev, 0, BIT(15), BIT(15));
}
// The access registers for SDS_MODE_SEL and the LSB for each SDS within
static int rtl8226_read_page(struct phy_device *phydev)
{
- return __phy_read(phydev, 0x1f);
+ return __phy_read(phydev, RTL8XXX_PAGE_SELECT);
}
static int rtl8226_write_page(struct phy_device *phydev, int page)
{
- return __phy_write(phydev, 0x1f, page);
+ return __phy_write(phydev, RTL8XXX_PAGE_SELECT, page);
}
static int rtl8226_read_status(struct phy_device *phydev)
{
int ret = 0, i;
u32 val;
- int port = phydev->mdio.addr;
// TODO: ret = genphy_read_status(phydev);
// if (ret < 0) {
// Link status must be read twice
for (i = 0; i < 2; i++) {
- read_mmd_phy(port, MMD_VEND2, 0xA402, &val);
+ val = phy_read_mmd(phydev, MMD_VEND2, 0xA402);
}
phydev->link = val & BIT(2) ? 1 : 0;
if (!phydev->link)
goto out;
// Read duplex status
- ret = read_mmd_phy(port, MMD_VEND2, 0xA434, &val);
- if (ret)
+ val = phy_read_mmd(phydev, MMD_VEND2, 0xA434);
+ if (val < 0)
goto out;
phydev->duplex = !!(val & BIT(3));
// Read speed
- ret = read_mmd_phy(port, MMD_VEND2, 0xA434, &val);
+ val = phy_read_mmd(phydev, MMD_VEND2, 0xA434);
switch (val & 0x0630) {
case 0x0000:
phydev->speed = SPEED_10;
{
int ret = 0;
u32 v;
- int port = phydev->mdio.addr;
pr_info("In %s\n", __func__);
- ret = read_mmd_phy(port, MMD_AN, 16, &v);
- if (ret)
+ v = phy_read_mmd(phydev, MMD_AN, 16);
+ if (v < 0)
goto out;
v |= BIT(5); // HD 10M
v |= BIT(7); // HD 100M
v |= BIT(8); // FD 100M
- ret = write_mmd_phy(port, MMD_AN, 16, v);
+ ret = phy_write_mmd(phydev, MMD_AN, 16, v);
// Allow 1GBit
- ret = read_mmd_phy(port, MMD_VEND2, 0xA412, &v);
- if (ret)
+ v = phy_read_mmd(phydev, MMD_VEND2, 0xA412);
+ if (v < 0)
goto out;
v |= BIT(9); // FD 1000M
- ret = write_mmd_phy(port, MMD_VEND2, 0xA412, v);
- if (ret)
+ ret = phy_write_mmd(phydev, MMD_VEND2, 0xA412, v);
+ if (ret < 0)
goto out;
// Allow 2.5G
- ret = read_mmd_phy(port, MMD_AN, 32, &v);
- if (ret)
+ v = phy_read_mmd(phydev, MMD_AN, 32);
+ if (v < 0)
goto out;
v |= BIT(7);
- ret = write_mmd_phy(port, MMD_AN, 32, v);
+ ret = phy_write_mmd(phydev, MMD_AN, 32, v);
out:
return ret;
{
int ret = 0;
u32 v;
- int port = phydev->mdio.addr;
pr_debug("In %s\n", __func__);
if (phydev->autoneg == AUTONEG_ENABLE) {
if (ret)
goto out;
// AutoNegotiationEnable
- ret = read_mmd_phy(port, MMD_AN, 0, &v);
- if (ret)
+ v = phy_read_mmd(phydev, MMD_AN, 0);
+ if (v < 0)
goto out;
v |= BIT(12); // Enable AN
- ret = write_mmd_phy(port, MMD_AN, 0, v);
- if (ret)
+ ret = phy_write_mmd(phydev, MMD_AN, 0, v);
+ if (ret < 0)
goto out;
// RestartAutoNegotiation
- ret = read_mmd_phy(port, MMD_VEND2, 0xA400, &v);
- if (ret)
+ v = phy_read_mmd(phydev, MMD_VEND2, 0xA400);
+ if (v < 0)
goto out;
v |= BIT(9);
- ret = write_mmd_phy(port, MMD_VEND2, 0xA400, v);
+ ret = phy_write_mmd(phydev, MMD_VEND2, 0xA400, v);
}
// TODO: ret = __genphy_config_aneg(phydev, ret);
pr_debug("In %s, port %d, was enabled: %d\n", __func__, addr, e->eee_enabled);
- read_mmd_phy(addr, MMD_AN, 60, &val);
+ val = phy_read_mmd(phydev, MMD_AN, 60);
if (e->eee_enabled) {
e->eee_enabled = !!(val & BIT(1));
if (!e->eee_enabled) {
- read_mmd_phy(addr, MMD_AN, 62, &val);
+ val = phy_read_mmd(phydev, MMD_AN, 62);
e->eee_enabled = !!(val & BIT(0));
}
}
poll_state = disable_polling(port);
// Remember aneg state
- read_mmd_phy(port, MMD_AN, 0, &val);
+ val = phy_read_mmd(phydev, MMD_AN, 0);
an_enabled = !!(val & BIT(12));
// Setup 100/1000MBit
- read_mmd_phy(port, MMD_AN, 60, &val);
+ val = phy_read_mmd(phydev, MMD_AN, 60);
if (e->eee_enabled)
val |= 0x6;
else
val &= 0x6;
- write_mmd_phy(port, MMD_AN, 60, val);
+ phy_write_mmd(phydev, MMD_AN, 60, val);
// Setup 2.5GBit
- read_mmd_phy(port, MMD_AN, 62, &val);
+ val = phy_read_mmd(phydev, MMD_AN, 62);
if (e->eee_enabled)
val |= 0x1;
else
val &= 0x1;
- write_mmd_phy(port, MMD_AN, 62, val);
+ phy_write_mmd(phydev, MMD_AN, 62, val);
// RestartAutoNegotiation
- read_mmd_phy(port, MMD_VEND2, 0xA400, &val);
+ val = phy_read_mmd(phydev, MMD_VEND2, 0xA400);
val |= BIT(9);
- write_mmd_phy(port, MMD_VEND2, 0xA400, val);
+ phy_write_mmd(phydev, MMD_VEND2, 0xA400, val);
resume_polling(poll_state);
return NULL;
}
+static void rtl821x_phy_setup_package_broadcast(struct phy_device *phydev, bool enable)
+{
+ int mac = phydev->mdio.addr;
+
+ /* select main page 0 */
+ phy_write_paged(phydev, RTL83XX_PAGE_RAW, RTL8XXX_PAGE_SELECT, RTL8XXX_PAGE_MAIN);
+ /* write to 0x8 to register 0x1d on main page 0 */
+ phy_write_paged(phydev, RTL83XX_PAGE_RAW, RTL821XINT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_INTERNAL);
+ /* select page 0x266 */
+ phy_write_paged(phydev, RTL83XX_PAGE_RAW, RTL8XXX_PAGE_SELECT, RTL821X_PAGE_PORT);
+ /* set phy id and target broadcast bitmap in register 0x16 on page 0x266 */
+ phy_write_paged(phydev, RTL83XX_PAGE_RAW, 0x16, (enable?0xff00:0x00) | mac);
+ /* return to main page 0 */
+ phy_write_paged(phydev, RTL83XX_PAGE_RAW, RTL8XXX_PAGE_SELECT, RTL8XXX_PAGE_MAIN);
+ /* write to 0x0 to register 0x1d on main page 0 */
+ phy_write_paged(phydev, RTL83XX_PAGE_RAW, RTL821XINT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_AUTO);
+ mdelay(1);
+}
+
static int rtl8390_configure_generic(struct phy_device *phydev)
{
- u32 val, phy_id;
int mac = phydev->mdio.addr;
+ u32 val, phy_id;
- read_phy(mac, 0, 2, &val);
+ val = phy_read(phydev, 2);
phy_id = val << 16;
- read_phy(mac, 0, 3, &val);
+ val = phy_read(phydev, 3);
phy_id |= val;
pr_debug("Phy on MAC %d: %x\n", mac, phy_id);
/* Read internal PHY ID */
- write_phy(mac, 31, 27, 0x0002);
- read_phy(mac, 31, 28, &val);
+ phy_write_paged(phydev, 31, 27, 0x0002);
+ val = phy_read_paged(phydev, 31, 28);
/* Internal RTL8218B, version 2 */
phydev_info(phydev, "Detected unknown %x\n", val);
u32 *rtl838x_6275B_intPhy_perport;
u32 *rtl8218b_6276B_hwEsd_perport;
-
- read_phy(mac, 0, 2, &val);
+ val = phy_read(phydev, 2);
phy_id = val << 16;
- read_phy(mac, 0, 3, &val);
+ val = phy_read(phydev, 3);
phy_id |= val;
pr_debug("Phy on MAC %d: %x\n", mac, phy_id);
/* Read internal PHY ID */
- write_phy(mac, 31, 27, 0x0002);
- read_phy(mac, 31, 28, &val);
+ phy_write_paged(phydev, 31, 27, 0x0002);
+ val = phy_read_paged(phydev, 31, 28);
if (val != 0x6275) {
phydev_err(phydev, "Expected internal RTL8218B, found PHY-ID %x\n", val);
return -1;
if (sw_r32(RTL838X_DMY_REG31) == 0x1)
ipd_flag = 1;
- read_phy(mac, 0, 0, &val);
- if (val & (1 << 11))
- rtl8380_int_phy_on_off(mac, true);
+ val = phy_read(phydev, 0);
+ if (val & BIT(11))
+ rtl8380_int_phy_on_off(phydev, true);
else
- rtl8380_phy_reset(mac);
+ rtl8380_phy_reset(phydev);
msleep(100);
/* Ready PHY for patch */
for (p = 0; p < 8; p++) {
- write_phy(mac + p, 0xfff, 0x1f, 0x0b82);
- write_phy(mac + p, 0xfff, 0x10, 0x0010);
+ phy_package_port_write_paged(phydev, p, RTL83XX_PAGE_RAW, RTL8XXX_PAGE_SELECT, RTL821X_PAGE_PATCH);
+ phy_package_port_write_paged(phydev, p, RTL83XX_PAGE_RAW, 0x10, 0x0010);
}
msleep(500);
for (p = 0; p < 8; p++) {
for (i = 0; i < 100 ; i++) {
- read_phy(mac + p, 0x0b80, 0x10, &val);
+ val = phy_package_port_read_paged(phydev, p, RTL821X_PAGE_STATE, 0x10);
if (val & 0x40)
break;
}
for (p = 0; p < 8; p++) {
i = 0;
while (rtl838x_6275B_intPhy_perport[i * 2]) {
- write_phy(mac + p, 0xfff,
+ phy_package_port_write_paged(phydev, p, RTL83XX_PAGE_RAW,
rtl838x_6275B_intPhy_perport[i * 2],
rtl838x_6275B_intPhy_perport[i * 2 + 1]);
i++;
}
i = 0;
while (rtl8218b_6276B_hwEsd_perport[i * 2]) {
- write_phy(mac + p, 0xfff,
+ phy_package_port_write_paged(phydev, p, RTL83XX_PAGE_RAW,
rtl8218b_6276B_hwEsd_perport[i * 2],
rtl8218b_6276B_hwEsd_perport[i * 2 + 1]);
i++;
phydev_err(phydev, "External RTL8218B must have PHY-IDs 0 or 16!\n");
return -1;
}
- read_phy(mac, 0, 2, &val);
+ val = phy_read(phydev, 2);
phy_id = val << 16;
- read_phy(mac, 0, 3, &val);
+ val = phy_read(phydev, 3);
phy_id |= val;
pr_info("Phy on MAC %d: %x\n", mac, phy_id);
/* Read internal PHY ID */
- write_phy(mac, 31, 27, 0x0002);
- read_phy(mac, 31, 28, &val);
+ phy_write_paged(phydev, 31, 27, 0x0002);
+ val = phy_read_paged(phydev, 31, 28);
if (val != 0x6276) {
phydev_err(phydev, "Expected external RTL8218B, found PHY-ID %x\n", val);
return -1;
rtl8380_rtl8218b_perport = (void *)h + sizeof(struct fw_header)
+ h->parts[2].start;
- read_phy(mac, 0, 0, &val);
+ val = phy_read(phydev, 0);
if (val & (1 << 11))
- rtl8380_int_phy_on_off(mac, true);
+ rtl8380_int_phy_on_off(phydev, true);
else
- rtl8380_phy_reset(mac);
+ rtl8380_phy_reset(phydev);
+
msleep(100);
/* Get Chip revision */
- write_phy(mac, 0xfff, 0x1f, 0x0);
- write_phy(mac, 0xfff, 0x1b, 0x4);
- read_phy(mac, 0xfff, 0x1c, &val);
+ phy_write_paged(phydev, RTL83XX_PAGE_RAW, RTL8XXX_PAGE_SELECT, RTL8XXX_PAGE_MAIN);
+ phy_write_paged(phydev, RTL83XX_PAGE_RAW, 0x1b, 0x4);
+ val = phy_read_paged(phydev, RTL83XX_PAGE_RAW, 0x1c);
+
+ phydev_info(phydev, "Detected chip revision %04x\n", val);
i = 0;
while (rtl8380_rtl8218b_perchip[i * 3]
&& rtl8380_rtl8218b_perchip[i * 3 + 1]) {
- write_phy(mac + rtl8380_rtl8218b_perchip[i * 3],
- 0xfff, rtl8380_rtl8218b_perchip[i * 3 + 1],
+ phy_package_port_write_paged(phydev, rtl8380_rtl8218b_perchip[i * 3],
+ RTL83XX_PAGE_RAW, rtl8380_rtl8218b_perchip[i * 3 + 1],
rtl8380_rtl8218b_perchip[i * 3 + 2]);
i++;
}
/* Enable PHY */
for (i = 0; i < 8; i++) {
- write_phy(mac + i, 0xfff, 0x1f, 0x0000);
- write_phy(mac + i, 0xfff, 0x00, 0x1140);
+ phy_package_port_write_paged(phydev, i, RTL83XX_PAGE_RAW, RTL8XXX_PAGE_SELECT, RTL8XXX_PAGE_MAIN);
+ phy_package_port_write_paged(phydev, i, RTL83XX_PAGE_RAW, 0x00, 0x1140);
}
mdelay(100);
/* Request patch */
for (i = 0; i < 8; i++) {
- write_phy(mac + i, 0xfff, 0x1f, 0x0b82);
- write_phy(mac + i, 0xfff, 0x10, 0x0010);
+ phy_package_port_write_paged(phydev, i, RTL83XX_PAGE_RAW, RTL8XXX_PAGE_SELECT, RTL821X_PAGE_PATCH);
+ phy_package_port_write_paged(phydev, i, RTL83XX_PAGE_RAW, 0x10, 0x0010);
}
+
mdelay(300);
/* Verify patch readiness */
for (i = 0; i < 8; i++) {
for (l = 0; l < 100; l++) {
- read_phy(mac + i, 0xb80, 0x10, &val);
+ val = phy_package_port_read_paged(phydev, i, RTL821X_PAGE_STATE, 0x10);
if (val & 0x40)
break;
}
}
/* Use Broadcast ID method for patching */
- write_phy(mac, 0xfff, 0x1f, 0x0000);
- write_phy(mac, 0xfff, 0x1d, 0x0008);
- write_phy(mac, 0xfff, 0x1f, 0x0266);
- write_phy(mac, 0xfff, 0x16, 0xff00 + mac);
- write_phy(mac, 0xfff, 0x1f, 0x0000);
- write_phy(mac, 0xfff, 0x1d, 0x0000);
- mdelay(1);
+ rtl821x_phy_setup_package_broadcast(phydev, true);
- write_phy(mac, 0xfff, 30, 8);
- write_phy(mac, 0x26e, 17, 0xb);
- write_phy(mac, 0x26e, 16, 0x2);
+ phy_write_paged(phydev, RTL83XX_PAGE_RAW, 30, 8);
+ phy_write_paged(phydev, 0x26e, 17, 0xb);
+ phy_write_paged(phydev, 0x26e, 16, 0x2);
mdelay(1);
- read_phy(mac, 0x26e, 19, &ipd);
- write_phy(mac, 0, 30, 0);
- ipd = (ipd >> 4) & 0xf;
+ ipd = phy_read_paged(phydev, 0x26e, 19);
+ phy_write_paged(phydev, 0, 30, 0);
+ ipd = (ipd >> 4) & 0xf; /* unused ? */
i = 0;
while (rtl8218B_6276B_rtl8380_perport[i * 2]) {
- write_phy(mac, 0xfff, rtl8218B_6276B_rtl8380_perport[i * 2],
+ phy_write_paged(phydev, RTL83XX_PAGE_RAW, rtl8218B_6276B_rtl8380_perport[i * 2],
rtl8218B_6276B_rtl8380_perport[i * 2 + 1]);
i++;
}
/*Disable broadcast ID*/
- write_phy(mac, 0xfff, 0x1f, 0x0000);
- write_phy(mac, 0xfff, 0x1d, 0x0008);
- write_phy(mac, 0xfff, 0x1f, 0x0266);
- write_phy(mac, 0xfff, 0x16, 0x00 + mac);
- write_phy(mac, 0xfff, 0x1f, 0x0000);
- write_phy(mac, 0xfff, 0x1d, 0x0000);
- mdelay(1);
+ rtl821x_phy_setup_package_broadcast(phydev, false);
return 0;
}
return phydev->phy_id == PHY_ID_RTL8218B_E;
}
-static int rtl8218b_read_mmd(struct phy_device *phydev,
- int devnum, u16 regnum)
+static bool rtl8214fc_media_is_fibre(struct phy_device *phydev)
{
- int ret;
+ int mac = phydev->mdio.addr;
+
+ static int reg[] = {16, 19, 20, 21};
u32 val;
- int addr = phydev->mdio.addr;
- ret = read_mmd_phy(addr, devnum, regnum, &val);
- if (ret)
- return ret;
- return val;
+ phy_package_write_paged(phydev, RTL83XX_PAGE_RAW, RTL821XINT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_INTERNAL);
+ val = phy_package_read_paged(phydev, RTL821X_PAGE_PORT, reg[mac % 4]);
+ phy_package_write_paged(phydev, RTL83XX_PAGE_RAW, RTL821XINT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_AUTO);
+
+ if (val & BIT(11))
+ return false;
+
+ return true;
}
-static int rtl8218b_write_mmd(struct phy_device *phydev,
- int devnum, u16 regnum, u16 val)
+static void rtl8214fc_power_set(struct phy_device *phydev, int port, bool on)
{
- int addr = phydev->mdio.addr;
+ char *state = on ? "on" : "off";
+
+ if (port == PORT_FIBRE) {
+ pr_info("%s: Powering %s FIBRE (port %d)\n", __func__, state, phydev->mdio.addr);
+ phy_write_paged(phydev, RTL83XX_PAGE_RAW, RTL821XINT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_FIBRE);
+ } else {
+ pr_info("%s: Powering %s COPPER (port %d)\n", __func__, state, phydev->mdio.addr);
+ phy_write_paged(phydev, RTL83XX_PAGE_RAW, RTL821XINT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_COPPER);
+ }
- return rtl838x_write_mmd_phy(addr, devnum, regnum, val);
+ if (on) {
+ phy_modify_paged(phydev, RTL821X_PAGE_POWER, 0x10, BIT(11), 0);
+ } else {
+ phy_modify_paged(phydev, RTL821X_PAGE_POWER, 0x10, 0, BIT(11));
+ }
+
+ phy_write_paged(phydev, RTL83XX_PAGE_RAW, RTL821XINT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_AUTO);
}
-static int rtl8226_read_mmd(struct phy_device *phydev, int devnum, u16 regnum)
+static int rtl8214fc_suspend(struct phy_device *phydev)
{
- int port = phydev->mdio.addr; // the SoC translates port addresses to PHY addr
- int err;
- u32 val;
+ rtl8214fc_power_set(phydev, PORT_MII, false);
+ rtl8214fc_power_set(phydev, PORT_FIBRE, false);
- err = read_mmd_phy(port, devnum, regnum, &val);
- if (err)
- return err;
- return val;
+ return 0;
}
-static int rtl8226_write_mmd(struct phy_device *phydev, int devnum, u16 regnum, u16 val)
+static int rtl8214fc_resume(struct phy_device *phydev)
{
- int port = phydev->mdio.addr; // the SoC translates port addresses to PHY addr
+ if (rtl8214fc_media_is_fibre(phydev)) {
+ rtl8214fc_power_set(phydev, PORT_MII, false);
+ rtl8214fc_power_set(phydev, PORT_FIBRE, true);
+ } else {
+ rtl8214fc_power_set(phydev, PORT_FIBRE, false);
+ rtl8214fc_power_set(phydev, PORT_MII, true);
+ }
- return write_mmd_phy(port, devnum, regnum, val);
+ return 0;
}
-static void rtl8380_rtl8214fc_media_set(int mac, bool set_fibre)
+static void rtl8214fc_media_set(struct phy_device *phydev, bool set_fibre)
{
- int base = mac - (mac % 4);
+ int mac = phydev->mdio.addr;
+
static int reg[] = {16, 19, 20, 21};
- int val, media, power;
+ int val;
pr_info("%s: port %d, set_fibre: %d\n", __func__, mac, set_fibre);
- write_phy(base, 0xfff, 29, 8);
- read_phy(base, 0x266, reg[mac % 4], &val);
-
- media = (val >> 10) & 0x3;
- pr_info("Current media %x\n", media);
- if (media & 0x2) {
- pr_info("Powering off COPPER\n");
- write_phy(base, 0xfff, 29, 1);
- /* Ensure power is off */
- read_phy(base, 0xa40, 16, &power);
- if (!(power & (1 << 11)))
- write_phy(base, 0xa40, 16, power | (1 << 11));
- } else {
- pr_info("Powering off FIBRE");
- write_phy(base, 0xfff, 29, 3);
- /* Ensure power is off */
- read_phy(base, 0xa40, 16, &power);
- if (!(power & (1 << 11)))
- write_phy(base, 0xa40, 16, power | (1 << 11));
- }
+ phy_package_write_paged(phydev, RTL83XX_PAGE_RAW, RTL821XINT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_INTERNAL);
+ val = phy_package_read_paged(phydev, RTL821X_PAGE_PORT, reg[mac % 4]);
+ val |= BIT(10);
if (set_fibre) {
- val |= 1 << 10;
- val &= ~(1 << 11);
+ val &= ~BIT(11);
} else {
- val |= 1 << 10;
- val |= 1 << 11;
+ val |= BIT(11);
}
- write_phy(base, 0xfff, 29, 8);
- write_phy(base, 0x266, reg[mac % 4], val);
- write_phy(base, 0xfff, 29, 0);
- if (set_fibre) {
- pr_info("Powering on FIBRE");
- write_phy(base, 0xfff, 29, 3);
- /* Ensure power is off */
- read_phy(base, 0xa40, 16, &power);
- if (power & (1 << 11))
- write_phy(base, 0xa40, 16, power & ~(1 << 11));
- } else {
- pr_info("Powering on COPPER\n");
- write_phy(base, 0xfff, 29, 1);
- /* Ensure power is off */
- read_phy(base, 0xa40, 16, &power);
- if (power & (1 << 11))
- write_phy(base, 0xa40, 16, power & ~(1 << 11));
- }
+ phy_package_write_paged(phydev, RTL83XX_PAGE_RAW, RTL821XINT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_INTERNAL);
+ phy_package_write_paged(phydev, RTL821X_PAGE_PORT, reg[mac % 4], val);
+ phy_package_write_paged(phydev, RTL83XX_PAGE_RAW, RTL821XINT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_AUTO);
- write_phy(base, 0xfff, 29, 0);
-}
-
-static bool rtl8380_rtl8214fc_media_is_fibre(int mac)
-{
- int base = mac - (mac % 4);
- static int reg[] = {16, 19, 20, 21};
- u32 val;
-
- write_phy(base, 0xfff, 29, 8);
- read_phy(base, 0x266, reg[mac % 4], &val);
- write_phy(base, 0xfff, 29, 0);
- if (val & (1 << 11))
- return false;
- return true;
+ if (!phydev->suspended) {
+ if (set_fibre) {
+ rtl8214fc_power_set(phydev, PORT_MII, false);
+ rtl8214fc_power_set(phydev, PORT_FIBRE, true);
+ } else {
+ rtl8214fc_power_set(phydev, PORT_FIBRE, false);
+ rtl8214fc_power_set(phydev, PORT_MII, true);
+ }
+ }
}
static int rtl8214fc_set_port(struct phy_device *phydev, int port)
pr_debug("%s port %d to %d\n", __func__, addr, port);
- rtl8380_rtl8214fc_media_set(addr, is_fibre);
+ rtl8214fc_media_set(phydev, is_fibre);
return 0;
}
int addr = phydev->mdio.addr;
pr_debug("%s: port %d\n", __func__, addr);
- if (rtl8380_rtl8214fc_media_is_fibre(addr))
+ if (rtl8214fc_media_is_fibre(phydev))
return PORT_FIBRE;
return PORT_MII;
}
* but the only way that works since the kernel first enables EEE in the MAC
* and then sets up the PHY. The MAC-based approach would require the oppsite.
*/
-void rtl8218d_eee_set(int port, bool enable)
+void rtl8218d_eee_set(struct phy_device *phydev, bool enable)
{
u32 val;
bool an_enabled;
- pr_debug("In %s %d, enable %d\n", __func__, port, enable);
+ pr_debug("In %s %d, enable %d\n", __func__, phydev->mdio.addr, enable);
/* Set GPHY page to copper */
- write_phy(port, 0xa42, 30, 0x0001);
+ phy_write_paged(phydev, RTL821X_PAGE_GPHY, RTL821XEXT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_COPPER);
- read_phy(port, 0, 0, &val);
+ val = phy_read(phydev, 0);
an_enabled = val & BIT(12);
/* Enable 100M (bit 1) / 1000M (bit 2) EEE */
- read_mmd_phy(port, 7, 60, &val);
+ val = phy_read_mmd(phydev, 7, 60);
val |= BIT(2) | BIT(1);
- write_mmd_phy(port, 7, 60, enable ? 0x6 : 0);
+ phy_write_mmd(phydev, 7, 60, enable ? 0x6 : 0);
/* 500M EEE ability */
- read_phy(port, 0xa42, 20, &val);
+ val = phy_read_paged(phydev, RTL821X_PAGE_GPHY, 20);
if (enable)
val |= BIT(7);
else
val &= ~BIT(7);
- write_phy(port, 0xa42, 20, val);
+ phy_write_paged(phydev, RTL821X_PAGE_GPHY, 20, val);
/* Restart AN if enabled */
if (an_enabled) {
- read_phy(port, 0, 0, &val);
+ val = phy_read(phydev, 0);
val |= BIT(9);
- write_phy(port, 0, 0, val);
+ phy_write(phydev, 0, val);
}
/* GPHY page back to auto*/
- write_phy(port, 0xa42, 30, 0);
+ phy_write_paged(phydev, RTL821X_PAGE_GPHY, RTL821XEXT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_AUTO);
}
static int rtl8218b_get_eee(struct phy_device *phydev,
pr_debug("In %s, port %d, was enabled: %d\n", __func__, addr, e->eee_enabled);
/* Set GPHY page to copper */
- write_phy(addr, 0xa42, 29, 0x0001);
+ phy_write_paged(phydev, RTL821X_PAGE_GPHY, RTL821XINT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_COPPER);
- read_phy(addr, 7, 60, &val);
+ val = phy_read_paged(phydev, 7, 60);
if (e->eee_enabled) {
// Verify vs MAC-based EEE
e->eee_enabled = !!(val & BIT(7));
if (!e->eee_enabled) {
- read_phy(addr, 0x0A43, 25, &val);
+ val = phy_read_paged(phydev, RTL821X_PAGE_MAC, 25);
e->eee_enabled = !!(val & BIT(4));
}
}
pr_debug("%s: enabled: %d\n", __func__, e->eee_enabled);
/* GPHY page to auto */
- write_phy(addr, 0xa42, 29, 0x0000);
+ phy_write_paged(phydev, RTL821X_PAGE_GPHY, RTL821XINT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_AUTO);
return 0;
}
pr_debug("In %s, port %d, was enabled: %d\n", __func__, addr, e->eee_enabled);
/* Set GPHY page to copper */
- write_phy(addr, 0xa42, 30, 0x0001);
+ phy_write_paged(phydev, RTL821X_PAGE_GPHY, RTL821XEXT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_COPPER);
- read_phy(addr, 7, 60, &val);
+ val = phy_read_paged(phydev, 7, 60);
if (e->eee_enabled)
e->eee_enabled = !!(val & BIT(7));
pr_debug("%s: enabled: %d\n", __func__, e->eee_enabled);
/* GPHY page to auto */
- write_phy(addr, 0xa42, 30, 0x0000);
+ phy_write_paged(phydev, RTL821X_PAGE_GPHY, RTL821XEXT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_AUTO);
return 0;
}
pr_debug("In %s port %d, enabled %d\n", __func__, port, e->eee_enabled);
- if (rtl8380_rtl8214fc_media_is_fibre(port)) {
+ if (rtl8214fc_media_is_fibre(phydev)) {
netdev_err(phydev->attached_dev, "Port %d configured for FIBRE", port);
return -ENOTSUPP;
}
poll_state = disable_polling(port);
/* Set GPHY page to copper */
- write_phy(port, 0xa42, 29, 0x0001);
+ phy_write_paged(phydev, RTL821X_PAGE_GPHY, RTL821XINT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_COPPER);
// Get auto-negotiation status
- read_phy(port, 0, 0, &val);
+ val = phy_read(phydev, 0);
an_enabled = val & BIT(12);
pr_info("%s: aneg: %d\n", __func__, an_enabled);
- read_phy(port, 0x0A43, 25, &val);
+ val = phy_read_paged(phydev, RTL821X_PAGE_MAC, 25);
val &= ~BIT(5); // Use MAC-based EEE
- write_phy(port, 0x0A43, 25, val);
+ phy_write_paged(phydev, RTL821X_PAGE_MAC, 25, val);
/* Enable 100M (bit 1) / 1000M (bit 2) EEE */
- write_phy(port, 7, 60, e->eee_enabled ? 0x6 : 0);
+ phy_write_paged(phydev, 7, 60, e->eee_enabled ? 0x6 : 0);
/* 500M EEE ability */
- read_phy(port, 0xa42, 20, &val);
+ val = phy_read_paged(phydev, RTL821X_PAGE_GPHY, 20);
if (e->eee_enabled)
val |= BIT(7);
else
val &= ~BIT(7);
- write_phy(port, 0xa42, 20, val);
+
+ phy_write_paged(phydev, RTL821X_PAGE_GPHY, 20, val);
/* Restart AN if enabled */
if (an_enabled) {
pr_info("%s: doing aneg\n", __func__);
- read_phy(port, 0, 0, &val);
+ val = phy_read(phydev, 0);
val |= BIT(9);
- write_phy(port, 0, 0, val);
+ phy_write(phydev, 0, val);
}
/* GPHY page back to auto*/
- write_phy(port, 0xa42, 29, 0);
+ phy_write_paged(phydev, RTL821X_PAGE_GPHY, RTL821XINT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_AUTO);
resume_polling(poll_state);
int addr = phydev->mdio.addr;
pr_debug("In %s port %d, enabled %d\n", __func__, addr, e->eee_enabled);
- if (rtl8380_rtl8214fc_media_is_fibre(addr)) {
+ if (rtl8214fc_media_is_fibre(phydev)) {
netdev_err(phydev->attached_dev, "Port %d configured for FIBRE", addr);
return -ENOTSUPP;
}
poll_state = disable_polling(port);
/* Set GPHY page to copper */
- write_phy(port, 0, 30, 0x0001);
- read_phy(port, 0, 0, &val);
+ phy_write(phydev, RTL821XEXT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_COPPER);
+ val = phy_read(phydev, 0);
an_enabled = val & BIT(12);
if (e->eee_enabled) {
/* 100/1000M EEE Capability */
- write_phy(port, 0, 13, 0x0007);
- write_phy(port, 0, 14, 0x003C);
- write_phy(port, 0, 13, 0x4007);
- write_phy(port, 0, 14, 0x0006);
+ phy_write(phydev, 13, 0x0007);
+ phy_write(phydev, 14, 0x003C);
+ phy_write(phydev, 13, 0x4007);
+ phy_write(phydev, 14, 0x0006);
- read_phy(port, 0x0A43, 25, &val);
+ val = phy_read_paged(phydev, RTL821X_PAGE_MAC, 25);
val |= BIT(4);
- write_phy(port, 0x0A43, 25, val);
+ phy_write_paged(phydev, RTL821X_PAGE_MAC, 25, val);
} else {
/* 100/1000M EEE Capability */
- write_phy(port, 0, 13, 0x0007);
- write_phy(port, 0, 14, 0x003C);
- write_phy(port, 0, 13, 0x0007);
- write_phy(port, 0, 14, 0x0000);
+ phy_write(phydev, 13, 0x0007);
+ phy_write(phydev, 14, 0x003C);
+ phy_write(phydev, 13, 0x0007);
+ phy_write(phydev, 14, 0x0000);
- read_phy(port, 0x0A43, 25, &val);
+ val = phy_read_paged(phydev, RTL821X_PAGE_MAC, 25);
val &= ~BIT(4);
- write_phy(port, 0x0A43, 25, val);
+ phy_write_paged(phydev, RTL821X_PAGE_MAC, 25, val);
}
/* Restart AN if enabled */
if (an_enabled) {
- read_phy(port, 0, 0, &val);
+ val = phy_read(phydev, 0);
val |= BIT(9);
- write_phy(port, 0, 0, val);
+ phy_write(phydev, 0, val);
}
/* GPHY page back to auto*/
- write_phy(port, 0xa42, 30, 0);
+ phy_write_paged(phydev, RTL821X_PAGE_GPHY, RTL821XEXT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_AUTO);
pr_info("%s done\n", __func__);
resume_polling(poll_state);
poll_state = disable_polling(addr);
- rtl8218d_eee_set(addr, (bool) e->eee_enabled);
+ rtl8218d_eee_set(phydev, (bool) e->eee_enabled);
resume_polling(poll_state);
u32 phy_id, val;
int mac = phydev->mdio.addr;
- read_phy(mac, 0, 2, &val);
+ val = phy_read(phydev, 2);
phy_id = val << 16;
- read_phy(mac, 0, 3, &val);
+ val = phy_read(phydev, 3);
phy_id |= val;
pr_debug("Phy on MAC %d: %x\n", mac, phy_id);
phydev_info(phydev, "Detected external RTL8214C\n");
/* GPHY auto conf */
- write_phy(mac, 0xa42, 29, 0);
+ phy_write_paged(phydev, RTL821X_PAGE_GPHY, RTL821XINT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_AUTO);
return 0;
}
u32 *rtl8380_rtl8214fc_perchip;
u32 *rtl8380_rtl8214fc_perport;
- read_phy(mac, 0, 2, &val);
+ val = phy_read(phydev, 2);
phy_id = val << 16;
- read_phy(mac, 0, 3, &val);
+ val = phy_read(phydev, 3);
phy_id |= val;
pr_debug("Phy on MAC %d: %x\n", mac, phy_id);
/* Read internal PHY id */
- write_phy(mac, 0, 30, 0x0001);
- write_phy(mac, 0, 31, 0x0a42);
- write_phy(mac, 31, 27, 0x0002);
- read_phy(mac, 31, 28, &val);
+ phy_write_paged(phydev, 0, RTL821XEXT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_COPPER);
+ phy_write_paged(phydev, 0x1f, 0x1b, 0x0002);
+ val = phy_read_paged(phydev, 0x1f, 0x1c);
if (val != 0x6276) {
phydev_err(phydev, "Expected external RTL8214FC, found PHY-ID %x\n", val);
return -1;
+ h->parts[1].start;
/* detect phy version */
- write_phy(mac, 0xfff, 27, 0x0004);
- read_phy(mac, 0xfff, 28, &val);
+ phy_write_paged(phydev, RTL83XX_PAGE_RAW, 27, 0x0004);
+ val = phy_read_paged(phydev, RTL83XX_PAGE_RAW, 28);
- read_phy(mac, 0, 16, &val);
+ val = phy_read(phydev, 16);
if (val & (1 << 11))
- rtl8380_rtl8214fc_on_off(mac, true);
+ rtl8380_rtl8214fc_on_off(phydev, true);
else
- rtl8380_phy_reset(mac);
+ rtl8380_phy_reset(phydev);
msleep(100);
- write_phy(mac, 0, 30, 0x0001);
+ phy_write_paged(phydev, 0, RTL821XEXT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_COPPER);
i = 0;
while (rtl8380_rtl8214fc_perchip[i * 3]
if (rtl8380_rtl8214fc_perchip[i * 3 + 1] == 0x1f)
page = rtl8380_rtl8214fc_perchip[i * 3 + 2];
if (rtl8380_rtl8214fc_perchip[i * 3 + 1] == 0x13 && page == 0x260) {
- read_phy(mac + rtl8380_rtl8214fc_perchip[i * 3], 0x260, 13, &val);
+ val = phy_read_paged(phydev, 0x260, 13);
val = (val & 0x1f00) | (rtl8380_rtl8214fc_perchip[i * 3 + 2]
& 0xe0ff);
- write_phy(mac + rtl8380_rtl8214fc_perchip[i * 3],
- 0xfff, rtl8380_rtl8214fc_perchip[i * 3 + 1], val);
+ phy_write_paged(phydev, RTL83XX_PAGE_RAW,
+ rtl8380_rtl8214fc_perchip[i * 3 + 1], val);
} else {
- write_phy(mac + rtl8380_rtl8214fc_perchip[i * 3],
- 0xfff, rtl8380_rtl8214fc_perchip[i * 3 + 1],
- rtl8380_rtl8214fc_perchip[i * 3 + 2]);
+ phy_write_paged(phydev, RTL83XX_PAGE_RAW,
+ rtl8380_rtl8214fc_perchip[i * 3 + 1],
+ rtl8380_rtl8214fc_perchip[i * 3 + 2]);
}
i++;
}
/* Force copper medium */
for (i = 0; i < 4; i++) {
- write_phy(mac + i, 0xfff, 0x1f, 0x0000);
- write_phy(mac + i, 0xfff, 0x1e, 0x0001);
+ phy_package_port_write_paged(phydev, i, RTL83XX_PAGE_RAW, RTL8XXX_PAGE_SELECT, RTL8XXX_PAGE_MAIN);
+ phy_package_port_write_paged(phydev, i, RTL83XX_PAGE_RAW, RTL821XEXT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_COPPER);
}
/* Enable PHY */
for (i = 0; i < 4; i++) {
- write_phy(mac + i, 0xfff, 0x1f, 0x0000);
- write_phy(mac + i, 0xfff, 0x00, 0x1140);
+ phy_package_port_write_paged(phydev, i, RTL83XX_PAGE_RAW, RTL8XXX_PAGE_SELECT, RTL8XXX_PAGE_MAIN);
+ phy_package_port_write_paged(phydev, i, RTL83XX_PAGE_RAW, 0x00, 0x1140);
}
mdelay(100);
/* Disable Autosensing */
for (i = 0; i < 4; i++) {
for (l = 0; l < 100; l++) {
- read_phy(mac + i, 0x0a42, 0x10, &val);
+ val = phy_package_port_read_paged(phydev, i, RTL821X_PAGE_GPHY, 0x10);
if ((val & 0x7) >= 3)
break;
}
/* Request patch */
for (i = 0; i < 4; i++) {
- write_phy(mac + i, 0xfff, 0x1f, 0x0b82);
- write_phy(mac + i, 0xfff, 0x10, 0x0010);
+ phy_package_port_write_paged(phydev, i, RTL83XX_PAGE_RAW, RTL8XXX_PAGE_SELECT, RTL821X_PAGE_PATCH);
+ phy_package_port_write_paged(phydev, i, RTL83XX_PAGE_RAW, 0x10, 0x0010);
}
mdelay(300);
/* Verify patch readiness */
for (i = 0; i < 4; i++) {
for (l = 0; l < 100; l++) {
- read_phy(mac + i, 0xb80, 0x10, &val);
+ val = phy_package_port_read_paged(phydev, i, RTL821X_PAGE_STATE, 0x10);
if (val & 0x40)
break;
}
return -1;
}
}
-
/* Use Broadcast ID method for patching */
- write_phy(mac, 0xfff, 0x1f, 0x0000);
- write_phy(mac, 0xfff, 0x1d, 0x0008);
- write_phy(mac, 0xfff, 0x1f, 0x0266);
- write_phy(mac, 0xfff, 0x16, 0xff00 + mac);
- write_phy(mac, 0xfff, 0x1f, 0x0000);
- write_phy(mac, 0xfff, 0x1d, 0x0000);
- mdelay(1);
+ rtl821x_phy_setup_package_broadcast(phydev, true);
i = 0;
while (rtl8380_rtl8214fc_perport[i * 2]) {
- write_phy(mac, 0xfff, rtl8380_rtl8214fc_perport[i * 2],
+ phy_write_paged(phydev, RTL83XX_PAGE_RAW, rtl8380_rtl8214fc_perport[i * 2],
rtl8380_rtl8214fc_perport[i * 2 + 1]);
i++;
}
/*Disable broadcast ID*/
- write_phy(mac, 0xfff, 0x1f, 0x0000);
- write_phy(mac, 0xfff, 0x1d, 0x0008);
- write_phy(mac, 0xfff, 0x1f, 0x0266);
- write_phy(mac, 0xfff, 0x16, 0x00 + mac);
- write_phy(mac, 0xfff, 0x1f, 0x0000);
- write_phy(mac, 0xfff, 0x1d, 0x0000);
- mdelay(1);
+ rtl821x_phy_setup_package_broadcast(phydev, false);
/* Auto medium selection */
for (i = 0; i < 4; i++) {
- write_phy(mac + i, 0xfff, 0x1f, 0x0000);
- write_phy(mac + i, 0xfff, 0x1e, 0x0000);
+ phy_write_paged(phydev, RTL83XX_PAGE_RAW, RTL8XXX_PAGE_SELECT, RTL8XXX_PAGE_MAIN);
+ phy_write_paged(phydev, RTL83XX_PAGE_RAW, RTL821XEXT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_AUTO);
}
return 0;
u32 v, cr_0, cr_1, cr_2;
u32 m_bit, l_bit;
- pr_info("%s --------------------- serdes %d forcing to %x ...\n", __func__, sds, sds_mode);
pr_info("%s: SDS: %d, mode %d\n", __func__, sds, phy_if);
switch (phy_if) {
case PHY_INTERFACE_MODE_SGMII:
return;
}
- pr_info("%s: SDS mode %x\n", __func__, sds_mode);
+ pr_info("%s --------------------- serdes %d forcing to %x ...\n", __func__, sds, sds_mode);
// Power down SerDes
rtl9300_sds_field_w(sds, 0x20, 0, 7, 6, 0x3);
if (sds == 5) pr_info("%s after %x\n", __func__, rtl930x_read_sds_phy(sds, 0x20, 0));
return sts1;
}
+static int rtl8214fc_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)
+{
+ struct phy_device *phydev = upstream;
+
+ rtl8214fc_media_set(phydev, true);
+
+ return 0;
+}
+
+static void rtl8214fc_sfp_remove(void *upstream)
+{
+ struct phy_device *phydev = upstream;
+
+ rtl8214fc_media_set(phydev, false);
+}
+
+static const struct sfp_upstream_ops rtl8214fc_sfp_ops = {
+ .attach = phy_sfp_attach,
+ .detach = phy_sfp_detach,
+ .module_insert = rtl8214fc_sfp_insert,
+ .module_remove = rtl8214fc_sfp_remove,
+};
+
static int rtl8214fc_phy_probe(struct phy_device *phydev)
{
struct device *dev = &phydev->mdio.dev;
- struct rtl838x_phy_priv *priv;
int addr = phydev->mdio.addr;
+ int ret = 0;
/* 839x has internal SerDes */
if (soc_info.id == 0x8393)
return -ENODEV;
- priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
- if (!priv)
- return -ENOMEM;
-
- priv->name = "RTL8214FC";
-
/* All base addresses of the PHYs start at multiples of 8 */
+ devm_phy_package_join(dev, phydev, addr & (~7),
+ sizeof(struct rtl83xx_shared_private));
+
if (!(addr % 8)) {
- /* Configuration must be done whil patching still possible */
- return rtl8380_configure_rtl8214fc(phydev);
+ struct rtl83xx_shared_private *shared = phydev->shared->priv;
+ shared->name = "RTL8214FC";
+ /* Configuration must be done while patching still possible */
+ ret = rtl8380_configure_rtl8214fc(phydev);
+ if (ret)
+ return ret;
}
- return 0;
+
+ return phy_sfp_probe(phydev, &rtl8214fc_sfp_ops);
}
static int rtl8214c_phy_probe(struct phy_device *phydev)
{
struct device *dev = &phydev->mdio.dev;
- struct rtl838x_phy_priv *priv;
int addr = phydev->mdio.addr;
- priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
- if (!priv)
- return -ENOMEM;
-
- priv->name = "RTL8214C";
-
/* All base addresses of the PHYs start at multiples of 8 */
+ devm_phy_package_join(dev, phydev, addr & (~7),
+ sizeof(struct rtl83xx_shared_private));
+
if (!(addr % 8)) {
+ struct rtl83xx_shared_private *shared = phydev->shared->priv;
+ shared->name = "RTL8214C";
/* Configuration must be done whil patching still possible */
return rtl8380_configure_rtl8214c(phydev);
}
static int rtl8218b_ext_phy_probe(struct phy_device *phydev)
{
struct device *dev = &phydev->mdio.dev;
- struct rtl838x_phy_priv *priv;
int addr = phydev->mdio.addr;
- priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
- if (!priv)
- return -ENOMEM;
-
- priv->name = "RTL8218B (external)";
-
/* All base addresses of the PHYs start at multiples of 8 */
- if (!(addr % 8) && soc_info.family == RTL8380_FAMILY_ID) {
- /* Configuration must be done while patching still possible */
- return rtl8380_configure_ext_rtl8218b(phydev);
+ devm_phy_package_join(dev, phydev, addr & (~7),
+ sizeof(struct rtl83xx_shared_private));
+
+ if (!(addr % 8)) {
+ struct rtl83xx_shared_private *shared = phydev->shared->priv;
+ shared->name = "RTL8218B (external)";
+ if (soc_info.family == RTL8380_FAMILY_ID) {
+ /* Configuration must be done while patching still possible */
+ return rtl8380_configure_ext_rtl8218b(phydev);
+ }
}
+
return 0;
}
static int rtl8218b_int_phy_probe(struct phy_device *phydev)
{
struct device *dev = &phydev->mdio.dev;
- struct rtl838x_phy_priv *priv;
int addr = phydev->mdio.addr;
if (soc_info.family != RTL8380_FAMILY_ID)
if (addr >= 24)
return -ENODEV;
- priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
- if (!priv)
- return -ENOMEM;
-
- priv->name = "RTL8218B (internal)";
-
+ pr_debug("%s: id: %d\n", __func__, addr);
/* All base addresses of the PHYs start at multiples of 8 */
+ devm_phy_package_join(dev, phydev, addr & (~7),
+ sizeof(struct rtl83xx_shared_private));
+
if (!(addr % 8)) {
+ struct rtl83xx_shared_private *shared = phydev->shared->priv;
+ shared->name = "RTL8218B (internal)";
/* Configuration must be done while patching still possible */
return rtl8380_configure_int_rtl8218b(phydev);
}
+
return 0;
}
static int rtl8218d_phy_probe(struct phy_device *phydev)
{
struct device *dev = &phydev->mdio.dev;
- struct rtl838x_phy_priv *priv;
int addr = phydev->mdio.addr;
pr_debug("%s: id: %d\n", __func__, addr);
- priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
- if (!priv)
- return -ENOMEM;
-
- priv->name = "RTL8218D";
+ /* All base addresses of the PHYs start at multiples of 8 */
+ devm_phy_package_join(dev, phydev, addr & (~7),
+ sizeof(struct rtl83xx_shared_private));
/* All base addresses of the PHYs start at multiples of 8 */
if (!(addr % 8)) {
+ struct rtl83xx_shared_private *shared = phydev->shared->priv;
+ shared->name = "RTL8218D";
/* Configuration must be done while patching still possible */
// TODO: return configure_rtl8218d(phydev);
}
return 0;
}
-static int rtl8226_phy_probe(struct phy_device *phydev)
-{
- struct device *dev = &phydev->mdio.dev;
- struct rtl838x_phy_priv *priv;
- int addr = phydev->mdio.addr;
-
- pr_info("%s: id: %d\n", __func__, addr);
- priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
- if (!priv)
- return -ENOMEM;
-
- priv->name = "RTL8226";
-
- return 0;
-}
-
static int rtl838x_serdes_probe(struct phy_device *phydev)
{
- struct device *dev = &phydev->mdio.dev;
- struct rtl838x_phy_priv *priv;
int addr = phydev->mdio.addr;
if (soc_info.family != RTL8380_FAMILY_ID)
if (addr < 24)
return -ENODEV;
- priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
- if (!priv)
- return -ENOMEM;
-
- priv->name = "RTL8380 Serdes";
-
/* On the RTL8380M, PHYs 24-27 connect to the internal SerDes */
if (soc_info.id == 0x8380) {
if (addr == 24)
static int rtl8393_serdes_probe(struct phy_device *phydev)
{
- struct device *dev = &phydev->mdio.dev;
- struct rtl838x_phy_priv *priv;
int addr = phydev->mdio.addr;
pr_info("%s: id: %d\n", __func__, addr);
if (addr < 24)
return -ENODEV;
- priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
- if (!priv)
- return -ENOMEM;
-
- priv->name = "RTL8393 Serdes";
return rtl8390_configure_serdes(phydev);
}
static int rtl8390_serdes_probe(struct phy_device *phydev)
{
- struct device *dev = &phydev->mdio.dev;
- struct rtl838x_phy_priv *priv;
int addr = phydev->mdio.addr;
if (soc_info.family != RTL8390_FAMILY_ID)
if (addr < 24)
return -ENODEV;
- priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
- if (!priv)
- return -ENOMEM;
-
- priv->name = "RTL8390 Serdes";
return rtl8390_configure_generic(phydev);
}
static int rtl9300_serdes_probe(struct phy_device *phydev)
{
- struct device *dev = &phydev->mdio.dev;
- struct rtl838x_phy_priv *priv;
-
if (soc_info.family != RTL9300_FAMILY_ID)
return -ENODEV;
- priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
- if (!priv)
- return -ENOMEM;
-
- priv->name = "RTL9300 Serdes";
phydev_info(phydev, "Detected internal RTL9300 Serdes\n");
return rtl9300_configure_serdes(phydev);
PHY_ID_MATCH_MODEL(PHY_ID_RTL8214C),
.name = "Realtek RTL8214C",
.features = PHY_GBIT_FEATURES,
+ .flags = PHY_HAS_REALTEK_PAGES,
.match_phy_device = rtl8214c_match_phy_device,
.probe = rtl8214c_phy_probe,
.suspend = genphy_suspend,
PHY_ID_MATCH_MODEL(PHY_ID_RTL8214FC),
.name = "Realtek RTL8214FC",
.features = PHY_GBIT_FIBRE_FEATURES,
+ .flags = PHY_HAS_REALTEK_PAGES,
.match_phy_device = rtl8214fc_match_phy_device,
.probe = rtl8214fc_phy_probe,
- .suspend = genphy_suspend,
- .resume = genphy_resume,
+ .suspend = rtl8214fc_suspend,
+ .resume = rtl8214fc_resume,
.set_loopback = genphy_loopback,
- .read_mmd = rtl8218b_read_mmd,
- .write_mmd = rtl8218b_write_mmd,
.set_port = rtl8214fc_set_port,
.get_port = rtl8214fc_get_port,
.set_eee = rtl8214fc_set_eee,
PHY_ID_MATCH_MODEL(PHY_ID_RTL8218B_E),
.name = "Realtek RTL8218B (external)",
.features = PHY_GBIT_FEATURES,
+ .flags = PHY_HAS_REALTEK_PAGES,
.match_phy_device = rtl8218b_ext_match_phy_device,
.probe = rtl8218b_ext_phy_probe,
.suspend = genphy_suspend,
.resume = genphy_resume,
.set_loopback = genphy_loopback,
- .read_mmd = rtl8218b_read_mmd,
- .write_mmd = rtl8218b_write_mmd,
.set_eee = rtl8218b_set_eee,
.get_eee = rtl8218b_get_eee,
},
PHY_ID_MATCH_MODEL(PHY_ID_RTL8218D),
.name = "REALTEK RTL8218D",
.features = PHY_GBIT_FEATURES,
+ .flags = PHY_HAS_REALTEK_PAGES,
.probe = rtl8218d_phy_probe,
.suspend = genphy_suspend,
.resume = genphy_resume,
.set_eee = rtl8218d_set_eee,
.get_eee = rtl8218d_get_eee,
},
+ {
+ PHY_ID_MATCH_MODEL(PHY_ID_RTL8221B),
+ .name = "REALTEK RTL8221B",
+ .features = PHY_GBIT_FEATURES,
+ .flags = PHY_HAS_REALTEK_PAGES,
+ .suspend = genphy_suspend,
+ .resume = genphy_resume,
+ .set_loopback = genphy_loopback,
+ .read_page = rtl8226_read_page,
+ .write_page = rtl8226_write_page,
+ .read_status = rtl8226_read_status,
+ .config_aneg = rtl8226_config_aneg,
+ .set_eee = rtl8226_set_eee,
+ .get_eee = rtl8226_get_eee,
+ },
{
PHY_ID_MATCH_MODEL(PHY_ID_RTL8226),
.name = "REALTEK RTL8226",
.features = PHY_GBIT_FEATURES,
- .probe = rtl8226_phy_probe,
+ .flags = PHY_HAS_REALTEK_PAGES,
.suspend = genphy_suspend,
.resume = genphy_resume,
.set_loopback = genphy_loopback,
- .read_mmd = rtl8226_read_mmd,
- .write_mmd = rtl8226_write_mmd,
.read_page = rtl8226_read_page,
.write_page = rtl8226_write_page,
.read_status = rtl8226_read_status,
PHY_ID_MATCH_MODEL(PHY_ID_RTL8218B_I),
.name = "Realtek RTL8218B (internal)",
.features = PHY_GBIT_FEATURES,
+ .flags = PHY_HAS_REALTEK_PAGES,
.probe = rtl8218b_int_phy_probe,
.suspend = genphy_suspend,
.resume = genphy_resume,
.set_loopback = genphy_loopback,
- .read_mmd = rtl8218b_read_mmd,
- .write_mmd = rtl8218b_write_mmd,
.set_eee = rtl8218b_set_eee,
.get_eee = rtl8218b_get_eee,
},
PHY_ID_MATCH_MODEL(PHY_ID_RTL8218B_I),
.name = "Realtek RTL8380 SERDES",
.features = PHY_GBIT_FIBRE_FEATURES,
+ .flags = PHY_HAS_REALTEK_PAGES,
.probe = rtl838x_serdes_probe,
.suspend = genphy_suspend,
.resume = genphy_resume,
.set_loopback = genphy_loopback,
- .read_mmd = rtl8218b_read_mmd,
- .write_mmd = rtl8218b_write_mmd,
.read_status = rtl8380_read_status,
},
{
PHY_ID_MATCH_MODEL(PHY_ID_RTL8393_I),
.name = "Realtek RTL8393 SERDES",
.features = PHY_GBIT_FIBRE_FEATURES,
+ .flags = PHY_HAS_REALTEK_PAGES,
.probe = rtl8393_serdes_probe,
.suspend = genphy_suspend,
.resume = genphy_resume,
PHY_ID_MATCH_MODEL(PHY_ID_RTL8390_GENERIC),
.name = "Realtek RTL8390 Generic",
.features = PHY_GBIT_FIBRE_FEATURES,
+ .flags = PHY_HAS_REALTEK_PAGES,
.probe = rtl8390_serdes_probe,
.suspend = genphy_suspend,
.resume = genphy_resume,
PHY_ID_MATCH_MODEL(PHY_ID_RTL9300_I),
.name = "REALTEK RTL9300 SERDES",
.features = PHY_GBIT_FIBRE_FEATURES,
+ .flags = PHY_HAS_REALTEK_PAGES,
.probe = rtl9300_serdes_probe,
.suspend = genphy_suspend,
.resume = genphy_resume,
projects / openwrt / staging / wigyori.git / blobdiff