// SPDX-License-Identifier: GPL-2.0-only
#include <asm/mach-rtl838x/mach-rtl83xx.h>
+#include <linux/etherdevice.h>
#include <linux/iopoll.h>
#include <net/nexthop.h>
}
+static void rtl838x_set_static_move_action(int port, bool forward)
+{
+ int shift = MV_ACT_PORT_SHIFT(port);
+ u32 val = forward ? MV_ACT_FORWARD : MV_ACT_DROP;
+
+ sw_w32_mask(MV_ACT_MASK << shift, val << shift,
+ RTL838X_L2_PORT_STATIC_MV_ACT(port));
+}
+
static void rtl838x_stp_get(struct rtl838x_switch_priv *priv, u16 msti, u32 port_state[])
{
u32 cmd = 1 << 15 | /* Execute cmd */
pr_info("Sel : %08x\n", r[17]);
}
-static void rtl838x_pie_rule_dump(struct pie_rule *pr)
-{
- pr_info("Drop: %d, fwd: %d, ovid: %d, ivid: %d, flt: %d, log: %d, rmk: %d, meter: %d tagst: %d, mir: %d, nopri: %d, cpupri: %d, otpid: %d, itpid: %d, shape: %d\n",
- pr->drop, pr->fwd_sel, pr->ovid_sel, pr->ivid_sel, pr->flt_sel, pr->log_sel, pr->rmk_sel, pr->log_sel, pr->tagst_sel, pr->mir_sel, pr->nopri_sel,
- pr->cpupri_sel, pr->otpid_sel, pr->itpid_sel, pr->shaper_sel);
- if (pr->fwd_sel)
- pr_info("FWD: %08x\n", pr->fwd_data);
- pr_info("TID: %x, %x\n", pr->tid, pr->tid_m);
-}
+// Currently not used
+// static void rtl838x_pie_rule_dump(struct pie_rule *pr)
+// {
+// pr_info("Drop: %d, fwd: %d, ovid: %d, ivid: %d, flt: %d, log: %d, rmk: %d, meter: %d tagst: %d, mir: %d, nopri: %d, cpupri: %d, otpid: %d, itpid: %d, shape: %d\n",
+// pr->drop, pr->fwd_sel, pr->ovid_sel, pr->ivid_sel, pr->flt_sel, pr->log_sel, pr->rmk_sel, pr->log_sel, pr->tagst_sel, pr->mir_sel, pr->nopri_sel,
+// pr->cpupri_sel, pr->otpid_sel, pr->itpid_sel, pr->shaper_sel);
+// if (pr->fwd_sel)
+// pr_info("FWD: %08x\n", pr->fwd_data);
+// pr_info("TID: %x, %x\n", pr->tid, pr->tid_m);
+// }
static int rtl838x_pie_rule_read(struct rtl838x_switch_priv *priv, int idx, struct pie_rule *pr)
{
/* Access IACL table (1) via register 0 */
struct table_reg *q = rtl_table_get(RTL8380_TBL_0, 1);
u32 r[18];
- int err = 0;
+ int err;
int block = idx / PIE_BLOCK_SIZE;
u32 t_select = sw_r32(RTL838X_ACL_BLK_TMPLTE_CTRL(block));
for (int i = 0; i < 18; i++)
r[i] = 0;
- if (!pr->valid)
- goto err_out;
+ if (!pr->valid) {
+ err = -EINVAL;
+ pr_err("Rule invalid\n");
+ goto errout;
+ }
rtl838x_write_pie_fixed_fields(r, pr);
pr_debug("%s: template %d\n", __func__, (t_select >> (pr->tid * 3)) & 0x7);
rtl838x_write_pie_templated(r, pr, fixed_templates[(t_select >> (pr->tid * 3)) & 0x7]);
- if (rtl838x_write_pie_action(r, pr)) {
+ err = rtl838x_write_pie_action(r, pr);
+ if (err) {
pr_err("Rule actions too complex\n");
- goto err_out;
+ goto errout;
}
/* rtl838x_pie_rule_dump_raw(r); */
for (int i = 0; i < 18; i++)
sw_w32(r[i], rtl_table_data(q, i));
-err_out:
+errout:
rtl_table_write(q, idx);
rtl_table_release(q);
.enable_flood = rtl838x_enable_flood,
.enable_mcast_flood = rtl838x_enable_mcast_flood,
.enable_bcast_flood = rtl838x_enable_bcast_flood,
+ .set_static_move_action = rtl838x_set_static_move_action,
.stp_get = rtl838x_stp_get,
.stp_set = rtl838x_stp_set,
.mac_port_ctrl = rtl838x_mac_port_ctrl,
/* Reads a register in a page from the PHY */
int rtl838x_read_phy(u32 port, u32 page, u32 reg, u32 *val)
{
- int err = -ETIMEDOUT;
+ int err;
u32 v;
u32 park_page;
mutex_lock(&smi_lock);
- if (rtl838x_smi_wait_op(100000))
- goto timeout;
+ err = rtl838x_smi_wait_op(100000);
+ if (err)
+ goto errout;
sw_w32_mask(0xffff0000, port << 16, RTL838X_SMI_ACCESS_PHY_CTRL_2);
sw_w32(v | park_page, RTL838X_SMI_ACCESS_PHY_CTRL_1);
sw_w32_mask(0, 1, RTL838X_SMI_ACCESS_PHY_CTRL_1);
- if (rtl838x_smi_wait_op(100000))
- goto timeout;
+ err = rtl838x_smi_wait_op(100000);
+ if (err)
+ goto errout;
*val = sw_r32(RTL838X_SMI_ACCESS_PHY_CTRL_2) & 0xffff;
err = 0;
-timeout:
+errout:
mutex_unlock(&smi_lock);
- return -ETIMEDOUT;
+ return err;
}
/* Write to a register in a page of the PHY */
int rtl838x_write_phy(u32 port, u32 page, u32 reg, u32 val)
{
- int err = -ETIMEDOUT;
+ int err;
u32 v;
u32 park_page;
return -ENOTSUPP;
mutex_lock(&smi_lock);
- if (rtl838x_smi_wait_op(100000))
- goto timeout;
+ err = rtl838x_smi_wait_op(100000);
+ if (err)
+ goto errout;
sw_w32(BIT(port), RTL838X_SMI_ACCESS_PHY_CTRL_0);
mdelay(10);
sw_w32(v | park_page, RTL838X_SMI_ACCESS_PHY_CTRL_1);
sw_w32_mask(0, 1, RTL838X_SMI_ACCESS_PHY_CTRL_1);
- if (rtl838x_smi_wait_op(100000))
- goto timeout;
+ err = rtl838x_smi_wait_op(100000);
+ if (err)
+ goto errout;
err = 0;
-timeout:
+errout:
mutex_unlock(&smi_lock);
- return -ETIMEDOUT;
+ return err;
}
/* Read an mmd register of a PHY */
int rtl838x_read_mmd_phy(u32 port, u32 addr, u32 reg, u32 *val)
{
- int err = -ETIMEDOUT;
+ int err;
u32 v;
mutex_lock(&smi_lock);
- if (rtl838x_smi_wait_op(100000))
- goto timeout;
+ err = rtl838x_smi_wait_op(100000);
+ if (err)
+ goto errout;
sw_w32(1 << port, RTL838X_SMI_ACCESS_PHY_CTRL_0);
mdelay(10);
v = 1 << 1 | 0 << 2 | 1;
sw_w32(v, RTL838X_SMI_ACCESS_PHY_CTRL_1);
- if (rtl838x_smi_wait_op(100000))
- goto timeout;
+ err = rtl838x_smi_wait_op(100000);
+ if (err)
+ goto errout;
*val = sw_r32(RTL838X_SMI_ACCESS_PHY_CTRL_2) & 0xffff;
err = 0;
-timeout:
+errout:
mutex_unlock(&smi_lock);
return err;
/* Write to an mmd register of a PHY */
int rtl838x_write_mmd_phy(u32 port, u32 addr, u32 reg, u32 val)
{
- int err = -ETIMEDOUT;
+ int err;
u32 v;
pr_debug("MMD write: port %d, dev %d, reg %d, val %x\n", port, addr, reg, val);
val &= 0xffff;
mutex_lock(&smi_lock);
- if (rtl838x_smi_wait_op(100000))
- goto timeout;
+ err = rtl838x_smi_wait_op(100000);
+ if (err)
+ goto errout;
sw_w32(1 << port, RTL838X_SMI_ACCESS_PHY_CTRL_0);
mdelay(10);
v = 1 << 1 | 1 << 2 | 1;
sw_w32(v, RTL838X_SMI_ACCESS_PHY_CTRL_1);
- if (rtl838x_smi_wait_op(100000))
- goto timeout;
+ err = rtl838x_smi_wait_op(100000);
+ if (err)
+ goto errout;
err = 0;
-timeout:
+errout:
mutex_unlock(&smi_lock);
return err;
}