X-Git-Url: http://git.openwrt.org/?a=blobdiff_plain;ds=sidebyside;f=target%2Flinux%2Framips%2Fdts%2Fmt7621_ubiquiti_edgerouterx.dtsi;h=2aaca832610f4b2e103b7109ef7189b94f045c69;hb=HEAD;hp=b8de4113e267589f35cb43d4517d3bded12217ce;hpb=7140394903b1bfbbb589dafa524e2dbd6cd79862;p=openwrt%2Fopenwrt.git

diff --git a/target/linux/ramips/dts/mt7621_ubiquiti_edgerouterx.dtsi b/target/linux/ramips/dts/mt7621_ubiquiti_edgerouterx.dtsi
deleted file mode 100644
index b8de4113e2..0000000000
--- a/target/linux/ramips/dts/mt7621_ubiquiti_edgerouterx.dtsi
+++ /dev/null
@@ -1,114 +0,0 @@
-#include "mt7621.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-
-/ {
-	compatible = "ubiquiti,edgerouterx", "mediatek,mt7621-soc";
-
-	aliases {
-		label-mac-device = &ethernet;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,57600";
-	};
-
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-
-		reset {
-			label = "reset";
-			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-	};
-};
-
-&ethernet {
-	mtd-mac-address = <&factory 0x22>;
-};
-
-&nand {
-	status = "okay";
-
-	partitions {
-		compatible = "fixed-partitions";
-		#address-cells = <1>;
-		#size-cells = <1>;
-
-		partition@0 {
-			label = "u-boot";
-			reg = <0x0 0x80000>;
-			read-only;
-		};
-
-		partition@80000 {
-			label = "u-boot-env";
-			reg = <0x80000 0x60000>;
-			read-only;
-		};
-
-		factory: partition@e0000 {
-			label = "factory";
-			reg = <0xe0000 0x60000>;
-		};
-
-		partition@140000 {
-			label = "kernel1";
-			reg = <0x140000 0x300000>;
-		};
-
-		partition@440000 {
-			label = "kernel2";
-			reg = <0x440000 0x300000>;
-		};
-
-		partition@740000 {
-			label = "ubi";
-			reg = <0x740000 0xf7c0000>;
-		};
-	};
-};
-
-&pinctrl {
-	state_default: pinctrl0 {
-		gpio {
-			ralink,group = "uart2", "uart3", "i2c", "pcie", "rgmii2", "jtag";
-			ralink,function = "gpio";
-		};
-	};
-};
-
-&spi0 {
-	/*
-	 * This board has 2Mb spi flash soldered in and visible
-	 * from manufacturer's firmware.
-	 * But this SoC shares spi and nand pins,
-	 * and current driver doesn't handle this sharing well
-	 */
-	status = "disabled";
-
-	m25p80@1 {
-		compatible = "jedec,spi-nor";
-		reg = <1>;
-		spi-max-frequency = <10000000>;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			partition@0 {
-				label = "spi";
-				reg = <0x0 0x200000>;
-				read-only;
-			};
-		};
-	};
-};
-
-&xhci {
-	status = "disabled";
-};