X-Git-Url: http://git.openwrt.org/?a=blobdiff_plain;f=target%2Flinux%2Fath79%2Fdts%2Fqca9557.dtsi;h=541aa6916ef4e17241bf1412523b8fed89051a87;hb=eea66c3227f07d07108c2ba9c1c9197247623552;hp=ed92da3bd777d0abb80a139e74892ce148998a47;hpb=53c474abbdfef8eb3499e2d10c9ad491788b8a72;p=openwrt%2Fstaging%2Fdedeckeh.git diff --git a/target/linux/ath79/dts/qca9557.dtsi b/target/linux/ath79/dts/qca9557.dtsi index ed92da3bd7..541aa6916e 100644 --- a/target/linux/ath79/dts/qca9557.dtsi +++ b/target/linux/ath79/dts/qca9557.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT #include #include "ath79.dtsi" @@ -14,12 +14,19 @@ cpu@0 { device_type = "cpu"; - compatible = "mips,mips24Kc"; + compatible = "mips,mips74Kc"; clocks = <&pll ATH79_CLK_CPU>; reg = <0>; }; }; + extosc: ref { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-output-names = "ref"; + clock-frequency = <40000000>; + }; + ahb { apb { ddr_ctrl: memory-controller@18000000 { @@ -46,6 +53,30 @@ status = "disabled"; }; + usb_phy0: usb-phy0@18030000 { + compatible ="qca,qca9550-usb-phy", "qca,ar7200-usb-phy"; + reg = <0x18030000 4>, <0x18030004 4>; + + reset-names = "usb-phy", "usb-suspend-override"; + resets = <&rst 4>, <&rst 3>; + + #phy-cells = <0>; + + status = "disabled"; + }; + + usb_phy1: usb-phy1@18030010 { + compatible = "qca,qca9550-usb-phy", "qca,ar7200-usb-phy"; + reg = <0x18030010 4>, <0x18030014 4>; + + reset-names = "usb-phy", "usb-suspend-override"; + resets = <&rst2 4>, <&rst2 3>; + + #phy-cells = <0>; + + status = "disabled"; + }; + gpio: gpio@18040000 { compatible = "qca,ar9557-gpio", "qca,ar9340-gpio"; @@ -64,7 +95,7 @@ pinmux: pinmux@1804002c { compatible = "pinctrl-single"; - reg = <0x1804002c 0x40>; + reg = <0x1804002c 0x44>; #size-cells = <0>; @@ -80,11 +111,13 @@ pll: pll-controller@18050000 { compatible = "qca,ar9557-pll", - "qca,qca9550-pll"; - reg = <0x18050000 0x20>; + "qca,qca9550-pll", "syscon"; + reg = <0x18050000 0x50>; #clock-cells = <1>; clock-output-names = "cpu", "ddr", "ahb"; + + clocks = <&extosc>; }; wdt: wdt@18060008 { @@ -98,40 +131,52 @@ }; rst: reset-controller@1806001c { - compatible = "qca,ar9557-reset", - "qca,ar7100-reset", - "simple-bus"; + compatible = "qca,qca9550-reset", + "qca,ar7100-reset"; reg = <0x1806001c 0x4>; #reset-cells = <1>; interrupt-parent = <&cpuintc>; - intc2: interrupt-controller@2 { - compatible = "qcom,qca9556-intc"; + intc2: interrupt-controller2 { + compatible = "qca,ar9340-intc"; + interrupt-parent = <&cpuintc>; interrupts = <2>; interrupt-controller; #interrupt-cells = <1>; - qcom,pending-bits = <0x1f0>, /* pcie rc1 */ - <0xf>; /* wmac */ + qca,int-status-addr = <0xac>; + qca,pending-bits = <0xf>, /* wmac */ + <0x1f0>; /* pcie rc 0 */ }; - intc3: interrupt-controller@3 { - compatible = "qcom,qca9556-intc"; + intc3: interrupt-controller3 { + compatible = "qca,ar9340-intc"; + interrupt-parent = <&cpuintc>; interrupts = <3>; interrupt-controller; #interrupt-cells = <1>; - qcom,pending-bits = <0x1f000>, /* pcie rc2 */ + qca,int-status-addr = <0xac>; + qca,pending-bits = <0x1f000>, /* pcie rc 1 */ <0x1000000>, /* usb1 */ <0x10000000>; /* usb2 */ }; }; + rst2: reset-controller@180600c0 { + compatible = "qca,qca9550-reset", + "qca,ar7100-reset", + "simple-bus"; + reg = <0x180600c0 0x4>; + + #reset-cells = <1>; + }; + pcie0: pcie-controller@180c0000 { compatible = "qcom,ar7240-pci"; #address-cells = <3>; @@ -141,10 +186,10 @@ <0x180f0000 0x100>, /* CTRL */ <0x14000000 0x1000>; /* CFG */ reg-names = "crp_base", "ctrl_base", "cfg_base"; - ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000 /* pci memory */ + ranges = <0x2000000 0 0x10000000 0x10000000 0 0x02000000 /* pci memory */ 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */ interrupt-parent = <&intc2>; - interrupts = <0>; + interrupts = <1>; interrupt-controller; #interrupt-cells = <1>; @@ -153,8 +198,81 @@ interrupt-map = <0 0 0 0 &pcie0 0>; status = "disabled"; }; + + pcie1: pcie-controller@18250000 { + compatible = "qcom,ar7240-pci"; + #address-cells = <3>; + #size-cells = <2>; + bus-range = <0x0 0x0>; + reg = <0x18250000 0x1000>, /* CRP */ + <0x18280000 0x100>, /* CTRL */ + <0x16000000 0x1000>; /* CFG */ + reg-names = "crp_base", "ctrl_base", "cfg_base"; + ranges = <0x2000000 0 0x12000000 0x12000000 0 0x02000000 /* pci memory */ + 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */ + interrupt-parent = <&intc3>; + interrupts = <0>; + + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-map-mask = <0 0 0 1>; + interrupt-map = <0 0 0 0 &pcie1 0>; + status = "disabled"; + }; + + gmac: gmac@18070000 { + compatible = "qca,qca9550-gmac"; + reg = <0x18070000 0x14>; + }; + + wmac: wmac@18100000 { + compatible = "qca,qca9550-wmac"; + reg = <0x18100000 0x10000>; + + interrupt-parent = <&intc2>; + interrupts = <0>; + + status = "disabled"; + }; }; + usb0: usb@1b000000 { + compatible = "generic-ehci"; + reg = <0x1b000000 0x1fc>; + + interrupt-parent = <&intc3>; + interrupts = <1>; + resets = <&rst 5>; + reset-names = "usb-host"; + + has-transaction-translator; + caps-offset = <0x100>; + + phy-names = "usb-phy0"; + phys = <&usb_phy0>; + + status = "disabled"; + }; + + usb1: usb@1b400000 { + compatible = "generic-ehci"; + reg = <0x1b400000 0x1fc>; + + interrupt-parent = <&intc3>; + interrupts = <2>; + resets = <&rst2 5>; + reset-names = "usb-host"; + + has-transaction-translator; + caps-offset = <0x100>; + + phy-names = "usb-phy1"; + phys = <&usb_phy1>; + + status = "disabled"; + }; + spi: spi@1f000000 { compatible = "qca,ar9557-spi", "qca,ar7100-spi"; reg = <0x1f000000 0x10>; @@ -176,9 +294,12 @@ }; ð0 { - compatible = "qca,qca9550-eth", "syscon"; + compatible = "qca,qca9550-eth", "syscon", "simple-mfd"; - pll-data = <0x82000101 0x80000101 0x80001313>; + pll-reg = <0 0x28 0>; + pll-handle = <&pll>; + + pll-data = <0x16000000 0x00000101 0x00001616>; phy-mode = "rgmii"; resets = <&rst 9>; @@ -191,9 +312,12 @@ }; ð1 { - compatible = "qca,qca9550-eth", "syscon"; + compatible = "qca,qca9550-eth", "syscon", "simple-mfd"; + + pll-reg = <0 0x48 0>; + pll-handle = <&pll>; - pll-data = <0x82000101 0x80000101 0x80001313>; + pll-data = <0x16000000 0x00000101 0x00001616>; phy-mode = "sgmii"; resets = <&rst 13>;