X-Git-Url: http://git.openwrt.org/?a=blobdiff_plain;f=target%2Flinux%2Fath79%2Fimage%2Flzma-loader%2Fsrc%2Far71xx_regs.h;fp=target%2Flinux%2Fath79%2Fimage%2Flzma-loader%2Fsrc%2Far71xx_regs.h;h=245042fdab74af1ab442f11614668a668872aad2;hb=1d49310fdb5e6febd2e7a60d55deb0adb4364307;hp=19a4785bb44aed601d69ef92b74f9517ac3b675a;hpb=cb9ccd644bf986d5c23e40dda92576d36a1d3b1b;p=openwrt%2Fstaging%2Fldir.git

diff --git a/target/linux/ath79/image/lzma-loader/src/ar71xx_regs.h b/target/linux/ath79/image/lzma-loader/src/ar71xx_regs.h
index 19a4785bb4..245042fdab 100644
--- a/target/linux/ath79/image/lzma-loader/src/ar71xx_regs.h
+++ b/target/linux/ath79/image/lzma-loader/src/ar71xx_regs.h
@@ -128,6 +128,17 @@
 #define AR9300_OTP_STATUS_SM_BUSY	0x1
 #define AR9300_OTP_READ_DATA	0x15f1c
 
+#define QCA955X_OTP_BASE        (AR71XX_APB_BASE + 0x00130000)
+#define QCA955X_OTP_REG_MEM_0	0x0000
+#define QCA955X_OTP_REG_INTF2	0x1008
+#define QCA955X_OTP_REG_STATUS0	0x1018
+#define QCA955X_OTP_STATUS0_EFUSE_VALID	BIT(2)
+
+#define QCA955X_OTP_REG_STATUS1		0x101c
+#define QCA955X_OTP_REG_LDO_CTRL	0x1024
+#define QCA955X_OTP_REG_LDO_STATUS	0x102c
+#define QCA955X_OTP_LDO_STATUS_POWER_ON		BIT(0)
+
 /*
  * DDR_CTRL block
  */
@@ -344,6 +355,7 @@
 
 #define QCA955X_RESET_REG_BOOTSTRAP		0xb0
 #define QCA955X_RESET_REG_EXT_INT_STATUS	0xac
+#define QCA955X_RESET_REG_RESET_MODULE		0x1c
 
 #define MISC_INT_ETHSW			BIT(12)
 #define MISC_INT_TIMER4			BIT(10)
@@ -436,6 +448,9 @@
 #define AR934X_RESET_MBOX		BIT(1)
 #define AR934X_RESET_I2S		BIT(0)
 
+#define QCA955X_RESET_SGMII_ANALOG	BIT(12)
+#define QCA955X_RESET_SGMII		BIT(8)
+
 #define AR933X_BOOTSTRAP_MDIO_GPIO_EN	BIT(18)
 #define AR933X_BOOTSTRAP_EEPBUSY	BIT(4)
 #define AR933X_BOOTSTRAP_REF_CLK_40	BIT(0)
@@ -722,4 +737,6 @@
 #define QCA955X_ETH_CFG_RGMII_GMAC0	BIT(0)
 #define QCA955X_ETH_CFG_SGMII_GMAC0	BIT(6)
 
+#define QCA955X_GMAC_REG_SGMII_SERDES	0x0018
+
 #endif /* __ASM_MACH_AR71XX_REGS_H */