X-Git-Url: http://git.openwrt.org/?a=blobdiff_plain;f=target%2Flinux%2Fgeneric%2Fbackport-6.1%2F790-56-v6.10-net-dsa-mt7530-rename-p5_intf_sel-and-use-only-for-M.patch;fp=target%2Flinux%2Fgeneric%2Fbackport-6.1%2F790-56-v6.10-net-dsa-mt7530-rename-p5_intf_sel-and-use-only-for-M.patch;h=9697e7eb4fbb9793490fa8fd87f5aab020a6a82c;hb=fe9d2ccbc3d9dc0852df474f0e3cc07f93beae8b;hp=0000000000000000000000000000000000000000;hpb=db89030cb2b090f8c5fe406ad4192541fa9836bf;p=openwrt%2Fopenwrt.git diff --git a/target/linux/generic/backport-6.1/790-56-v6.10-net-dsa-mt7530-rename-p5_intf_sel-and-use-only-for-M.patch b/target/linux/generic/backport-6.1/790-56-v6.10-net-dsa-mt7530-rename-p5_intf_sel-and-use-only-for-M.patch new file mode 100644 index 0000000000..9697e7eb4f --- /dev/null +++ b/target/linux/generic/backport-6.1/790-56-v6.10-net-dsa-mt7530-rename-p5_intf_sel-and-use-only-for-M.patch @@ -0,0 +1,185 @@ +From 875ec5b67ab88e969b171e6e9ea803e3ed759614 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Mon, 22 Apr 2024 10:15:10 +0300 +Subject: [PATCH 03/15] net: dsa: mt7530: rename p5_intf_sel and use only for + MT7530 switch +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The p5_intf_sel pointer is used to store the information of whether PHY +muxing is used or not. PHY muxing is a feature specific to port 5 of the +MT7530 switch. Do not use it for other switch models. + +Rename the pointer to p5_mode to store the mode the port is being used in. +Rename the p5_interface_select enum to mt7530_p5_mode, the string +representation to mt7530_p5_mode_str, and the enum elements. + +If PHY muxing is not detected, the default mode, GMAC5, will be used. + +Signed-off-by: Arınç ÜNAL +--- + drivers/net/dsa/mt7530.c | 62 +++++++++++++++++----------------------- + drivers/net/dsa/mt7530.h | 15 +++++----- + 2 files changed, 33 insertions(+), 44 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -850,19 +850,15 @@ mt7530_set_ageing_time(struct dsa_switch + return 0; + } + +-static const char *p5_intf_modes(unsigned int p5_interface) ++static const char *mt7530_p5_mode_str(unsigned int mode) + { +- switch (p5_interface) { +- case P5_DISABLED: +- return "DISABLED"; +- case P5_INTF_SEL_PHY_P0: +- return "PHY P0"; +- case P5_INTF_SEL_PHY_P4: +- return "PHY P4"; +- case P5_INTF_SEL_GMAC5: +- return "GMAC5"; ++ switch (mode) { ++ case MUX_PHY_P0: ++ return "MUX PHY P0"; ++ case MUX_PHY_P4: ++ return "MUX PHY P4"; + default: +- return "unknown"; ++ return "GMAC5"; + } + } + +@@ -879,23 +875,23 @@ static void mt7530_setup_port5(struct ds + val |= MHWTRAP_MANUAL | MHWTRAP_P5_MAC_SEL | MHWTRAP_P5_DIS; + val &= ~MHWTRAP_P5_RGMII_MODE & ~MHWTRAP_PHY0_SEL; + +- switch (priv->p5_intf_sel) { +- case P5_INTF_SEL_PHY_P0: +- /* MT7530_P5_MODE_GPHY_P0: 2nd GMAC -> P5 -> P0 */ ++ switch (priv->p5_mode) { ++ /* MUX_PHY_P0: P0 -> P5 -> SoC MAC */ ++ case MUX_PHY_P0: + val |= MHWTRAP_PHY0_SEL; + fallthrough; +- case P5_INTF_SEL_PHY_P4: +- /* MT7530_P5_MODE_GPHY_P4: 2nd GMAC -> P5 -> P4 */ ++ ++ /* MUX_PHY_P4: P4 -> P5 -> SoC MAC */ ++ case MUX_PHY_P4: + val &= ~MHWTRAP_P5_MAC_SEL & ~MHWTRAP_P5_DIS; + + /* Setup the MAC by default for the cpu port */ + mt7530_write(priv, MT753X_PMCR_P(5), 0x56300); + break; +- case P5_INTF_SEL_GMAC5: +- /* MT7530_P5_MODE_GMAC: P5 -> External phy or 2nd GMAC */ +- val &= ~MHWTRAP_P5_DIS; +- break; ++ ++ /* GMAC5: P5 -> SoC MAC or external PHY */ + default: ++ val &= ~MHWTRAP_P5_DIS; + break; + } + +@@ -923,8 +919,8 @@ static void mt7530_setup_port5(struct ds + + mt7530_write(priv, MT7530_MHWTRAP, val); + +- dev_dbg(ds->dev, "Setup P5, HWTRAP=0x%x, intf_sel=%s, phy-mode=%s\n", +- val, p5_intf_modes(priv->p5_intf_sel), phy_modes(interface)); ++ dev_dbg(ds->dev, "Setup P5, HWTRAP=0x%x, mode=%s, phy-mode=%s\n", val, ++ mt7530_p5_mode_str(priv->p5_mode), phy_modes(interface)); + + mutex_unlock(&priv->reg_mutex); + } +@@ -2467,13 +2463,11 @@ mt7530_setup(struct dsa_switch *ds) + if (ret) + return ret; + +- /* Setup port 5 */ +- if (!dsa_is_unused_port(ds, 5)) { +- priv->p5_intf_sel = P5_INTF_SEL_GMAC5; +- } else { ++ /* Check for PHY muxing on port 5 */ ++ if (dsa_is_unused_port(ds, 5)) { + /* Scan the ethernet nodes. Look for GMAC1, lookup the used PHY. +- * Set priv->p5_intf_sel to the appropriate value if PHY muxing +- * is detected. ++ * Set priv->p5_mode to the appropriate value if PHY muxing is ++ * detected. + */ + for_each_child_of_node(dn, mac_np) { + if (!of_device_is_compatible(mac_np, +@@ -2497,17 +2491,16 @@ mt7530_setup(struct dsa_switch *ds) + } + id = of_mdio_parse_addr(ds->dev, phy_node); + if (id == 0) +- priv->p5_intf_sel = P5_INTF_SEL_PHY_P0; ++ priv->p5_mode = MUX_PHY_P0; + if (id == 4) +- priv->p5_intf_sel = P5_INTF_SEL_PHY_P4; ++ priv->p5_mode = MUX_PHY_P4; + } + of_node_put(mac_np); + of_node_put(phy_node); + break; + } + +- if (priv->p5_intf_sel == P5_INTF_SEL_PHY_P0 || +- priv->p5_intf_sel == P5_INTF_SEL_PHY_P4) ++ if (priv->p5_mode == MUX_PHY_P0 || priv->p5_mode == MUX_PHY_P4) + mt7530_setup_port5(ds, interface); + } + +@@ -2645,9 +2638,6 @@ mt7531_setup(struct dsa_switch *ds) + MT7531_EXT_P_MDIO_12); + } + +- if (!dsa_is_unused_port(ds, 5)) +- priv->p5_intf_sel = P5_INTF_SEL_GMAC5; +- + mt7530_rmw(priv, MT7531_GPIO_MODE0, MT7531_GPIO0_MASK, + MT7531_GPIO0_INTERRUPT); + +--- a/drivers/net/dsa/mt7530.h ++++ b/drivers/net/dsa/mt7530.h +@@ -708,12 +708,11 @@ struct mt7530_port { + struct phylink_pcs *sgmii_pcs; + }; + +-/* Port 5 interface select definitions */ +-enum p5_interface_select { +- P5_DISABLED, +- P5_INTF_SEL_PHY_P0, +- P5_INTF_SEL_PHY_P4, +- P5_INTF_SEL_GMAC5, ++/* Port 5 mode definitions of the MT7530 switch */ ++enum mt7530_p5_mode { ++ GMAC5, ++ MUX_PHY_P0, ++ MUX_PHY_P4, + }; + + struct mt7530_priv; +@@ -769,7 +768,7 @@ struct mt753x_info { + * @ports: Holding the state among ports + * @reg_mutex: The lock for protecting among process accessing + * registers +- * @p5_intf_sel: Holding the current port 5 interface select ++ * @p5_mode: Holding the current mode of port 5 of the MT7530 switch + * @p5_sgmii: Flag for distinguishing if port 5 of the MT7531 switch + * has got SGMII + * @irq: IRQ number of the switch +@@ -791,7 +790,7 @@ struct mt7530_priv { + const struct mt753x_info *info; + unsigned int id; + bool mcm; +- enum p5_interface_select p5_intf_sel; ++ enum mt7530_p5_mode p5_mode; + bool p5_sgmii; + u8 mirror_rx; + u8 mirror_tx;