X-Git-Url: http://git.openwrt.org/?a=blobdiff_plain;f=target%2Flinux%2Fipq806x%2Fpatches-6.6%2F107-10-ARM-dts-qcom-add-saw-for-l2-cache-and-kraitcc-for.patch;h=228368b6cd733c3eea5f23fb88cb3f5c5802f802;hb=a0cbf7f5d563b344dddd0cb66e7a8eef1bf3f15e;hp=0a594b268886db0e4637a3bd839b245eb20c9244;hpb=a705c8c681edd38fdecf25de4c8d5381278d31a2;p=openwrt%2Fstaging%2Fnbd.git diff --git a/target/linux/ipq806x/patches-6.6/107-10-ARM-dts-qcom-add-saw-for-l2-cache-and-kraitcc-for.patch b/target/linux/ipq806x/patches-6.6/107-10-ARM-dts-qcom-add-saw-for-l2-cache-and-kraitcc-for.patch index 0a594b2688..228368b6cd 100644 --- a/target/linux/ipq806x/patches-6.6/107-10-ARM-dts-qcom-add-saw-for-l2-cache-and-kraitcc-for.patch +++ b/target/linux/ipq806x/patches-6.6/107-10-ARM-dts-qcom-add-saw-for-l2-cache-and-kraitcc-for.patch @@ -11,11 +11,11 @@ for the secondary mux. Signed-off-by: Ansuel Smith Tested-by: Jonathan McDowell --- - arch/arm/boot/dts/qcom-ipq8064.dtsi | 34 +++++++++++++++++++++++++++-- + arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi | 34 +++++++++++++++++++++++++++-- 1 file changed, 32 insertions(+), 2 deletions(-) ---- a/arch/arm/boot/dts/qcom-ipq8064.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi +--- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi ++++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi @@ -301,6 +301,12 @@ }; @@ -29,30 +29,7 @@ Tested-by: Jonathan McDowell cxo_board: cxo_board { compatible = "fixed-clock"; #clock-cells = <0>; -@@ -575,15 +581,30 @@ - clocks = <&gcc PLL8_VOTE>, <&pxo_board>; - clock-names = "pll8_vote", "pxo"; - clock-output-names = "acpu_l2_aux"; -+ #clock-cells = <0>; -+ }; -+ -+ kraitcc: clock-controller { -+ compatible = "qcom,krait-cc-v1"; -+ clocks = <&gcc PLL9>, <&gcc PLL10>, <&gcc PLL12>, -+ <&acc0>, <&acc1>, <&l2cc>, <&qsb>, <&pxo_board>; -+ clock-names = "hfpll0", "hfpll1", "hfpll_l2", -+ "acpu0_aux", "acpu1_aux", "acpu_l2_aux", -+ "qsb", "pxo"; -+ #clock-cells = <1>; - }; - - acc0: clock-controller@2088000 { - compatible = "qcom,kpss-acc-v1"; - reg = <0x02088000 0x1000>, <0x02008000 0x1000>; -+ clock-output-names = "acpu0_aux"; -+ clocks = <&gcc PLL8_VOTE>, <&pxo_board>; -+ clock-names = "pll8_vote", "pxo"; -+ #clock-cells = <0>; +@@ -575,7 +581,7 @@ }; saw0: regulator@2089000 { @@ -61,14 +38,7 @@ Tested-by: Jonathan McDowell reg = <0x02089000 0x1000>, <0x02009000 0x1000>; regulator; }; -@@ -591,14 +612,24 @@ - acc1: clock-controller@2098000 { - compatible = "qcom,kpss-acc-v1"; - reg = <0x02098000 0x1000>, <0x02008000 0x1000>; -+ clock-output-names = "acpu1_aux"; -+ clocks = <&gcc PLL8_VOTE>, <&pxo_board>; -+ clock-names = "pll8_vote", "pxo"; -+ #clock-cells = <0>; +@@ -591,11 +612,27 @@ }; saw1: regulator@2099000 { @@ -84,6 +54,16 @@ Tested-by: Jonathan McDowell + regulator; + }; + - nss_common: syscon@03000000 { ++ kraitcc: clock-controller { ++ compatible = "qcom,krait-cc-v1"; ++ clocks = <&gcc PLL9>, <&gcc PLL10>, <&gcc PLL12>, ++ <&acc0>, <&acc1>, <&l2cc>, <&qsb>, <&pxo_board>; ++ clock-names = "hfpll0", "hfpll1", "hfpll_l2", ++ "acpu0_aux", "acpu1_aux", "acpu_l2_aux", ++ "qsb", "pxo"; ++ #clock-cells = <1>; ++ }; ++ + nss_common: syscon@3000000 { compatible = "syscon"; reg = <0x03000000 0x0000FFFF>;