X-Git-Url: http://git.openwrt.org/?a=blobdiff_plain;f=target%2Flinux%2Framips%2Fdts%2Fmt7620a.dtsi;h=4b6fa60dc8b72ea8b89a5fae53b83c44f487b4e5;hb=be7f9ad4ddb6a4cd22b128f8e8d424f445e299a8;hp=ccadbe40db7a748d1b9aa955f48978f70ae9c195;hpb=f36d624d88f962b12a7c819d456590d6b0a9ee24;p=openwrt%2Fopenwrt.git diff --git a/target/linux/ramips/dts/mt7620a.dtsi b/target/linux/ramips/dts/mt7620a.dtsi index ccadbe40db..4b6fa60dc8 100644 --- a/target/linux/ramips/dts/mt7620a.dtsi +++ b/target/linux/ramips/dts/mt7620a.dtsi @@ -1,11 +1,23 @@ +/dts-v1/; + / { #address-cells = <1>; #size-cells = <1>; - compatible = "ralink,mtk7620a-soc"; + compatible = "ralink,mt7620a-soc"; + + aliases { + spi0 = &spi0; + spi1 = &spi1; + serial0 = &uartlite; + }; cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { compatible = "mips,mips24KEc"; + reg = <0>; }; }; @@ -13,19 +25,13 @@ bootargs = "console=ttyS0,57600"; }; - cpuintc: cpuintc@0 { + cpuintc: cpuintc { #address-cells = <0>; #interrupt-cells = <1>; interrupt-controller; compatible = "mti,cpu-interrupt-controller"; }; - aliases { - spi0 = &spi0; - spi1 = &spi1; - serial0 = &uartlite; - }; - palmbus: palmbus@10000000 { compatible = "palmbus"; reg = <0x10000000 0x200000>; @@ -35,7 +41,7 @@ #size-cells = <1>; sysc: sysc@0 { - compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc"; + compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc", "syscon"; reg = <0x0 0x100>; }; @@ -111,8 +117,8 @@ gpio-controller; #gpio-cells = <2>; + ngpios = <24>; ralink,gpio-base = <0>; - ralink,num-gpios = <24>; ralink,register-map = [ 00 04 08 0c 20 24 28 2c 30 34 ]; @@ -128,8 +134,8 @@ gpio-controller; #gpio-cells = <2>; + ngpios = <16>; ralink,gpio-base = <24>; - ralink,num-gpios = <16>; ralink,register-map = [ 00 04 08 0c 10 14 18 1c 20 24 ]; @@ -147,8 +153,8 @@ gpio-controller; #gpio-cells = <2>; + ngpios = <32>; ralink,gpio-base = <40>; - ralink,num-gpios = <32>; ralink,register-map = [ 00 04 08 0c 10 14 18 1c 20 24 ]; @@ -166,8 +172,8 @@ gpio-controller; #gpio-cells = <2>; + ngpios = <1>; ralink,gpio-base = <72>; - ralink,num-gpios = <1>; ralink,register-map = [ 00 04 08 0c 10 14 18 1c 20 24 ]; @@ -176,7 +182,7 @@ }; i2c: i2c@900 { - compatible = "link,mt7620a-i2c", "ralink,rt2880-i2c"; + compatible = "ralink,rt2880-i2c"; reg = <0x900 0x100>; resets = <&rstctrl 16>; @@ -192,7 +198,7 @@ }; i2s: i2s@a00 { - compatible = "ralink,mt7620a-i2s"; + compatible = "mediatek,mt7620-i2s"; reg = <0xa00 0x100>; resets = <&rstctrl 17>; @@ -201,8 +207,11 @@ interrupt-parent = <&intc>; interrupts = <10>; + txdma-req = <2>; + rxdma-req = <3>; + dmas = <&gdma 4>, - <&gdma 5>; + <&gdma 6>; dma-names = "tx", "rx"; status = "disabled"; @@ -308,85 +317,120 @@ pcm_i2s_pins: pcm_i2s { pcm_i2s { - ralink,group = "uartf"; - ralink,function = "pcm i2s"; + groups = "uartf"; + function = "pcm i2s"; }; }; uartf_gpio_pins: uartf_gpio { uartf_gpio { - ralink,group = "uartf"; - ralink,function = "gpio uartf"; + groups = "uartf"; + function = "gpio uartf"; }; }; - spi_pins: spi { - spi { - ralink,group = "spi"; - ralink,function = "spi"; + gpio_i2s_pins: gpio_i2s { + gpio_i2s { + groups = "uartf"; + function = "gpio i2s"; + }; + }; + + spi_pins: spi_pins { + spi_pins { + groups = "spi"; + function = "spi"; }; }; spi_cs1: spi1 { spi1 { - ralink,group = "spi_cs1"; - ralink,function = "spi_cs1"; + groups = "spi refclk"; + function = "spi refclk"; }; }; - i2c_pins: i2c { - i2c { - ralink,group = "i2c"; - ralink,function = "i2c"; + i2c_pins: i2c_pins { + i2c_pins { + groups = "i2c"; + function = "i2c"; }; }; uartlite_pins: uartlite { uart { - ralink,group = "uartlite"; - ralink,function = "uartlite"; + groups = "uartlite"; + function = "uartlite"; }; }; mdio_pins: mdio { mdio { - ralink,group = "mdio"; - ralink,function = "mdio"; + groups = "mdio"; + function = "mdio"; + }; + }; + + mdio_refclk_pins: mdio_refclk { + mdio_refclk { + groups = "mdio"; + function = "refclk"; }; }; ephy_pins: ephy { ephy { - ralink,group = "ephy"; - ralink,function = "ephy"; + groups = "ephy"; + function = "ephy"; }; }; wled_pins: wled { wled { - ralink,group = "wled"; - ralink,function = "wled"; + groups = "wled"; + function = "wled"; }; }; rgmii1_pins: rgmii1 { rgmii1 { - ralink,group = "rgmii1"; - ralink,function = "rgmii1"; + groups = "rgmii1"; + function = "rgmii1"; }; }; rgmii2_pins: rgmii2 { rgmii2 { - ralink,group = "rgmii2"; - ralink,function = "rgmii2"; + groups = "rgmii2"; + function = "rgmii2"; }; }; pcie_pins: pcie { pcie { - ralink,group = "pcie"; - ralink,function = "pcie rst"; + groups = "pcie"; + function = "pcie rst"; + }; + }; + + pa_pins: pa { + pa { + groups = "pa"; + function = "pa"; + }; + }; + + pa_gpio_pins: pa_gpio { + pa { + groups = "pa"; + function = "gpio"; + }; + }; + + sdhci_pins: sdhci { + sdhci { + groups = "nd_sd"; + function = "sd"; }; }; }; @@ -403,8 +447,9 @@ usbphy: usbphy { compatible = "mediatek,mt7620-usbphy"; - #phy-cells = <1>; + #phy-cells = <0>; + ralink,sysctl = <&sysc>; resets = <&rstctrl 22 &rstctrl 25>; reset-names = "host", "device"; @@ -467,33 +512,50 @@ interrupt-parent = <&intc>; interrupts = <14>; + pinctrl-names = "default"; + pinctrl-0 = <&sdhci_pins>; + status = "disabled"; }; ehci: ehci@101c0000 { + #address-cells = <1>; + #size-cells = <0>; compatible = "generic-ehci"; reg = <0x101c0000 0x1000>; interrupt-parent = <&intc>; interrupts = <18>; - phys = <&usbphy 1>; + phys = <&usbphy>; phy-names = "usb"; status = "disabled"; + + ehci_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; }; ohci: ohci@101c1000 { + #address-cells = <1>; + #size-cells = <0>; compatible = "generic-ohci"; reg = <0x101c1000 0x1000>; interrupt-parent = <&intc>; interrupts = <18>; - phys = <&usbphy 1>; + phys = <&usbphy>; phy-names = "usb"; status = "disabled"; + + ohci_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; }; pcie: pcie@10140000 { @@ -526,13 +588,15 @@ status = "disabled"; - pcie-bridge { + pcie0: pcie@0,0 { reg = <0x0000 0 0 0 0>; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; + + ranges; }; };