X-Git-Url: http://git.openwrt.org/?a=blobdiff_plain;f=target%2Flinux%2Framips%2Fdts%2Fmt7620a.dtsi;h=a242684fd891ede36c55aef792b26a0edd52107b;hb=563a5b5f94b2fb36dce36f39bf6515e5bbb31245;hp=026e7458d3b6fb75c2b5ab10dee50e4e08e4ec99;hpb=948e67cb16f01b7d607154c296bc1068ea12ee88;p=openwrt%2Fstaging%2Fmkresin.git diff --git a/target/linux/ramips/dts/mt7620a.dtsi b/target/linux/ramips/dts/mt7620a.dtsi index 026e7458d3..a242684fd8 100644 --- a/target/linux/ramips/dts/mt7620a.dtsi +++ b/target/linux/ramips/dts/mt7620a.dtsi @@ -1,11 +1,15 @@ / { #address-cells = <1>; #size-cells = <1>; - compatible = "ralink,mtk7620a-soc"; + compatible = "ralink,mt7620a-soc"; cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { compatible = "mips,mips24KEc"; + reg = <0>; }; }; @@ -13,14 +17,20 @@ bootargs = "console=ttyS0,57600"; }; - cpuintc: cpuintc@0 { + cpuintc: cpuintc { #address-cells = <0>; #interrupt-cells = <1>; interrupt-controller; compatible = "mti,cpu-interrupt-controller"; }; - palmbus@10000000 { + aliases { + spi0 = &spi0; + spi1 = &spi1; + serial0 = &uartlite; + }; + + palmbus: palmbus@10000000 { compatible = "palmbus"; reg = <0x10000000 0x200000>; ranges = <0x0 0x10000000 0x1FFFFF>; @@ -28,12 +38,12 @@ #address-cells = <1>; #size-cells = <1>; - sysc@0 { - compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc"; + sysc: sysc@0 { + compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc", "syscon"; reg = <0x0 0x100>; }; - timer@100 { + timer: timer@100 { compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer"; reg = <0x100 0x20>; @@ -41,7 +51,7 @@ interrupts = <1>; }; - watchdog@120 { + watchdog: watchdog@120 { compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt"; reg = <0x120 0x10>; @@ -66,7 +76,7 @@ interrupts = <2>; }; - memc@300 { + memc: memc@300 { compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc"; reg = <0x300 0x100>; @@ -77,7 +87,7 @@ interrupts = <3>; }; - uart@500 { + uart: uart@500 { compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a"; reg = <0x500 0x100>; @@ -106,7 +116,7 @@ #gpio-cells = <2>; ralink,gpio-base = <0>; - ralink,num-gpios = <24>; + ralink,nr-gpio = <24>; ralink,register-map = [ 00 04 08 0c 20 24 28 2c 30 34 ]; @@ -123,7 +133,7 @@ #gpio-cells = <2>; ralink,gpio-base = <24>; - ralink,num-gpios = <16>; + ralink,nr-gpio = <16>; ralink,register-map = [ 00 04 08 0c 10 14 18 1c 20 24 ]; @@ -142,7 +152,7 @@ #gpio-cells = <2>; ralink,gpio-base = <40>; - ralink,num-gpios = <32>; + ralink,nr-gpio = <32>; ralink,register-map = [ 00 04 08 0c 10 14 18 1c 20 24 ]; @@ -161,7 +171,7 @@ #gpio-cells = <2>; ralink,gpio-base = <72>; - ralink,num-gpios = <1>; + ralink,nr-gpio = <1>; ralink,register-map = [ 00 04 08 0c 10 14 18 1c 20 24 ]; @@ -169,8 +179,8 @@ status = "disabled"; }; - i2c@900 { - compatible = "link,mt7620a-i2c", "ralink,rt2880-i2c"; + i2c: i2c@900 { + compatible = "ralink,rt2880-i2c"; reg = <0x900 0x100>; resets = <&rstctrl 16>; @@ -185,8 +195,8 @@ pinctrl-0 = <&i2c_pins>; }; - i2s@a00 { - compatible = "ralink,mt7620a-i2s"; + i2s: i2s@a00 { + compatible = "mediatek,mt7620-i2s"; reg = <0xa00 0x100>; resets = <&rstctrl 17>; @@ -195,16 +205,19 @@ interrupt-parent = <&intc>; interrupts = <10>; + txdma-req = <2>; + rxdma-req = <3>; + dmas = <&gdma 4>, - <&gdma 5>; + <&gdma 6>; dma-names = "tx", "rx"; status = "disabled"; }; - spi@b00 { + spi0: spi@b00 { compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi"; - reg = <0xb00 0x100>; + reg = <0xb00 0x40>; resets = <&rstctrl 18>; reset-names = "spi"; @@ -218,7 +231,23 @@ pinctrl-0 = <&spi_pins>; }; - uartlite@c00 { + spi1: spi@b40 { + compatible = "ralink,rt2880-spi"; + reg = <0xb40 0x60>; + + resets = <&rstctrl 18>; + reset-names = "spi"; + + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + + pinctrl-names = "default"; + pinctrl-0 = <&spi_cs1>; + }; + + uartlite: uartlite@c00 { compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a"; reg = <0xc00 0x100>; @@ -234,7 +263,7 @@ pinctrl-0 = <&uartlite_pins>; }; - systick@d00 { + systick: systick@d00 { compatible = "ralink,mt7620a-systick", "ralink,cevt-systick"; reg = <0xd00 0x10>; @@ -245,7 +274,7 @@ interrupts = <7>; }; - pcm@2000 { + pcm: pcm@2000 { compatible = "ralink,mt7620a-pcm"; reg = <0x2000 0x800>; @@ -259,7 +288,7 @@ }; gdma: gdma@2800 { - compatible = "ralink,mt7620a-gdma", "ralink,rt2880-gdma"; + compatible = "ralink,mt7620a-gdma", "ralink,rt3883-gdma"; reg = <0x2800 0x800>; resets = <&rstctrl 14>; @@ -276,7 +305,7 @@ }; }; - pinctrl { + pinctrl: pinctrl { compatible = "ralink,rt2880-pinmux"; pinctrl-names = "default"; pinctrl-0 = <&state_default>; @@ -298,6 +327,13 @@ }; }; + gpio_i2s_pins: gpio_i2s { + gpio_i2s { + ralink,group = "uartf"; + ralink,function = "gpio i2s"; + }; + }; + spi_pins: spi { spi { ralink,group = "spi"; @@ -305,6 +341,13 @@ }; }; + spi_cs1: spi1 { + spi1 { + ralink,group = "spi refclk"; + ralink,function = "spi refclk"; + }; + }; + i2c_pins: i2c { i2c { ralink,group = "i2c"; @@ -326,6 +369,13 @@ }; }; + mdio_refclk_pins: mdio_refclk { + mdio_refclk { + ralink,group = "mdio"; + ralink,function = "refclk"; + }; + }; + ephy_pins: ephy { ephy { ralink,group = "ephy"; @@ -360,6 +410,20 @@ ralink,function = "pcie rst"; }; }; + + pa_pins: pa { + pa { + ralink,group = "pa"; + ralink,function = "pa"; + }; + }; + + sdhci_pins: sdhci { + sdhci { + ralink,group = "nd_sd"; + ralink,function = "sd"; + }; + }; }; rstctrl: rstctrl { @@ -367,17 +431,26 @@ #reset-cells = <1>; }; + clkctrl: clkctrl { + compatible = "ralink,rt2880-clock"; + #clock-cells = <1>; + }; + usbphy: usbphy { - compatible = "ralink,mt7620a-usbphy"; - #phy-cells = <1>; + compatible = "mediatek,mt7620-usbphy"; + #phy-cells = <0>; + ralink,sysctl = <&sysc>; resets = <&rstctrl 22 &rstctrl 25>; reset-names = "host", "device"; + + clocks = <&clkctrl 22 &clkctrl 25>; + clock-names = "host", "device"; }; - ethernet@10100000 { - compatible = "ralink,mt7620a-eth"; - reg = <0x10100000 10000>; + ethernet: ethernet@10100000 { + compatible = "mediatek,mt7620-eth"; + reg = <0x10100000 0x10000>; #address-cells = <1>; #size-cells = <0>; @@ -388,15 +461,17 @@ resets = <&rstctrl 21 &rstctrl 23>; reset-names = "fe", "esw"; + mediatek,switch = <&gsw>; + port@4 { - compatible = "ralink,mt7620a-gsw-port", "ralink,eth-port"; + compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port"; reg = <4>; status = "disabled"; }; port@5 { - compatible = "ralink,mt7620a-gsw-port", "ralink,eth-port"; + compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port"; reg = <5>; status = "disabled"; @@ -410,9 +485,9 @@ }; }; - gsw@10110000 { - compatible = "ralink,mt7620a-gsw"; - reg = <0x10110000 8000>; + gsw: gsw@10110000 { + compatible = "mediatek,mt7620-gsw"; + reg = <0x10110000 0x8000>; resets = <&rstctrl 23>; reset-names = "esw"; @@ -421,43 +496,46 @@ interrupts = <17>; }; - sdhci@10130000 { + sdhci: sdhci@10130000 { compatible = "ralink,mt7620-sdhci"; - reg = <0x10130000 4000>; + reg = <0x10130000 0x4000>; interrupt-parent = <&intc>; interrupts = <14>; + pinctrl-names = "default"; + pinctrl-0 = <&sdhci_pins>; + status = "disabled"; }; - ehci@101c0000 { - compatible = "ralink,rt3xxx-ehci"; + ehci: ehci@101c0000 { + compatible = "generic-ehci"; reg = <0x101c0000 0x1000>; interrupt-parent = <&intc>; interrupts = <18>; - phys = <&usbphy 1>; + phys = <&usbphy>; phy-names = "usb"; status = "disabled"; }; - ohci@101c1000 { - compatible = "ralink,rt3xxx-ohci"; + ohci: ohci@101c1000 { + compatible = "generic-ohci"; reg = <0x101c1000 0x1000>; interrupt-parent = <&intc>; interrupts = <18>; - phys = <&usbphy 1>; + phys = <&usbphy>; phy-names = "usb"; status = "disabled"; }; - pcie@10140000 { + pcie: pcie@10140000 { compatible = "mediatek,mt7620-pci"; reg = <0x10140000 0x100 0x10142000 0x100>; @@ -468,6 +546,9 @@ resets = <&rstctrl 26>; reset-names = "pcie0"; + clocks = <&clkctrl 26>; + clock-names = "pcie0"; + interrupt-parent = <&cpuintc>; interrupts = <4>; @@ -484,19 +565,21 @@ status = "disabled"; - pcie-bridge { + pcie0: pcie@0,0 { reg = <0x0000 0 0 0 0>; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; + + ranges; }; }; - wmac@10180000 { + wmac: wmac@10180000 { compatible = "ralink,rt7620-wmac", "ralink,rt2880-wmac"; - reg = <0x10180000 40000>; + reg = <0x10180000 0x40000>; interrupt-parent = <&cpuintc>; interrupts = <6>;