X-Git-Url: http://git.openwrt.org/?a=blobdiff_plain;f=target%2Flinux%2Framips%2Fdts%2Fmt7620a.dtsi;h=a242684fd891ede36c55aef792b26a0edd52107b;hb=563a5b5f94b2fb36dce36f39bf6515e5bbb31245;hp=882cf8810417e94de059cdfbcef477a0d0b98bd6;hpb=b69ceb0c3d705143511fdc32cb92aedda29c7db3;p=openwrt%2Fstaging%2Fmkresin.git

diff --git a/target/linux/ramips/dts/mt7620a.dtsi b/target/linux/ramips/dts/mt7620a.dtsi
index 882cf88104..a242684fd8 100644
--- a/target/linux/ramips/dts/mt7620a.dtsi
+++ b/target/linux/ramips/dts/mt7620a.dtsi
@@ -1,11 +1,15 @@
 / {
 	#address-cells = <1>;
 	#size-cells = <1>;
-	compatible = "ralink,mtk7620a-soc";
+	compatible = "ralink,mt7620a-soc";
 
 	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
 		cpu@0 {
 			compatible = "mips,mips24KEc";
+			reg = <0>;
 		};
 	};
 
@@ -13,7 +17,7 @@
 		bootargs = "console=ttyS0,57600";
 	};
 
-	cpuintc: cpuintc@0 {
+	cpuintc: cpuintc {
 		#address-cells = <0>;
 		#interrupt-cells = <1>;
 		interrupt-controller;
@@ -35,7 +39,7 @@
 		#size-cells = <1>;
 
 		sysc: sysc@0 {
-			compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc";
+			compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc", "syscon";
 			reg = <0x0 0x100>;
 		};
 
@@ -112,7 +116,7 @@
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <0>;
-			ralink,num-gpios = <24>;
+			ralink,nr-gpio = <24>;
 			ralink,register-map = [ 00 04 08 0c
 						20 24 28 2c
 						30 34 ];
@@ -129,7 +133,7 @@
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <24>;
-			ralink,num-gpios = <16>;
+			ralink,nr-gpio = <16>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
@@ -148,7 +152,7 @@
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <40>;
-			ralink,num-gpios = <32>;
+			ralink,nr-gpio = <32>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
@@ -167,7 +171,7 @@
 			#gpio-cells = <2>;
 
 			ralink,gpio-base = <72>;
-			ralink,num-gpios = <1>;
+			ralink,nr-gpio = <1>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
@@ -339,8 +343,8 @@
 
 		spi_cs1: spi1 {
 			spi1 {
-				ralink,group = "spi_cs1";
-				ralink,function = "spi_cs1";
+				ralink,group = "spi refclk";
+				ralink,function = "spi refclk";
 			};
 		};
 
@@ -413,6 +417,13 @@
 				ralink,function = "pa";
 			};
 		};
+
+		sdhci_pins: sdhci {
+			sdhci {
+				ralink,group = "nd_sd";
+				ralink,function = "sd";
+			};
+		};
 	};
 
 	rstctrl: rstctrl {
@@ -427,8 +438,9 @@
 
 	usbphy: usbphy {
 		compatible = "mediatek,mt7620-usbphy";
-		#phy-cells = <1>;
+		#phy-cells = <0>;
 
+		ralink,sysctl = <&sysc>;
 		resets = <&rstctrl 22 &rstctrl 25>;
 		reset-names = "host", "device";
 
@@ -491,6 +503,9 @@
 		interrupt-parent = <&intc>;
 		interrupts = <14>;
 
+		pinctrl-names = "default";
+		pinctrl-0 = <&sdhci_pins>;
+
 		status = "disabled";
 	};
 
@@ -501,7 +516,7 @@
 		interrupt-parent = <&intc>;
 		interrupts = <18>;
 
-		phys = <&usbphy 1>;
+		phys = <&usbphy>;
 		phy-names = "usb";
 
 		status = "disabled";
@@ -514,7 +529,7 @@
 		interrupt-parent = <&intc>;
 		interrupts = <18>;
 
-		phys = <&usbphy 1>;
+		phys = <&usbphy>;
 		phy-names = "usb";
 
 		status = "disabled";
@@ -550,13 +565,15 @@
 
 		status = "disabled";
 
-		pcie-bridge {
+		pcie0: pcie@0,0 {
 			reg = <0x0000 0 0 0 0>;
 
 			#address-cells = <3>;
 			#size-cells = <2>;
 
 			device_type = "pci";
+
+			ranges;
 		};
 	};