X-Git-Url: http://git.openwrt.org/?a=blobdiff_plain;f=target%2Flinux%2Framips%2Fdts%2Fmt7620n_zbtlink_zbt-cpe102.dts;h=8e95ab9f09bdfdf3de3231bcc4ca05e9e126f411;hb=ec45f2f246363a4c2a84e51d0014848bf8c52e9f;hp=84a1de96f3b4f013ef2c6d8e13e308a70e27fe0e;hpb=22a21b0c18ebce7b7040ce693621f5c77983f3e5;p=openwrt%2Fopenwrt.git

diff --git a/target/linux/ramips/dts/mt7620n_zbtlink_zbt-cpe102.dts b/target/linux/ramips/dts/mt7620n_zbtlink_zbt-cpe102.dts
index 84a1de96f3..8e95ab9f09 100644
--- a/target/linux/ramips/dts/mt7620n_zbtlink_zbt-cpe102.dts
+++ b/target/linux/ramips/dts/mt7620n_zbtlink_zbt-cpe102.dts
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620n.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
@@ -22,17 +20,17 @@
 		compatible = "gpio-leds";
 
 		led_4g_0: 4g-0 {
-			label = "zbt-cpe102:green:4g-0";
+			label = "green:4g-0";
 			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
 		};
 
 		4g-1 {
-			label = "zbt-cpe102:green:4g-1";
+			label = "green:4g-1";
 			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
 		};
 
 		4g-2 {
-			label = "zbt-cpe102:green:4g-2";
+			label = "green:4g-2";
 			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
 		};
 	};
@@ -52,18 +50,10 @@
 	status = "okay";
 };
 
-&gpio2 {
-	status = "okay";
-};
-
-&gpio3 {
-	status = "okay";
-};
-
 &spi0 {
 	status = "okay";
 
-	en25q64@0 {
+	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <10000000>;
@@ -85,10 +75,24 @@
 				read-only;
 			};
 
-			factory: partition@40000 {
+			partition@40000 {
 				label = "factory";
 				reg = <0x40000 0x10000>;
 				read-only;
+
+				nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					eeprom_factory_0: eeprom@0 {
+						reg = <0x0 0x200>;
+					};
+
+					macaddr_factory_4: macaddr@4 {
+						reg = <0x4 0x6>;
+					};
+				};
 			};
 
 			partition@50000 {
@@ -109,12 +113,15 @@
 };
 
 &ethernet {
-	mtd-mac-address = <&factory 0x4>;
+	nvmem-cells = <&macaddr_factory_4>;
+	nvmem-cell-names = "mac-address";
+
 	mediatek,portmap = "wllll";
 };
 
 &wmac {
-	ralink,mtd-eeprom = <&factory 0x0>;
+	nvmem-cells = <&eeprom_factory_0>;
+	nvmem-cell-names = "eeprom";
 };
 
 &state_default {