X-Git-Url: http://git.openwrt.org/?a=blobdiff_plain;f=target%2Flinux%2Framips%2Fdts%2Fmt7628an.dtsi;h=97f77f6b38b82b70626ddcc790cf3d5c3c467a0c;hb=443e3bd1c6e61aa39f4fc176b22ad2d75f33bcb4;hp=03507eb5c562c2adede464d0afc8531cca726907;hpb=eb9fccc4404763192782a65aecd89baa280c276a;p=openwrt%2Fopenwrt.git

diff --git a/target/linux/ramips/dts/mt7628an.dtsi b/target/linux/ramips/dts/mt7628an.dtsi
index 03507eb5c5..97f77f6b38 100644
--- a/target/linux/ramips/dts/mt7628an.dtsi
+++ b/target/linux/ramips/dts/mt7628an.dtsi
@@ -1,11 +1,21 @@
+/dts-v1/;
+
 / {
 	#address-cells = <1>;
 	#size-cells = <1>;
-	compatible = "ralink,mtk7628an-soc";
+	compatible = "mediatek,mt7628an-soc";
+
+	aliases {
+		serial0 = &uartlite;
+	};
 
 	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
 		cpu@0 {
 			compatible = "mips,mips24KEc";
+			reg = <0>;
 		};
 	};
 
@@ -13,14 +23,14 @@
 		bootargs = "console=ttyS0,57600";
 	};
 
-	cpuintc: cpuintc@0 {
+	cpuintc: cpuintc {
 		#address-cells = <0>;
 		#interrupt-cells = <1>;
 		interrupt-controller;
 		compatible = "mti,cpu-interrupt-controller";
 	};
 
-	palmbus@10000000 {
+	palmbus: palmbus@10000000 {
 		compatible = "palmbus";
 		reg = <0x10000000 0x200000>;
 		ranges = <0x0 0x10000000 0x1FFFFF>;
@@ -28,29 +38,23 @@
 		#address-cells = <1>;
 		#size-cells = <1>;
 
-		sysc@0 {
-			compatible = "ralink,mt7620a-sysc";
+		sysc: syscon@0 {
+			compatible = "ralink,mt7628-sysc", "syscon";
 			reg = <0x0 0x100>;
+			#clock-cells = <1>;
+			#reset-cells = <1>;
 		};
 
-		watchdog@120 {
-			compatible = "ralink,mt7628an-wdt", "mtk,mt7621-wdt";
-			reg = <0x120 0x10>;
-
-			resets = <&rstctrl 8>;
-			reset-names = "wdt";
-
-			interrupt-parent = <&intc>;
-			interrupts = <24>;
+		watchdog: watchdog@100 {
+			compatible = "mediatek,mt7621-wdt";
+			reg = <0x100 0x100>;
+			mediatek,sysctl = <&sysc>;
 		};
 
 		intc: intc@200 {
 			compatible = "ralink,mt7628an-intc", "ralink,rt2880-intc";
 			reg = <0x200 0x100>;
 
-			resets = <&rstctrl 9>;
-			reset-names = "intc";
-
 			interrupt-controller;
 			#interrupt-cells = <1>;
 
@@ -62,54 +66,36 @@
 						 0x80 0x78>;
 		};
 
-		memc@300 {
+		memc: memc@300 {
 			compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
 			reg = <0x300 0x100>;
 
-			resets = <&rstctrl 20>;
-			reset-names = "mc";
-
 			interrupt-parent = <&intc>;
 			interrupts = <3>;
 		};
 
-		gpio@600 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			compatible = "mtk,mt7628-gpio", "mtk,mt7621-gpio";
+		gpio: gpio@600 {
+			compatible = "mediatek,mt7621-gpio";
 			reg = <0x600 0x100>;
 
 			interrupt-parent = <&intc>;
 			interrupts = <6>;
 
-			gpio0: bank@0 {
-				reg = <0>;
-				compatible = "mtk,mt7621-gpio-bank";
-				gpio-controller;
-				#gpio-cells = <2>;
-			};
-
-			gpio1: bank@1 {
-				reg = <1>;
-				compatible = "mtk,mt7621-gpio-bank";
-				gpio-controller;
-				#gpio-cells = <2>;
-			};
+			#interrupt-cells = <2>;
+			interrupt-controller;
 
-			gpio2: bank@2 {
-				reg = <2>;
-				compatible = "mtk,mt7621-gpio-bank";
-				gpio-controller;
-				#gpio-cells = <2>;
-			};
+			gpio-controller;
+			#gpio-cells = <2>;
 		};
 
-		i2c@900 {
-			compatible = "mediatek,mt7628-i2c";
+		i2c: i2c@900 {
+			compatible = "mediatek,mt7621-i2c";
 			reg = <0x900 0x100>;
 
-			resets = <&rstctrl 16>;
+			clocks = <&sysc 7>;
+			clock-names = "i2c";
+
+			resets = <&sysc 16>;
 			reset-names = "i2c";
 
 			#address-cells = <1>;
@@ -121,28 +107,36 @@
 			pinctrl-0 = <&i2c_pins>;
 		};
 
-		i2s@a00 {
-			compatible = "ralink,mt7620a-i2s";
+		i2s: i2s@a00 {
+			compatible = "mediatek,mt7628-i2s";
 			reg = <0xa00 0x100>;
 
-			resets = <&rstctrl 17>;
+			clocks = <&sysc 8>;
+
+			resets = <&sysc 17>;
 			reset-names = "i2s";
 
 			interrupt-parent = <&intc>;
 			interrupts = <10>;
 
-			dmas = <&gdma 2>,
-				<&gdma 3>;
+			txdma-req = <2>;
+			rxdma-req = <3>;
+
+			dmas = <&gdma 4>,
+				<&gdma 6>;
 			dma-names = "tx", "rx";
 
 			status = "disabled";
 		};
 
-		spi@b00 {
+		spi0: spi@b00 {
 			compatible = "ralink,mt7621-spi";
 			reg = <0xb00 0x100>;
 
-			resets = <&rstctrl 18>;
+			clocks = <&sysc 9>;
+			clock-names = "spi";
+
+			resets = <&sysc 18>;
 			reset-names = "spi";
 
 			#address-cells = <1>;
@@ -154,7 +148,7 @@
 			status = "disabled";
 		};
 
-		uartlite@c00 {
+		uartlite: uart0@c00 {
 			compatible = "ns16550a";
 			reg = <0xc00 0x100>;
 
@@ -162,8 +156,9 @@
 			reg-io-width = <4>;
 			no-loopback-test;
 
-			resets = <&rstctrl 12>;
-			reset-names = "uartl";
+			clocks = <&sysc 11>;
+
+			resets = <&sysc 12>;
 
 			interrupt-parent = <&intc>;
 			interrupts = <20>;
@@ -172,7 +167,7 @@
 			pinctrl-0 = <&uart0_pins>;
 		};
 
-		uart1@d00 {
+		uart1: uart1@d00 {
 			compatible = "ns16550a";
 			reg = <0xd00 0x100>;
 
@@ -180,8 +175,9 @@
 			reg-io-width = <4>;
 			no-loopback-test;
 
-			resets = <&rstctrl 19>;
-			reset-names = "uart1";
+			clocks = <&sysc 12>;
+
+			resets = <&sysc 19>;
 
 			interrupt-parent = <&intc>;
 			interrupts = <21>;
@@ -192,7 +188,7 @@
 			status = "disabled";
 		};
 
-		uart2@e00 {
+		uart2: uart2@e00 {
 			compatible = "ns16550a";
 			reg = <0xe00 0x100>;
 
@@ -200,8 +196,9 @@
 			reg-io-width = <4>;
 			no-loopback-test;
 
-			resets = <&rstctrl 20>;
-			reset-names = "uart2";
+			clocks = <&sysc 13>;
+
+			resets = <&sysc 20>;
 
 			interrupt-parent = <&intc>;
 			interrupts = <22>;
@@ -212,12 +209,10 @@
 			status = "disabled";
 		};
 
-		pwm@5000 {
+		pwm: pwm@5000 {
 			compatible = "mediatek,mt7628-pwm";
 			reg = <0x5000 0x1000>;
-
-			resets = <&rstctrl 31>;
-			reset-names = "pwm";
+			#pwm-cells = <2>;
 
 			pinctrl-names = "default";
 			pinctrl-0 = <&pwm0_pins>, <&pwm1_pins>;
@@ -225,11 +220,11 @@
 			status = "disabled";
 		};
 
-		pcm@2000 {
+		pcm: pcm@2000 {
 			compatible = "ralink,mt7620a-pcm";
 			reg = <0x2000 0x800>;
 
-			resets = <&rstctrl 11>;
+			resets = <&sysc 11>;
 			reset-names = "pcm";
 
 			interrupt-parent = <&intc>;
@@ -239,10 +234,10 @@
 		};
 
 		gdma: gdma@2800 {
-			compatible = "ralink,mt7620a-gdma", "ralink,rt2880-gdma";
+			compatible = "ralink,rt3883-gdma";
 			reg = <0x2800 0x800>;
 
-			resets = <&rstctrl 14>;
+			resets = <&sysc 14>;
 			reset-names = "dma";
 
 			interrupt-parent = <&intc>;
@@ -256,7 +251,7 @@
 		};
 	};
 
-	pinctrl {
+	pinctrl: pinctrl {
 		compatible = "ralink,rt2880-pinmux";
 		pinctrl-names = "default";
 		pinctrl-0 = <&state_default>;
@@ -264,93 +259,105 @@
 		state_default: pinctrl0 {
 		};
 
-		spi_pins: spi {
-			spi {
-				ralink,group = "spi";
-				ralink,function = "spi";
+		spi_pins: spi_pins {
+			spi_pins {
+				groups = "spi";
+				function = "spi";
 			};
 		};
 
 		spi_cs1_pins: spi_cs1 {
 			spi_cs1 {
-				ralink,group = "spi cs1";
-				ralink,function = "spi cs1";
+				groups = "spi cs1";
+				function = "spi cs1";
 			};
 		};
 
-		i2c_pins: i2c {
-			i2c {
-				ralink,group = "i2c";
-				ralink,function = "i2c";
+		i2c_pins: i2c_pins {
+			i2c_pins {
+				groups = "i2c";
+				function = "i2c";
+			};
+		};
+
+		i2s_pins: i2s {
+			i2s {
+				groups = "i2s";
+				function = "i2s";
 			};
 		};
 
 		uart0_pins: uartlite {
 			uartlite {
-				ralink,group = "uart0";
-				ralink,function = "uart0";
+				groups = "uart0";
+				function = "uart0";
 			};
 		};
 
 		uart1_pins: uart1 {
 			uart1 {
-				ralink,group = "uart1";
-				ralink,function = "uart1";
+				groups = "uart1";
+				function = "uart1";
 			};
 		};
 
 		uart2_pins: uart2 {
 			uart2 {
-				ralink,group = "uart2";
-				ralink,function = "uart2";
+				groups = "uart2";
+				function = "uart2";
 			};
 		};
 
 		sdxc_pins: sdxc {
 			sdxc {
-				ralink,group = "sdmode";
-				ralink,function = "sdxc";
+				groups = "sdmode";
+				function = "sdxc";
 			};
 		};
 
 		pwm0_pins: pwm0 {
 			pwm0 {
-				ralink,group = "pwm0";
-				ralink,function = "pwm0";
+				groups = "pwm0";
+				function = "pwm0";
 			};
 		};
 
 		pwm1_pins: pwm1 {
 			pwm1 {
-				ralink,group = "pwm1";
-				ralink,function = "pwm1";
+				groups = "pwm1";
+				function = "pwm1";
 			};
 		};
 
-		pcm_i2s_pins: i2s {
-			i2s {
-				ralink,group = "i2s";
-				ralink,function = "pcm";
+		pcm_i2s_pins: pcm_i2s {
+			pcm_i2s {
+				groups = "i2s";
+				function = "pcm";
 			};
 		};
-	};
 
-	rstctrl: rstctrl {
-		compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
-		#reset-cells = <1>;
+		refclk_pins: refclk {
+			refclk {
+				groups = "refclk";
+				function = "refclk";
+			};
+		};
 	};
 
-	usbphy: usbphy {
-		compatible = "ralink,mt7628an-usbphy", "mediatek,mt7620-usbphy";
-		#phy-cells = <1>;
+	usbphy: usbphy@10120000 {
+		compatible = "mediatek,mt7628-usbphy", "mediatek,mt7620-usbphy";
+		reg = <0x10120000 0x1000>;
+		#phy-cells = <0>;
 
-		resets = <&rstctrl 22 &rstctrl 25>;
+		ralink,sysctl = <&sysc>;
+		/* usb phy reset is only controled by RSTCTRL bit 22 */
+		resets = <&sysc 22>, <&sysc 25>;
 		reset-names = "host", "device";
 	};
 
-	sdhci@10130000 {
+	sdhci: sdhci@10130000 {
 		compatible = "ralink,mt7620-sdhci";
-		reg = <0x10130000 4000>;
+		reg = <0x10130000 0x4000>;
 
 		interrupt-parent = <&intc>;
 		interrupts = <14>;
@@ -361,53 +368,67 @@
 		status = "disabled";
 	};
 
-	ehci@101c0000 {
+	ehci: ehci@101c0000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
 		compatible = "generic-ehci";
 		reg = <0x101c0000 0x1000>;
 
-		phys = <&usbphy 1>;
+		phys = <&usbphy>;
 		phy-names = "usb";
 
 		interrupt-parent = <&intc>;
 		interrupts = <18>;
+
+		ehci_port1: port@1 {
+			reg = <1>;
+			#trigger-source-cells = <0>;
+		};
 	};
 
-	ohci@101c1000 {
+	ohci: ohci@101c1000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
 		compatible = "generic-ohci";
 		reg = <0x101c1000 0x1000>;
 
-		phys = <&usbphy 1>;
+		phys = <&usbphy>;
 		phy-names = "usb";
 
 		interrupt-parent = <&intc>;
 		interrupts = <18>;
+
+		ohci_port1: port@1 {
+			reg = <1>;
+			#trigger-source-cells = <0>;
+		};
 	};
 
-	ethernet@10100000 {
+	ethernet: ethernet@10100000 {
 		compatible = "ralink,rt5350-eth";
-		reg = <0x10100000 10000>;
+		reg = <0x10100000 0x10000>;
 
 		interrupt-parent = <&cpuintc>;
 		interrupts = <5>;
 
-		resets = <&rstctrl 21 &rstctrl 23>;
+		resets = <&sysc 21>, <&sysc 23>;
 		reset-names = "fe", "esw";
 
 		mediatek,switch = <&esw>;
 	};
 
 	esw: esw@10110000 {
-		compatible = "ralink,rt3050-esw";
-		reg = <0x10110000 8000>;
+		compatible = "mediatek,mt7628-esw", "ralink,rt3050-esw";
+		reg = <0x10110000 0x8000>;
 
-		resets = <&rstctrl 23>;
-		reset-names = "esw";
+		resets = <&sysc 24>;
+		reset-names = "ephy";
 
 		interrupt-parent = <&intc>;
 		interrupts = <17>;
 	};
 
-	pcie@10140000 {
+	pcie: pcie@10140000 {
 		compatible = "mediatek,mt7620-pci";
 		reg = <0x10140000 0x100
 			0x10142000 0x100>;
@@ -415,12 +436,12 @@
 		#address-cells = <3>;
 		#size-cells = <2>;
 
-		resets = <&rstctrl 26>;
-		reset-names = "pcie0";
-
 		interrupt-parent = <&cpuintc>;
 		interrupts = <4>;
 
+		resets = <&sysc 26>;
+		reset-names = "pcie0";
+
 		status = "disabled";
 
 		device_type = "pci";
@@ -431,13 +452,27 @@
 			0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
 		>;
 
-		pcie-bridge {
+		pcie0: pcie@0,0 {
 			reg = <0x0000 0 0 0 0>;
 
 			#address-cells = <3>;
 			#size-cells = <2>;
 
 			device_type = "pci";
+
+			ranges;
 		};
 	};
+
+	wmac: wmac@10300000 {
+		compatible = "mediatek,mt7628-wmac";
+		reg = <0x10300000 0x100000>;
+
+		clocks = <&sysc 14>;
+
+		interrupt-parent = <&cpuintc>;
+		interrupts = <6>;
+
+		status = "disabled";
+	};
 };