X-Git-Url: http://git.openwrt.org/?a=blobdiff_plain;f=target%2Flinux%2Framips%2Fdts%2Frt2880.dtsi;h=998b49a2770fb0097b8e819ef73526d46a12055a;hb=01996b785dcef61e6dadb50f61a13f905f3e497d;hp=2d6230c7ad2081b788c47c5a7259a5503ce402db;hpb=13c0d208b23ef82f870b55d965326f313bdbc27b;p=openwrt%2Fopenwrt.git

diff --git a/target/linux/ramips/dts/rt2880.dtsi b/target/linux/ramips/dts/rt2880.dtsi
index 2d6230c7ad..998b49a277 100644
--- a/target/linux/ramips/dts/rt2880.dtsi
+++ b/target/linux/ramips/dts/rt2880.dtsi
@@ -1,11 +1,21 @@
+/dts-v1/;
+
 / {
 	#address-cells = <1>;
 	#size-cells = <1>;
 	compatible = "ralink,rt2880-soc";
 
+	aliases {
+		serial0 = &uartlite;
+	};
+
 	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
 		cpu@0 {
 			compatible = "mips,mips24KEc";
+			reg = <0>;
 		};
 	};
 
@@ -13,11 +23,7 @@
 		bootargs = "console=ttyS0,57600";
 	};
 
-	aliases {
-		serial0 = &uartlite;
-	};
-
-	cpuintc: cpuintc@0 {
+	cpuintc: cpuintc {
 		#address-cells = <0>;
 		#interrupt-cells = <1>;
 		interrupt-controller;
@@ -32,15 +38,19 @@
 		#address-cells = <1>;
 		#size-cells = <1>;
 
-		sysc: sysc@0 {
-			compatible = "ralink,rt2880-sysc";
-			reg = <0x000 0x100>;
+		sysc: syscon@0 {
+			compatible = "ralink,rt2880-sysc", "syscon";
+			reg = <0x0 0x100>;
+			#clock-cells = <1>;
+			#reset-cells = <1>;
 		};
 
 		timer: timer@100 {
 			compatible = "ralink,rt2880-timer";
 			reg = <0x100 0x20>;
 
+			clocks = <&sysc 3>;
+
 			interrupt-parent = <&intc>;
 			interrupts = <1>;
 
@@ -50,6 +60,8 @@
 		watchdog: watchdog@120 {
 			compatible = "ralink,rt2880-wdt";
 			reg = <0x120 0x10>;
+
+			clocks = <&sysc 4>;
 		};
 
 		intc: intc@200 {
@@ -75,8 +87,8 @@
 			gpio-controller;
 			#gpio-cells = <2>;
 
+			ngpios = <24>;
 			ralink,gpio-base = <0>;
-			ralink,num-gpios = <24>;
 			ralink,register-map = [ 00 04 08 0c
 						20 24 28 2c
 						30 34 ];
@@ -89,8 +101,8 @@
 			gpio-controller;
 			#gpio-cells = <2>;
 
+			ngpios = <16>;
 			ralink,gpio-base = <24>;
-			ralink,num-gpios = <16>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
@@ -105,8 +117,8 @@
 			gpio-controller;
 			#gpio-cells = <2>;
 
+			ngpios = <32>;
 			ralink,gpio-base = <40>;
-			ralink,num-gpios = <32>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
@@ -118,7 +130,9 @@
 			compatible = "ralink,rt2880-i2c";
 			reg = <0x900 0x100>;
 
-			resets = <&rstctrl 9>;
+			clocks = <&sysc 6>;
+
+			resets = <&sysc 9>;
 			reset-names = "i2c";
 
 			#address-cells = <1>;
@@ -134,6 +148,8 @@
 			compatible = "ralink,rt2880-uart", "ns16550a";
 			reg = <0xc00 0x100>;
 
+			clocks = <&sysc 7>;
+
 			interrupt-parent = <&intc>;
 			interrupts = <8>;
 
@@ -149,48 +165,38 @@
 
 		state_default: pinctrl0 {
 			sdram {
-				ralink,group = "sdram";
-				ralink,function = "sdram";
+				groups = "sdram";
+				function = "sdram";
 			};
 		};
 
-		i2c_pins: i2c {
-			i2c {
-				ralink,group = "i2c";
-				ralink,function = "i2c";
+		i2c_pins: i2c_pins {
+			i2c_pins {
+				groups = "i2c";
+				function = "i2c";
 			};
 		};
 
-		spi_pins: spi {
-			spi {
-				ralink,group = "spi";
-				ralink,function = "spi";
+		spi_pins: spi_pins {
+			spi_pins {
+				groups = "spi";
+				function = "spi";
 			};
 		};
 
 		uartlite_pins: uartlite {
 			uart {
-				ralink,group = "uartlite";
-				ralink,function = "uartlite";
+				groups = "uartlite";
+				function = "uartlite";
 			};
 		};
 	};
 
-	rstctrl: rstctrl {
-		compatible = "ralink,rt2880-reset";
-		#reset-cells = <1>;
-	};
-
-	clkctrl: clkctrl {
-		compatible = "ralink,rt2880-clock";
-		#clock-cells = <1>;
-	};
-
 	pci: pci@440000 {
 		compatible = "ralink,rt288x-pci";
 		reg = <0x00440000 0x20000>;
-		#address-cells = <1>;
-		#size-cells = <1>;
+		#address-cells = <3>;
+		#size-cells = <2>;
 		status = "disabled";
 	};
 
@@ -201,7 +207,9 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		resets = <&rstctrl 18>;
+		clocks = <&sysc 8>;
+
+		resets = <&sysc 18>;
 		reset-names = "fe";
 
 		interrupt-parent = <&cpuintc>;
@@ -226,6 +234,8 @@
 		compatible = "ralink,rt2880-wmac";
 		reg = <0x480000 0x40000>;
 
+		clocks = <&sysc 9>;
+
 		interrupt-parent = <&cpuintc>;
 		interrupts = <6>;