X-Git-Url: http://git.openwrt.org/?a=blobdiff_plain;f=target%2Flinux%2Framips%2Fdts%2Frt2880.dtsi;h=998b49a2770fb0097b8e819ef73526d46a12055a;hb=01996b785dcef61e6dadb50f61a13f905f3e497d;hp=b02ef4f465f003bc561c65a0ae73619c80d758c9;hpb=d4520d75a142db901d748c4f07e3ff72916bfa91;p=openwrt%2Fopenwrt.git

diff --git a/target/linux/ramips/dts/rt2880.dtsi b/target/linux/ramips/dts/rt2880.dtsi
index b02ef4f465..998b49a277 100644
--- a/target/linux/ramips/dts/rt2880.dtsi
+++ b/target/linux/ramips/dts/rt2880.dtsi
@@ -38,15 +38,19 @@
 		#address-cells = <1>;
 		#size-cells = <1>;
 
-		sysc: sysc@0 {
-			compatible = "ralink,rt2880-sysc";
-			reg = <0x000 0x100>;
+		sysc: syscon@0 {
+			compatible = "ralink,rt2880-sysc", "syscon";
+			reg = <0x0 0x100>;
+			#clock-cells = <1>;
+			#reset-cells = <1>;
 		};
 
 		timer: timer@100 {
 			compatible = "ralink,rt2880-timer";
 			reg = <0x100 0x20>;
 
+			clocks = <&sysc 3>;
+
 			interrupt-parent = <&intc>;
 			interrupts = <1>;
 
@@ -56,6 +60,8 @@
 		watchdog: watchdog@120 {
 			compatible = "ralink,rt2880-wdt";
 			reg = <0x120 0x10>;
+
+			clocks = <&sysc 4>;
 		};
 
 		intc: intc@200 {
@@ -81,8 +87,8 @@
 			gpio-controller;
 			#gpio-cells = <2>;
 
+			ngpios = <24>;
 			ralink,gpio-base = <0>;
-			ralink,num-gpios = <24>;
 			ralink,register-map = [ 00 04 08 0c
 						20 24 28 2c
 						30 34 ];
@@ -95,8 +101,8 @@
 			gpio-controller;
 			#gpio-cells = <2>;
 
+			ngpios = <16>;
 			ralink,gpio-base = <24>;
-			ralink,num-gpios = <16>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
@@ -111,8 +117,8 @@
 			gpio-controller;
 			#gpio-cells = <2>;
 
+			ngpios = <32>;
 			ralink,gpio-base = <40>;
-			ralink,num-gpios = <32>;
 			ralink,register-map = [ 00 04 08 0c
 						10 14 18 1c
 						20 24 ];
@@ -124,7 +130,9 @@
 			compatible = "ralink,rt2880-i2c";
 			reg = <0x900 0x100>;
 
-			resets = <&rstctrl 9>;
+			clocks = <&sysc 6>;
+
+			resets = <&sysc 9>;
 			reset-names = "i2c";
 
 			#address-cells = <1>;
@@ -140,6 +148,8 @@
 			compatible = "ralink,rt2880-uart", "ns16550a";
 			reg = <0xc00 0x100>;
 
+			clocks = <&sysc 7>;
+
 			interrupt-parent = <&intc>;
 			interrupts = <8>;
 
@@ -182,16 +192,6 @@
 		};
 	};
 
-	rstctrl: rstctrl {
-		compatible = "ralink,rt2880-reset";
-		#reset-cells = <1>;
-	};
-
-	clkctrl: clkctrl {
-		compatible = "ralink,rt2880-clock";
-		#clock-cells = <1>;
-	};
-
 	pci: pci@440000 {
 		compatible = "ralink,rt288x-pci";
 		reg = <0x00440000 0x20000>;
@@ -207,7 +207,9 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		resets = <&rstctrl 18>;
+		clocks = <&sysc 8>;
+
+		resets = <&sysc 18>;
 		reset-names = "fe";
 
 		interrupt-parent = <&cpuintc>;
@@ -232,6 +234,8 @@
 		compatible = "ralink,rt2880-wmac";
 		reg = <0x480000 0x40000>;
 
+		clocks = <&sysc 9>;
+
 		interrupt-parent = <&cpuintc>;
 		interrupts = <6>;