X-Git-Url: http://git.openwrt.org/?a=blobdiff_plain;f=target%2Flinux%2Fsunxi%2Fpatches-3.14%2F112-dt-sun5i-rename-clocknodes.patch;h=d3e65a5e2c02372655084a22ad180027fc42c68c;hb=02629d8f87303a03e3ac36f48c508242d9b8cb09;hp=4ed1f2d59e710f5b5dabbb52489fa1d073fe9667;hpb=7be0ed78e7cf578aa89996d408703ea2ab79a1e8;p=openwrt%2Fopenwrt.git diff --git a/target/linux/sunxi/patches-3.14/112-dt-sun5i-rename-clocknodes.patch b/target/linux/sunxi/patches-3.14/112-dt-sun5i-rename-clocknodes.patch index 4ed1f2d59e..d3e65a5e2c 100644 --- a/target/linux/sunxi/patches-3.14/112-dt-sun5i-rename-clocknodes.patch +++ b/target/linux/sunxi/patches-3.14/112-dt-sun5i-rename-clocknodes.patch @@ -14,11 +14,9 @@ Signed-off-by: Maxime Ripard arch/arm/boot/dts/sun5i-a13.dtsi | 30 ++++++++++++++++++++---------- 2 files changed, 40 insertions(+), 20 deletions(-) -diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi -index 848baaa..99a5120 100644 --- a/arch/arm/boot/dts/sun5i-a10s.dtsi +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi -@@ -51,34 +51,38 @@ +@@ -47,34 +47,38 @@ clock-frequency = <0>; }; @@ -62,7 +60,7 @@ index 848baaa..99a5120 100644 #clock-cells = <1>; compatible = "allwinner,sun4i-pll5-clk"; reg = <0x01c20020 0x4>; -@@ -86,7 +90,7 @@ +@@ -82,7 +86,7 @@ clock-output-names = "pll5_ddr", "pll5_other"; }; @@ -71,7 +69,7 @@ index 848baaa..99a5120 100644 #clock-cells = <1>; compatible = "allwinner,sun4i-pll6-clk"; reg = <0x01c20028 0x4>; -@@ -100,6 +104,7 @@ +@@ -96,6 +100,7 @@ compatible = "allwinner,sun4i-cpu-clk"; reg = <0x01c20054 0x4>; clocks = <&osc32k>, <&osc24M>, <&pll1>, <&dummy>; @@ -79,7 +77,7 @@ index 848baaa..99a5120 100644 }; axi: axi@01c20054 { -@@ -107,9 +112,10 @@ +@@ -103,9 +108,10 @@ compatible = "allwinner,sun4i-axi-clk"; reg = <0x01c20054 0x4>; clocks = <&cpu>; @@ -91,7 +89,7 @@ index 848baaa..99a5120 100644 #clock-cells = <1>; compatible = "allwinner,sun4i-axi-gates-clk"; reg = <0x01c2005c 0x4>; -@@ -122,9 +128,10 @@ +@@ -118,9 +124,10 @@ compatible = "allwinner,sun4i-ahb-clk"; reg = <0x01c20054 0x4>; clocks = <&axi>; @@ -103,7 +101,7 @@ index 848baaa..99a5120 100644 #clock-cells = <1>; compatible = "allwinner,sun5i-a10s-ahb-gates-clk"; reg = <0x01c20060 0x8>; -@@ -143,9 +150,10 @@ +@@ -139,9 +146,10 @@ compatible = "allwinner,sun4i-apb0-clk"; reg = <0x01c20054 0x4>; clocks = <&ahb>; @@ -115,7 +113,7 @@ index 848baaa..99a5120 100644 #clock-cells = <1>; compatible = "allwinner,sun5i-a10s-apb0-gates-clk"; reg = <0x01c20068 0x4>; -@@ -159,6 +167,7 @@ +@@ -155,6 +163,7 @@ compatible = "allwinner,sun4i-apb1-mux-clk"; reg = <0x01c20058 0x4>; clocks = <&osc24M>, <&pll6 1>, <&osc32k>; @@ -123,7 +121,7 @@ index 848baaa..99a5120 100644 }; apb1: apb1@01c20058 { -@@ -166,9 +175,10 @@ +@@ -162,9 +171,10 @@ compatible = "allwinner,sun4i-apb1-clk"; reg = <0x01c20058 0x4>; clocks = <&apb1_mux>; @@ -135,8 +133,6 @@ index 848baaa..99a5120 100644 #clock-cells = <1>; compatible = "allwinner,sun5i-a10s-apb1-gates-clk"; reg = <0x01c2006c 0x4>; -diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi -index d8207b0..b776baa 100644 --- a/arch/arm/boot/dts/sun5i-a13.dtsi +++ b/arch/arm/boot/dts/sun5i-a13.dtsi @@ -52,34 +52,38 @@ @@ -256,6 +252,3 @@ index d8207b0..b776baa 100644 #clock-cells = <1>; compatible = "allwinner,sun5i-a13-apb1-gates-clk"; reg = <0x01c2006c 0x4>; --- -2.0.3 -