revert to vlynq bus clock divisor guessing
authorNicolas Thill <nico@openwrt.org>
Mon, 1 Oct 2007 10:16:14 +0000 (10:16 +0000)
committerNicolas Thill <nico@openwrt.org>
Mon, 1 Oct 2007 10:16:14 +0000 (10:16 +0000)
commit05f07554267ea9c054c6b2b05628c85330cf894f
treeb257323c3f786073b63b8be5259a94e41dd187ba
parentffec4f291341a1e158b8c13d51219fa7ecfae244
revert to vlynq bus clock divisor guessing

SVN-Revision: 9086
target/linux/ar7/files/arch/mips/ar7/vlynq-pci.c