ag71xx: add F1E specific feature bit definitions to AR934X register file
authorGabor Juhos <juhosg@openwrt.org>
Fri, 29 Nov 2013 20:18:43 +0000 (20:18 +0000)
committerGabor Juhos <juhosg@openwrt.org>
Fri, 29 Nov 2013 20:18:43 +0000 (20:18 +0000)
commit1167f92ac63facf940024ce11357c14ca63924f8
tree93c3999ef9939c71db827441dc71d996bb4aafc7
parentcad52577320e506985f3925e3f1ab3acdf24266b
ag71xx: add F1E specific feature bit definitions to AR934X register file

The F1E Phy (AR8035?) requires additional bits to be
set in order to provide a fast and reliable connection
over gigabit links.

When enabled, the link doesn't suffer anymore from a small
package loss under load and the performance is improved
quite a bit as well. (203 mbit/s vs 112 mbit/s, iperf tcp).

Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Patchwork: http://patchwork.openwrt.org/patch/4460/
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 38948
target/linux/ar71xx/patches-3.10/601-MIPS-ath79-add-more-register-defines.patch