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| author | John Crispin | 2024-04-06 17:17:05 +0000 |
|---|---|---|
| committer | John Crispin | 2024-05-21 08:26:06 +0000 |
| commit | 9746b6f1fca58bc5ae45657e418f928405a23a27 (patch) | |
| tree | 44e13265804aa36cfc6608842c9b1823cadfa913 | |
| parent | 6e060300fcadcda31f7ce539199b1ca35601304e (diff) | |
| download | dangole-9746b6f1fca58bc5ae45657e418f928405a23a27.tar.gz | |
uboot-mediatek: add USB support to mt7981.dtsi
Signed-off-by: John Crispin <john@phrozen.org>
| -rw-r--r-- | package/boot/uboot-mediatek/patches/290-mt7981-add-USB-nodes.patch | 76 |
1 files changed, 76 insertions, 0 deletions
diff --git a/package/boot/uboot-mediatek/patches/290-mt7981-add-USB-nodes.patch b/package/boot/uboot-mediatek/patches/290-mt7981-add-USB-nodes.patch new file mode 100644 index 0000000000..574b541bfe --- /dev/null +++ b/package/boot/uboot-mediatek/patches/290-mt7981-add-USB-nodes.patch @@ -0,0 +1,76 @@ +From cca5775031e4890f195246772e00f7f4ae7438f6 Mon Sep 17 00:00:00 2001 +From: John Crispin <john@phrozen.org> +Date: Mon, 19 Feb 2024 05:52:24 +0100 +Subject: [PATCH 1/2] mt7981.dtsi: add USB nodes + +Signed-off-by: John Crispin <john@phrozen.org> +--- + arch/arm/dts/mt7981.dtsi | 47 ++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 47 insertions(+) + +diff --git a/arch/arm/dts/mt7981.dtsi b/arch/arm/dts/mt7981.dtsi +index bda80ac9..6f4e5b9f 100644 +--- a/arch/arm/dts/mt7981.dtsi ++++ b/arch/arm/dts/mt7981.dtsi +@@ -6,6 +6,7 @@ + + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> ++#include <dt-bindings/phy/phy.h> + #include <dt-bindings/clock/mt7981-clk.h> + #include <dt-bindings/reset/mt7629-reset.h> + #include <dt-bindings/pinctrl/mt65xx.h> +@@ -342,4 +343,50 @@ + status = "disabled"; + }; + ++ xhci: xhci@11200000 { ++ compatible = "mediatek,mt7981-xhci", ++ "mediatek,mtk-xhci"; ++ reg = <0x11200000 0x2e00>, ++ <0x11203e00 0x0100>; ++ reg-names = "mac", "ippc"; ++ interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; ++ phys = <&u2port0 PHY_TYPE_USB2>, ++ <&u3port0 PHY_TYPE_USB3>; ++ clocks = <&infracfg_ao CK_INFRA_IUSB_SYS_CK>, ++ <&infracfg_ao CK_INFRA_IUSB_CK>, ++ <&infracfg_ao CK_INFRA_IUSB_133_CK>, ++ <&infracfg_ao CK_INFRA_IUSB_66M_CK>, ++ <&topckgen CK_TOP_U2U3_XHCI_SEL>; ++ clock-names = "sys_ck", ++ "ref_ck", ++ "mcu_ck", ++ "dma_ck", ++ "xhci_ck"; ++ mediatek,u3p-dis-msk = <0x1>; ++ status = "okay"; ++ }; ++ ++ usbtphy: usb-phy@11e10000 { ++ compatible = "mediatek,mt7981", ++ "mediatek,generic-tphy-v2"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ status = "okay"; ++ ++ u2port0: usb-phy@11e10000 { ++ reg = <0x11e10000 0x700>; ++ clocks = <&topckgen CK_TOP_USB_FRMCNT_SEL>; ++ clock-names = "ref"; ++ #phy-cells = <1>; ++ status = "okay"; ++ }; ++ ++ u3port0: usb-phy@11e10700 { ++ reg = <0x11e10700 0x900>; ++ clocks = <&topckgen CK_TOP_USB3_PHY_SEL>; ++ clock-names = "ref"; ++ #phy-cells = <1>; ++ status = "okay"; ++ }; ++ }; + }; +-- +2.34.1 + |