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ARM: socfpga: stratix10: Disable FPGA2SOC reset
authorAng, Chee Hong <chee.hong.ang@intel.com>
Fri, 3 May 2019 08:19:08 +0000 (01:19 -0700)
committerMarek Vasut <marex@denx.de>
Mon, 6 May 2019 10:44:45 +0000 (12:44 +0200)
commita03e9d9fe5e2645be1c053b2765cfe6a9126d362
tree7bd7bbed5c8f5dbbee3934e8484a22f7c89b4248tree | snapshot
parent6bf238a46192bf9164da4548178d657dde4e1c96commit | diff
ARM: socfpga: stratix10: Disable FPGA2SOC reset

Software must never reset FPGA2SOC bridge. This bridge must only be
reset by POR/COLD/WARM reset. Asserting the FPGA2SOC reset by software
can cause the SoC to lock-up if there are traffics being drived into
FPGA2SOC bridge.

Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
arch/arm/mach-socfpga/include/mach/reset_manager_s10.h diff | blob | history
arch/arm/mach-socfpga/reset_manager_s10.c diff | blob | history
Broadcom-s U-Boot