fix SPI message control handling for BCM6338/6348
authorFlorian Fainelli <florian@openwrt.org>
Sun, 17 Jun 2012 16:17:29 +0000 (16:17 +0000)
committerFlorian Fainelli <florian@openwrt.org>
Sun, 17 Jun 2012 16:17:29 +0000 (16:17 +0000)
commitb89c81929e462e66e953dddd91429be49c69e439
treed28b9c6f06ca13f0fa3de8ff61328a3062bca55b
parent89701ec518741ab8a550eeb48e9d840abcab0dbb
fix SPI message control handling for BCM6338/6348

BCM6338 and BCM6338 have their MSG_CONTROL register width of 8-bits instead of
16-bits. We were previously using a 16-bits write which corrupted the first
byte of the TX FIFO. Also the message type was always set to Full-duplex even
in the case of half-duplex messages.

SVN-Revision: 32409
target/linux/brcm63xx/patches-3.3/016-spi-bcm63xx-fix-bcm6348-38.patch [new file with mode: 0644]
target/linux/brcm63xx/patches-3.3/103-MIPS-BCM63XX-add-TRNG-peripheral-definitions.patch
target/linux/brcm63xx/patches-3.3/311-MIPS-BCM63XX-add-MISC-register-set-definition.patch
target/linux/brcm63xx/patches-3.3/316-MIPS-BCM63XX-Add-PCIe-register-set-definitions.patch
target/linux/brcm63xx/patches-3.3/419-SPI-MIPS-BCM63XX-Add-HS-SPI-driver.patch