+/* Support CPU frequency accessors only when the tag format has been asserted */
+#if defined(CONFIG_ATH79)
+static struct sc_u32tvs const sc_cpufreq_indexes_ath79[] = {
+ RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_D2, "-2"),
+ RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_D1, "-1"),
+ RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_N0, "0"),
+ RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_U1, "+1"),
+ RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_U2, "+2"),
+ RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_U3, "+3"),
+};
+
+static int sc_tag_cpufreq_ath79_idxmax(void)
+{
+ int idx_max = -EOPNOTSUPP;
+
+ if (soc_is_ar9344())
+ idx_max = RB_CPU_FREQ_IDX_ATH79_AR9334_MAX;
+ else if (soc_is_qca953x())
+ idx_max = RB_CPU_FREQ_IDX_ATH79_QCA953X_MAX;
+ else if (soc_is_qca9556())
+ idx_max = RB_CPU_FREQ_IDX_ATH79_QCA9556_MAX;
+ else if (soc_is_qca9558())
+ idx_max = RB_CPU_FREQ_IDX_ATH79_QCA9558_MAX;
+
+ return idx_max;
+}
+
+static ssize_t sc_tag_show_cpufreq_indexes(const u8 *pld, u16 pld_len, char * buf)
+{
+ return sc_tag_show_u32tvs(pld, pld_len, buf, sc_cpufreq_indexes_ath79, sc_tag_cpufreq_ath79_idxmax()+1);
+}
+
+static ssize_t sc_tag_store_cpufreq_indexes(const u8 *pld, u16 pld_len, const char *buf, size_t count)
+{
+ return sc_tag_store_u32tvs(pld, pld_len, buf, count, sc_cpufreq_indexes_ath79, sc_tag_cpufreq_ath79_idxmax()+1);
+}
+#else
+ /* By default we only show the raw value to help with reverse-engineering */
+ #define sc_tag_show_cpufreq_indexes routerboot_tag_show_u32s
+ #define sc_tag_store_cpufreq_indexes NULL
+#endif
+