-+static void mt7621_spi_read_half_duplex(struct mt7621_spi *rs,
-+ int rx_len, u8 *buf)
-+{
-+ /* Combine with any pending write, and perform one or
-+ * more half-duplex transactions reading 'len' bytes.
-+ * Data to be written is already in MT7621_SPI_DATA*
-+ */
-+ int tx_len = rs->pending_write;
-+
-+ rs->pending_write = 0;
-+
-+ while (rx_len || tx_len) {
-+ int i;
-+ u32 val = (min(tx_len, 4) * 8) << 24;
-+ int rx = min(rx_len, 32);
-+
-+ if (tx_len > 4)
-+ val |= (tx_len - 4) * 8;
-+ val |= (rx * 8) << 12;
-+ mt7621_spi_write(rs, MT7621_SPI_MOREBUF, val);
-+
-+ tx_len = 0;
-+
-+ val = mt7621_spi_read(rs, MT7621_SPI_TRANS);
-+ val |= SPI_CTL_START;
-+ mt7621_spi_write(rs, MT7621_SPI_TRANS, val);
-+
-+ mt7621_spi_wait_till_ready(rs);
-+
-+ for (i = 0; i < rx; i++) {
-+ if ((i % 4) == 0)
-+ val = mt7621_spi_read(rs, MT7621_SPI_DATA0 + i);
-+ *buf++ = val & 0xff;
-+ val >>= 8;
-+ }
-+ rx_len -= i;
-+ }
-+}
-+
-+static inline void mt7621_spi_flush(struct mt7621_spi *rs)
-+{
-+ mt7621_spi_read_half_duplex(rs, 0, NULL);
-+}
-+
-+static void mt7621_spi_write_half_duplex(struct mt7621_spi *rs,
-+ int tx_len, const u8 *buf)
-+{
-+ int val = 0;
-+ int len = rs->pending_write;
-+
-+ if (len & 3) {
-+ val = mt7621_spi_read(rs, MT7621_SPI_OPCODE + (len & ~3));
-+ if (len < 4) {
-+ val <<= (4 - len) * 8;
-+ val = swab32(val);
-+ }
-+ }
-+
-+ while (tx_len > 0) {
-+ if (len >= 36) {
-+ rs->pending_write = len;
-+ mt7621_spi_flush(rs);
-+ len = 0;
-+ }
-+
-+ val |= *buf++ << (8 * (len & 3));
-+ len++;
-+ if ((len & 3) == 0) {
-+ if (len == 4)
-+ /* The byte-order of the opcode is weird! */
-+ val = swab32(val);
-+ mt7621_spi_write(rs, MT7621_SPI_OPCODE + len - 4, val);
-+ val = 0;
-+ }
-+ tx_len -= 1;
-+ }
-+ if (len & 3) {
-+ if (len < 4) {
-+ val = swab32(val);
-+ val >>= (4 - len) * 8;
-+ }
-+ mt7621_spi_write(rs, MT7621_SPI_OPCODE + (len & ~3), val);
-+ }
-+ rs->pending_write = len;
-+}
-+