Due to datasheet of rt3883 SoC rgmii1 port handles pins 84-95 and rgmii2 port handles pins 72-83. When this function ports gets added to rt3883_pinmux_data there's wrong pinmux bits set (RT3883_GPIO_MODE_GE1 manages 84-95 pins and RT3883_GPIO_MODE_GE2 manages 72-83). So when enabling rgmii2 as GPIO driver confuses hardware and nothing work, neither rgmii nor gpio.
Also in '0030-pinctrl-ralink-add-pinctrl-driver.patch' typo in name of rgmii2 port.
Signed-off-by: Nick Leiten <nickleiten@gmail.com>
SVN-Revision: 47118
+ FUNC("pci-host1", 2, 40, 32),
+ FUNC("pci-fnc", 3, 40, 32)
};
+ FUNC("pci-host1", 2, 40, 32),
+ FUNC("pci-fnc", 3, 40, 32)
};
-+static struct rt2880_pmx_func ge1_func[] = { FUNC("ge1", 0, 72, 12) };
-+static struct rt2880_pmx_func ge2_func[] = { FUNC("ge1", 0, 84, 12) };
++static struct rt2880_pmx_func ge1_func[] = { FUNC("ge1", 0, 84, 12) };
++static struct rt2880_pmx_func ge2_func[] = { FUNC("ge2", 0, 72, 12) };
-static struct ralink_pinmux_grp pci_mux[] = {
- {
-static struct ralink_pinmux_grp pci_mux[] = {
- {