generic: ar8316: allow to configure port 6 via platform data on AR8327
authorGabor Juhos <juhosg@openwrt.org>
Sat, 22 Dec 2012 12:12:37 +0000 (12:12 +0000)
committerGabor Juhos <juhosg@openwrt.org>
Sat, 22 Dec 2012 12:12:37 +0000 (12:12 +0000)
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 34847

target/linux/generic/files/drivers/net/phy/ar8216.c
target/linux/generic/files/include/linux/ar8216_platform.h

index f20cc281bf06481ff5096f4dd09afe9809a3b0e9..e47a7da289ae3901e32ee1f5e637adc9cda50c85 100644 (file)
@@ -1074,19 +1074,13 @@ ar8327_init_globals(struct ar8216_priv *priv)
 }
 
 static void
-ar8327_init_cpuport(struct ar8216_priv *priv)
+ar8327_config_port(struct ar8216_priv *priv, unsigned int port,
+                   struct ar8327_port_cfg *cfg)
 {
-       struct ar8327_platform_data *pdata;
-       struct ar8327_port_cfg *cfg;
        u32 t;
 
-       pdata = priv->phy->dev.platform_data;
-       if (!pdata)
-               return;
-
-       cfg = &pdata->port0_cfg;
-       if (!cfg->force_link) {
-               priv->write(priv, AR8327_REG_PORT_STATUS(AR8216_PORT_CPU),
+       if (!cfg || !cfg->force_link) {
+               priv->write(priv, AR8327_REG_PORT_STATUS(port),
                            AR8216_PORT_STATUS_LINK_AUTO);
                return;
        }
@@ -1095,6 +1089,7 @@ ar8327_init_cpuport(struct ar8216_priv *priv)
        t |= cfg->duplex ? AR8216_PORT_STATUS_DUPLEX : 0;
        t |= cfg->rxpause ? AR8216_PORT_STATUS_RXFLOW : 0;
        t |= cfg->txpause ? AR8216_PORT_STATUS_TXFLOW : 0;
+
        switch (cfg->speed) {
        case AR8327_PORT_SPEED_10:
                t |= AR8216_PORT_SPEED_10M;
@@ -1107,21 +1102,27 @@ ar8327_init_cpuport(struct ar8216_priv *priv)
                break;
        }
 
-       priv->write(priv, AR8327_REG_PORT_STATUS(AR8216_PORT_CPU), t);
+       priv->write(priv, AR8327_REG_PORT_STATUS(port), t);
 }
 
 static void
 ar8327_init_port(struct ar8216_priv *priv, int port)
 {
+       struct ar8327_platform_data *pdata;
+       struct ar8327_port_cfg *cfg;
        u32 t;
 
-       if (port == AR8216_PORT_CPU) {
-               ar8327_init_cpuport(priv);
-       } else {
-               t = AR8216_PORT_STATUS_LINK_AUTO;
-               priv->write(priv, AR8327_REG_PORT_STATUS(port), t);
-       }
+       pdata = priv->phy->dev.platform_data;
+
+       if (pdata && port == AR8216_PORT_CPU)
+               cfg = &pdata->port0_cfg;
+       else if (pdata && port == 6)
+               cfg = &pdata->port6_cfg;
+       else
+               cfg = NULL;
 
+       ar8327_config_port(priv, port, cfg);
+       
        priv->write(priv, AR8327_REG_PORT_HEADER(port), 0);
 
        priv->write(priv, AR8327_REG_PORT_VLAN0(port), 0);
index f1673dbb53d4dd0777fe9a6b6dd3a4dd7367f6b4..5c75777fc3f6335a9634f95fc18694bdeba8c18b 100644 (file)
@@ -75,6 +75,7 @@ struct ar8327_platform_data {
        struct ar8327_pad_cfg *pad5_cfg;
        struct ar8327_pad_cfg *pad6_cfg;
        struct ar8327_port_cfg port0_cfg;
+       struct ar8327_port_cfg port6_cfg;
        struct ar8327_led_cfg *led_cfg;
 };