diff options
| author | Jonas Jelonek | 2026-01-26 23:20:26 +0000 |
|---|---|---|
| committer | Hauke Mehrtens | 2026-02-04 00:08:25 +0000 |
| commit | 0d2d9ecb7fac92c9afffeefbb8e673622eb83d38 (patch) | |
| tree | bf78918a3ef57301999505d8ebb68040e2a89ae4 | |
| parent | fb2388837690826f019fdb7870730c1530820df0 (diff) | |
| download | nbd-0d2d9ecb7fac92c9afffeefbb8e673622eb83d38.tar.gz | |
realtek: pcs: rtl93xx: handle XSGMII autoneg
The XSGMII mode is special in several regards. The inband
autonegotiation for this mode is called 'XSG N-way'. It is controlled
using different bits and location, and using XSG operations.
Add support for this by enhancing the set_autoneg implementation shared
by RTL930x and RTL931x. This can stay shared since it works the same for
both variants.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21762
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
| -rw-r--r-- | target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c b/target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c index 234e324c3e..a9c84b4687 100644 --- a/target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c +++ b/target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c @@ -948,9 +948,18 @@ static int rtpcs_839x_setup_serdes(struct rtpcs_serdes *sds, static int rtpcs_93xx_sds_set_autoneg(struct rtpcs_serdes *sds, unsigned int neg_mode) { - u16 bmcr = neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED ? BMCR_ANENABLE : 0; + u16 bmcr, en_val; - return rtpcs_sds_modify(sds, 2, MII_BMCR, BMCR_ANENABLE, bmcr); + switch (sds->hw_mode) { + case RTPCS_SDS_MODE_XSGMII: /* XSG N-way state */ + en_val = neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED ? 0x0 : 0x1; + + return rtpcs_sds_xsg_write_bits(sds, 0x0, 0x2, 9, 8, en_val); + default: + bmcr = neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED ? BMCR_ANENABLE : 0; + + return rtpcs_sds_modify(sds, 0x2, MII_BMCR, BMCR_ANENABLE, bmcr); + } } /* RTL930X */ |