If the dcxo clock-freq is not set, the uart3 and uart5 serials will not be
initialized and the kernel will freeze.
[ 0.990726] dw-apb-uart
2500c00.serial: error -EINVAL: clock rate not defined
[ 0.998714] dw-apb-uart: probe of
2500c00.serial failed with error -22
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
diff -ruN linux-6.1.32/arch/arm/boot/dts.old/sun8i-t113s-myir-myd-yt113x.dts linux-6.1.32/arch/arm/boot/dts/sun8i-t113s-myir-myd-yt113x.dts
--- linux-6.1.32/arch/arm/boot/dts.old/sun8i-t113s-myd-yt113x.dts 1970-01-01 01:00:00.000000000 +0100
+++ linux-6.1.32/arch/arm/boot/dts/sun8i-t113s-myd-yt113x.dts 2023-06-08 13:57:21.610411139 +0200
-@@ -0,0 +1,134 @@
+@@ -0,0 +1,138 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+// Copyright (C) 2022 Arm Ltd.
+
+ cpu-supply = <®_vcc_core>;
+};
+
++&dcxo {
++ clock-frequency = <24000000>;
++};
++
+&pio {
+ vcc-pb-supply = <®_3v3>;
+ vcc-pd-supply = <®_3v3>;
diff -ruN linux-6.1.32/arch/arm/boot/dts.old/sun8i-t113s-rp-t113.dts linux-6.1.32/arch/arm/boot/dts/sun8i-t113s-rp-t113.dts
--- linux-6.1.32/arch/arm/boot/dts.old/sun8i-t113s-rp-t113.dts 1970-01-01 01:00:00.000000000 +0100
+++ linux-6.1.32/arch/arm/boot/dts/sun8i-t113s-rp-t113.dts 2023-06-08 16:01:03.634815225 +0200
-@@ -0,0 +1,134 @@
+@@ -0,0 +1,138 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+// Copyright (C) 2022 Arm Ltd.
+
+ cpu-supply = <®_vcc_core>;
+};
+
++&dcxo {
++ clock-frequency = <24000000>;
++};
++
+&pio {
+ vcc-pb-supply = <®_3v3>;
+ vcc-pd-supply = <®_3v3>;