qualcommbe: ipq95xx: Refresh the NSSCC and PORT patch for new PCIe patches

Refresh the NSSCC patch for new PCIe patches. To keep track of fuzz
changes for the IPQ95xx patches, patch are not refreshed currently.

For the specific case of NSSCC patch, quilt gets confused and apply the
patch in the wrong node, putting it in the RPM node (causing all kind of
funny errors at runtime)

Correctly fix the patch to put the node right after the PCIe nodes.

Also the PORT patch need to be refreshed as the gpio header is added by
the PCIe patch.

Link: https://github.com/openwrt/openwrt/pull/17788
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>

7 files changed, 20 insertions, 21 deletions

diff --git a/target/linux/qualcommbe/patches-6.6/105-06-arm64-dts-qcom-ipq9574-Add-nsscc-node.patch b/target/linux/qualcommbe/patches-6.6/105-06-arm64-dts-qcom-ipq9574-Add-nsscc-node.patch
index 3ec23307b0..9aba070e63 100644
--- a/target/linux/qualcommbe/patches-6.6/105-06-arm64-dts-qcom-ipq9574-Add-nsscc-node.patch
+++ b/target/linux/qualcommbe/patches-6.6/105-06-arm64-dts-qcom-ipq9574-Add-nsscc-node.patch
@@ -22,11 +22,10 @@ Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
  #include <dt-bindings/thermal/thermal.h>
  
  / {
-@@ -198,6 +200,26 @@
- 				qcom,glink-channels = "rpm_requests";
- 			};
+@@ -1216,6 +1218,25 @@
+ 			status = "disabled";
  		};
-+
+ 
 +		nsscc: clock-controller@39b00000 {
 +			compatible = "qcom,ipq9574-nsscc";
 +			reg = <0x39b00000 0x80000>;
@@ -48,4 +47,4 @@ Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
 +		};
  	};
  
- 	reserved-memory {
+ 	thermal-zones {
diff --git a/target/linux/qualcommbe/patches-6.6/200-01-arm64-dts-qcom-ipq9574-Add-PCS-UNIPHY-device-tree-su.patch b/target/linux/qualcommbe/patches-6.6/200-01-arm64-dts-qcom-ipq9574-Add-PCS-UNIPHY-device-tree-su.patch
index 4d0966d883..6867024ec1 100644
--- a/target/linux/qualcommbe/patches-6.6/200-01-arm64-dts-qcom-ipq9574-Add-PCS-UNIPHY-device-tree-su.patch
+++ b/target/linux/qualcommbe/patches-6.6/200-01-arm64-dts-qcom-ipq9574-Add-PCS-UNIPHY-device-tree-su.patch
@@ -30,7 +30,7 @@ Signed-off-by: Lei Wei <quic_leiwei@quicinc.com>
   */
  
  #include <dt-bindings/clock/qcom,apss-ipq.h>
-@@ -220,6 +220,114 @@
+@@ -1237,6 +1237,114 @@
  			#power-domain-cells = <1>;
  			#interconnect-cells = <1>;
  		};
@@ -144,4 +144,4 @@ Signed-off-by: Lei Wei <quic_leiwei@quicinc.com>
 +		};
  	};
  
- 	reserved-memory {
+ 	thermal-zones {
diff --git a/target/linux/qualcommbe/patches-6.6/200-02-arm64-dts-qcom-Add-IPQ9574-MDIO-device-node.patch b/target/linux/qualcommbe/patches-6.6/200-02-arm64-dts-qcom-Add-IPQ9574-MDIO-device-node.patch
index d41a54810d..edfc1f6497 100644
--- a/target/linux/qualcommbe/patches-6.6/200-02-arm64-dts-qcom-Add-IPQ9574-MDIO-device-node.patch
+++ b/target/linux/qualcommbe/patches-6.6/200-02-arm64-dts-qcom-Add-IPQ9574-MDIO-device-node.patch
@@ -15,7 +15,7 @@ Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
 
 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
-@@ -425,6 +425,8 @@
+@@ -297,6 +297,8 @@
  		mdio: mdio@90000 {
  			compatible =  "qcom,ipq9574-mdio", "qcom,ipq4019-mdio";
  			reg = <0x00090000 0x64>;
@@ -24,7 +24,7 @@ Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
  			#address-cells = <1>;
  			#size-cells = <0>;
  			clocks = <&gcc GCC_MDIO_AHB_CLK>;
-@@ -542,6 +544,22 @@
+@@ -414,6 +416,22 @@
  			interrupt-controller;
  			#interrupt-cells = <2>;
  
diff --git a/target/linux/qualcommbe/patches-6.6/200-03-arm64-dts-qcom-Add-IPQ9574-PPE-base-device-node.patch b/target/linux/qualcommbe/patches-6.6/200-03-arm64-dts-qcom-Add-IPQ9574-PPE-base-device-node.patch
index a99fe0129d..3cad4008a9 100644
--- a/target/linux/qualcommbe/patches-6.6/200-03-arm64-dts-qcom-Add-IPQ9574-PPE-base-device-node.patch
+++ b/target/linux/qualcommbe/patches-6.6/200-03-arm64-dts-qcom-Add-IPQ9574-PPE-base-device-node.patch
@@ -15,11 +15,10 @@ Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
 
 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
-@@ -328,6 +328,44 @@
- 					      "ch_tx";
- 			};
+@@ -1256,6 +1256,44 @@
+ 			#interconnect-cells = <1>;
  		};
-+
+ 
 +		ethernet@3a000000 {
 +			compatible = "qcom,ipq9574-ppe";
 +			reg = <0x3a000000 0xbef800>;
@@ -57,6 +56,7 @@ Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
 +					     "memnoc_nssnoc",
 +					     "memnoc_nssnoc_1";
 +		};
- 	};
- 
- 	reserved-memory {
++
+ 		pcsuniphy0: ethernet-uniphy@7a00000 {
+ 			#address-cells = <1>;
+ 			#size-cells = <0>;
diff --git a/target/linux/qualcommbe/patches-6.6/200-04-arm64-dts-qcom-Add-EDMA-node-for-IPQ9574.patch b/target/linux/qualcommbe/patches-6.6/200-04-arm64-dts-qcom-Add-EDMA-node-for-IPQ9574.patch
index 8b3bdc39f5..b024a37e6b 100644
--- a/target/linux/qualcommbe/patches-6.6/200-04-arm64-dts-qcom-Add-EDMA-node-for-IPQ9574.patch
+++ b/target/linux/qualcommbe/patches-6.6/200-04-arm64-dts-qcom-Add-EDMA-node-for-IPQ9574.patch
@@ -14,7 +14,7 @@ Signed-off-by: Pavithra R <quic_pavir@quicinc.com>
 
 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
-@@ -365,6 +365,74 @@
+@@ -1292,6 +1292,74 @@
  					     "nssnoc_memnoc",
  					     "memnoc_nssnoc",
  					     "memnoc_nssnoc_1";
@@ -87,5 +87,5 @@ Signed-off-by: Pavithra R <quic_pavir@quicinc.com>
 +						  "edma_misc";
 +			};
  		};
- 	};
  
+ 		pcsuniphy0: ethernet-uniphy@7a00000 {
diff --git a/target/linux/qualcommbe/patches-6.6/200-05-arm64-dts-qcom-Add-IPQ9574-RDP433-port-node.patch b/target/linux/qualcommbe/patches-6.6/200-05-arm64-dts-qcom-Add-IPQ9574-RDP433-port-node.patch
index 5b093003d1..daef80dd79 100644
--- a/target/linux/qualcommbe/patches-6.6/200-05-arm64-dts-qcom-Add-IPQ9574-RDP433-port-node.patch
+++ b/target/linux/qualcommbe/patches-6.6/200-05-arm64-dts-qcom-Add-IPQ9574-RDP433-port-node.patch
@@ -198,8 +198,8 @@ Signed-off-by: Lei Wei <quic_leiwei@quicinc.com>
 +};
 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
-@@ -329,7 +329,7 @@
- 			};
+@@ -1256,7 +1256,7 @@
+ 			#interconnect-cells = <1>;
  		};
  
 -		ethernet@3a000000 {
diff --git a/target/linux/qualcommbe/patches-6.6/302-arm64-dts-qcom-Add-missing-clock-for-nsscc-from-pcs-.patch b/target/linux/qualcommbe/patches-6.6/302-arm64-dts-qcom-Add-missing-clock-for-nsscc-from-pcs-.patch
index 111b71d401..f0d89d96e6 100644
--- a/target/linux/qualcommbe/patches-6.6/302-arm64-dts-qcom-Add-missing-clock-for-nsscc-from-pcs-.patch
+++ b/target/linux/qualcommbe/patches-6.6/302-arm64-dts-qcom-Add-missing-clock-for-nsscc-from-pcs-.patch
@@ -21,7 +21,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
  #include <dt-bindings/thermal/thermal.h>
  
  / {
-@@ -208,12 +209,12 @@
+@@ -1243,12 +1244,12 @@
  				 <&cmn_pll NSS_1200MHZ_CLK>,
  				 <&cmn_pll PPE_353MHZ_CLK>,
  				 <&gcc GPLL0_OUT_AUX>,