I have collected the known information from the dts files we have.
After that I made a new device tree that should work for this whole D-Link
switch family.
This device tree is based on modules where you first select which SoC group
the device belongs to. Then you include the GPIO dtsi file depending on what
hardware your device has, see examples below.
This tree is also expandable for more hardware,
see the part 'Future expansion possibilities' further down.
-------------------------------------------------------------------------------
The device tree now looks like this:
----------------
| rtl838x.dtsi | // Note 1.
----------------
|
|
---------------------------------------
| rtl838x_d-link_dgs-1210_common.dtsi | // Note 2.
---------------------------------------
|
| --------------
|-------| device.dts | // Note 3.
| --------------
|
-------------------------------------
| rtl83xx_d-link_dgs-1210_gpio.dtsi | // Note 4.
-------------------------------------
|
| --------------
|-------| device.dts | // Note 5.
--------------
Note 1; Included in rtl838x_d-link_dgs-1210_common.dtsi.
Note 2; SoC level information and memory mapping. Choose which one to include
in the device dts.
Note 3; At this point dgs-1210-16 will come out here.
Note 4; In this dtsi only common board hardware based on the rtl8231 is found.
No PoE based hardware in this dtsi.
In this dtsi there is no <#include> to above *_common.dtsi.
Note 5; Device dts with only rtl8231 based hardware without PoE will come out
here.
-------------------------------------------------------------------------------
How to set up in dts file:
The device dts will have one of these two <#include> alternatives.
This alternative includes only common features:
<#include "rtl838x_d-link_dgs-1210_common.dtsi">
This alternative includes common and the rtl8231 GPIO (no PoE) features:
<#include "rtl838x_d-link_dgs-1210_common.dtsi">
<#include "rtl83xx_d-link_dgs-1210_gpio.dtsi">
-------------------------------------------------------------------------------
Implementation:
Finally, I also implemented this new family device tree on the current
supported devices:
dgs-1210-10p
dgs-1210-16
dgs-1210-20
dgs-1210-28
The implementation for the dgs-1210-10p is different. I have removed the
information from the rtl8382_d-link_dgs-1210-10p.dts that is already present
in rtl838x_d-link_dgs-1210_common.dtsi.
Since the rest isn't officially probed in the device dts I do not want to
include the rtl83xx_d-link_dgs-1210_gpio.dtsi with dgs-1210-10p.dts.
Since I don't have these devices to test on I have built the original firmware
for each one of these devices before this change and saved the dtb file and
then compared the original dtb file with the dtb file built with this new
device tree.
-------------------------------------------------------------------------------
Future expansion possibilities:
In parallel with the rtl838x_d-link_dgs-1210_common.dtsi in the tree map
we can make a rtl839x_d-link_dgs-1210_common.dtsi to use the rtl839x.dtsi if
the need arises with more devices based on rtl839x soc.
When we have more PoE devices so the hardware map for these gets more clear
we can make a rtl83xx_d-link_dgs-1210_poe.dtsi below
the rtl83xx_d-link_dgs-1210_gpio.dtsi in the tree map.
I looked at the port and switch setup to see if it could be moved to the dtsi.
I decided not to touch this part now. The reason was that there isn't really
any meaningful way this could be shared between the devices.
The only thing in common over the family is the 8+2sfp ports on the
dgs-1210-10xx device.
And then there is the hot plug SFP and I2C ports that aren’t implemented
on any device. So maybe when we see the whole port map for the family
then maybe the ports can be moved to a *_common.dtsi but I don't think it is
the right moment for that now.
Signed-off-by: Daniel Groth <flygarn12@gmail.com>
[Capitalisation of abbreviations and 'D-Link']
Signed-off-by: Sander Vanheule <sander@svanheule.net>
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-#include "rtl838x.dtsi"
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/gpio/gpio.h>
+#include "rtl838x_d-link_dgs-1210_common.dtsi"
/ {
compatible = "d-link,dgs-1210-10p", "realtek,rtl838x-soc";
model = "D-Link DGS-1210-10P";
- aliases {
- led-boot = &led_power;
- led-failsafe = &led_power;
- led-running = &led_power;
- led-upgrade = &led_power;
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x8000000>;
- };
-
- leds {
- pinctrl-names = "default";
- pinctrl-0 = <&pinmux_disable_sys_led>;
- compatible = "gpio-leds";
-
- led_power: power {
- // GPIO 0 seems to provide power to the leds
- label = "green:power";
- gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
- };
- };
-
keys {
compatible = "gpio-keys-polled";
poll-interval = <20>;
};
};
-
-&spi0 {
- status = "okay";
- flash@0 {
- compatible = "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <10000000>;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition@0 {
- label = "u-boot";
- reg = <0x00000000 0x80000>;
- read-only;
- };
- partition@80000 {
- label = "u-boot-env";
- reg = <0x00080000 0x40000>;
- read-only;
- };
- partition@c0000 {
- label = "u-boot-env2";
- reg = <0x000c0000 0x40000>;
- };
- partition@280000 {
- label = "firmware";
- compatible = "denx,uimage";
- reg = <0x00100000 0xd80000>;
- };
- partition@be80000 {
- label = "kernel2";
- reg = <0x00e80000 0x180000>;
- };
- partition@1000000 {
- label = "sysinfo";
- reg = <0x01000000 0x40000>;
- };
- partition@1040000 {
- label = "rootfs2";
- reg = <0x01040000 0xc00000>;
- };
- partition@1c40000 {
- label = "jffs2";
- reg = <0x01c40000 0x3c0000>;
- };
- };
- };
-};
-
&uart1 {
status = "okay";
};
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-#include "rtl8382_d-link_dgs-1210.dtsi"
+#include "rtl838x_d-link_dgs-1210_common.dtsi"
/ {
compatible = "d-link,dgs-1210-16", "realtek,rtl838x-soc";
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-#include "rtl8382_d-link_dgs-1210.dtsi"
+#include "rtl838x_d-link_dgs-1210_common.dtsi"
+#include "rtl83xx_d-link_dgs-1210_gpio.dtsi"
/ {
compatible = "d-link,dgs-1210-20", "realtek,rtl838x-soc";
model = "D-Link DGS-1210-20";
-
- gpio-restart {
- compatible = "gpio-restart";
- gpios = <&gpio1 34 GPIO_ACTIVE_LOW>;
- open-source;
- };
-
- keys {
- compatible = "gpio-keys-polled";
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&gpio1 33 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_RESTART>;
- };
- };
-
- gpio1: rtl8231-gpio {
- compatible = "realtek,rtl8231-gpio";
- #gpio-cells = <2>;
- gpio-controller;
- indirect-access-bus-id = <0>;
- };
};
ðernet0 {
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-#include "rtl8382_d-link_dgs-1210.dtsi"
+#include "rtl838x_d-link_dgs-1210_common.dtsi"
+#include "rtl83xx_d-link_dgs-1210_gpio.dtsi"
/ {
compatible = "d-link,dgs-1210-28", "realtek,rtl838x-soc";
model = "D-Link DGS-1210-28";
-
- gpio-restart {
- compatible = "gpio-restart";
- gpios = <&gpio1 34 GPIO_ACTIVE_LOW>;
- open-source;
- };
-
- keys {
- compatible = "gpio-keys-polled";
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&gpio1 33 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_RESTART>;
- };
- };
-
- gpio1: rtl8231-gpio {
- compatible = "realtek,rtl8231-gpio";
- #gpio-cells = <2>;
- gpio-controller;
- indirect-access-bus-id = <0>;
- };
};
ðernet0 {
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-
-#include "rtl838x.dtsi"
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/gpio/gpio.h>
-
-/ {
- aliases {
- led-boot = &led_power;
- led-failsafe = &led_power;
- led-running = &led_power;
- led-upgrade = &led_power;
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x8000000>;
- };
-
- leds {
- pinctrl-names = "default";
- pinctrl-0 = <&pinmux_disable_sys_led>;
-
- compatible = "gpio-leds";
-
- led_power: power {
- label = "green:power";
- gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
- };
- };
-};
-
-&gpio0 {
- indirect-access-bus-id = <0>;
-};
-
-&spi0 {
- status = "okay";
- flash@0 {
- compatible = "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <10000000>;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition@0 {
- label = "u-boot";
- reg = <0x00000000 0x80000>;
- read-only;
- };
- partition@80000 {
- label = "u-boot-env";
- reg = <0x00080000 0x40000>;
- };
- partition@c0000 {
- label = "board-name";
- reg = <0x000c0000 0x40000>;
- };
- partition@280000 {
- label = "firmware";
- compatible = "denx,uimage";
- reg = <0x00100000 0xd80000>;
- };
- partition@be80000 {
- label = "kernel2";
- reg = <0x00e80000 0x180000>;
- };
- partition@1000000 {
- label = "sysinfo";
- reg = <0x01000000 0x40000>;
- };
- partition@1040000 {
- label = "rootfs2";
- reg = <0x01040000 0xc00000>;
- };
- partition@1c40000 {
- label = "jffs2";
- reg = <0x01c40000 0x3c0000>;
- };
- };
- };
-};
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "rtl838x.dtsi"
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ aliases {
+ led-boot = &led_power;
+ led-failsafe = &led_power;
+ led-running = &led_power;
+ led-upgrade = &led_power;
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x8000000>;
+ };
+
+ leds: leds {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinmux_disable_sys_led>;
+ compatible = "gpio-leds";
+
+ led_power: power {
+ label = "green:power";
+ gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&gpio0 {
+ indirect-access-bus-id = <0>;
+};
+
+&spi0 {
+ status = "okay";
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <10000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x00000000 0x80000>;
+ read-only;
+ };
+ partition@80000 {
+ label = "u-boot-env";
+ reg = <0x00080000 0x40000>;
+ };
+ partition@c0000 {
+ label = "board-name";
+ reg = <0x000c0000 0x40000>;
+ };
+ partition@280000 {
+ label = "firmware";
+ compatible = "denx,uimage";
+ reg = <0x00100000 0xd80000>;
+ };
+ partition@be80000 {
+ label = "kernel2";
+ reg = <0x00e80000 0x180000>;
+ };
+ partition@1000000 {
+ label = "sysinfo";
+ reg = <0x01000000 0x40000>;
+ };
+ partition@1040000 {
+ label = "rootfs2";
+ reg = <0x01040000 0xc00000>;
+ };
+ partition@1c40000 {
+ label = "jffs2";
+ reg = <0x01c40000 0x3c0000>;
+ };
+ };
+ };
+};
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+/ {
+ gpio-restart {
+ compatible = "gpio-restart";
+ gpios = <&gpio1 34 GPIO_ACTIVE_LOW>;
+ open-source;
+ };
+
+ keys: keys {
+ compatible = "gpio-keys-polled";
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&gpio1 33 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ };
+ };
+
+ gpio1: rtl8231-gpio {
+ compatible = "realtek,rtl8231-gpio";
+ #gpio-cells = <2>;
+ gpio-controller;
+ indirect-access-bus-id = <0>;
+ };
+};
projects / openwrt / staging / jow.git / commitdiff