#define MAX_IO_DEVICES 2
#define MAX_IO_BLOCK_DEVICES 1
+#define TSP_SEC_MEM_BASE (BL32_BASE)
+#define TSP_SEC_MEM_SIZE ((BL32_LIMIT) - (BL32_BASE))
+#define TSP_PROGBITS_LIMIT (UNIPHIER_BLOCK_BUF_BASE)
+#define TSP_IRQ_SEC_PHY_TIMER 29
+
#endif /* __PLATFORM_DEF_H__ */
--- /dev/null
+#
+# Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
+BL32_SOURCES += plat/common/plat_gicv3.c \
+ plat/common/aarch64/platform_mp_stack.S \
+ $(PLAT_PATH)/tsp/uniphier_tsp_setup.c
--- /dev/null
+/*
+ * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <platform_def.h>
+#include <xlat_mmu_helpers.h>
+
+#include "../uniphier.h"
+
+#define BL32_END (unsigned long)(&__BL32_END__)
+#define BL32_SIZE ((BL32_END) - (BL32_BASE))
+
+void tsp_early_platform_setup(void)
+{
+ uniphier_console_setup();
+}
+
+void tsp_platform_setup(void)
+{
+}
+
+void tsp_plat_arch_setup(void)
+{
+ uniphier_mmap_setup(BL32_BASE, BL32_SIZE, NULL);
+ enable_mmu_el1(0);
+}