SPM: Raise running priority of the core while in Secure Partition
authorSughosh Ganu <sughosh.ganu@arm.com>
Wed, 14 Nov 2018 05:36:24 +0000 (11:06 +0530)
committerSughosh Ganu <sughosh.ganu@arm.com>
Wed, 14 Nov 2018 05:48:22 +0000 (11:18 +0530)
The current secure partition design mandates that a) at a point, only
a single core can be executing in the secure partition, and b) a core
cannot be preempted by an interrupt while executing in secure
partition.

Ensure this by activating the SPM priority prior to entering the
parition. Deactivate the priority on return from the
partition.

Change-Id: Icb3473496d16b733564592eef06304a1028e4f5c
Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
services/std_svc/spm/spm_main.c

index 585707dc90910003996c4fb5d95649ad17623b81..880e86e49603c23666ddafcb1b07ab7035c85826 100644 (file)
@@ -9,6 +9,7 @@
 #include <bl31.h>
 #include <context_mgmt.h>
 #include <debug.h>
+#include <ehf.h>
 #include <errno.h>
 #include <mm_svc.h>
 #include <platform.h>
@@ -233,6 +234,19 @@ static uint64_t mm_communicate(uint32_t smc_fid, uint64_t mm_cookie,
                VERBOSE("MM_COMMUNICATE: comm_size_address is not 0 as recommended.\n");
        }
 
+       /*
+        * The current secure partition design mandates
+        * - at any point, only a single core can be
+        *   executing in the secure partiton.
+        * - a core cannot be preempted by an interrupt
+        *   while executing in secure partition.
+        * Raise the running priority of the core to the
+        * interrupt level configured for secure partition
+        * so as to block any interrupt from preempting this
+        * core.
+        */
+       ehf_activate_priority(PLAT_SP_PRI);
+
        /* Save the Normal world context */
        cm_el1_sysregs_context_save(NON_SECURE);
 
@@ -243,6 +257,12 @@ static uint64_t mm_communicate(uint32_t smc_fid, uint64_t mm_cookie,
        cm_el1_sysregs_context_restore(NON_SECURE);
        cm_set_next_eret_context(NON_SECURE);
 
+       /*
+        * Exited from secure partition. This core can take
+        * interrupts now.
+        */
+       ehf_deactivate_priority(PLAT_SP_PRI);
+
        SMC_RET1(handle, rc);
 }