diff options
| author | Shiji Yang | 2025-10-21 04:06:04 +0000 |
|---|---|---|
| committer | Hauke Mehrtens | 2025-11-30 23:46:33 +0000 |
| commit | 7bbbe7750441ddb795d45e388c7ebb746b65ece9 (patch) | |
| tree | bc086456d158a0bab5c8b67c564407598612f92f | |
| parent | c16d83184b42ce2a0bb61a09e6270e2b96c0deb0 (diff) | |
| download | openwrt-7bbbe7750441ddb795d45e388c7ebb746b65ece9.tar.gz | |
ipq40xx: dts: convert WIA3300-20 SPI chipselect to hardware mode
On ipq40xx platform, some specific GPIO can be configured as hardware
controlled SPI CS pin. This commit is an example of how to convert the
chipselect pin to the hardware CS mode.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/20478
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
| -rw-r--r-- | target/linux/ipq40xx/files-6.12/arch/arm/boot/dts/qcom/qcom-ipq4019-wia3300-20.dts | 12 |
1 files changed, 1 insertions, 11 deletions
diff --git a/target/linux/ipq40xx/files-6.12/arch/arm/boot/dts/qcom/qcom-ipq4019-wia3300-20.dts b/target/linux/ipq40xx/files-6.12/arch/arm/boot/dts/qcom/qcom-ipq4019-wia3300-20.dts index efcbe962d2..eb45f234b4 100644 --- a/target/linux/ipq40xx/files-6.12/arch/arm/boot/dts/qcom/qcom-ipq4019-wia3300-20.dts +++ b/target/linux/ipq40xx/files-6.12/arch/arm/boot/dts/qcom/qcom-ipq4019-wia3300-20.dts @@ -126,8 +126,6 @@ pinctrl-0 = <&spi0_pins>; pinctrl-names = "default"; - cs-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>; - flash@0 { compatible = "jedec,spi-nor"; spi-max-frequency = <24000000>; @@ -398,19 +396,11 @@ spi0_pins: spi0_pinmux { blsp_spi0 { - pins = "gpio13", "gpio14", "gpio15"; + pins = "gpio12", "gpio13", "gpio14", "gpio15"; function = "blsp_spi0"; drive-strength = <4>; bias-disable; }; - - gpio { - pins = "gpio12"; - function = "gpio"; - drive-strength = <4>; - bias-disable; - output-high; - }; }; }; |