AArch32: Add ARM platform changes in BL1

This patch adds ARM platform changes in BL1 for AArch32 state.
It also enables building of BL1 for ARCH=aarch32.

Change-Id: I079be81a93d027f37b0f7d8bb474b1252bb4cf48

diff --git a/Makefile b/Makefile
index 15b1ac87d1be77adb90263d8e297a586ddb00112..aaf84db299f74d9b5c9e34668b321d567b28f360 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -517,13 +517,13 @@ endif
 ################################################################################
 # Include BL specific makefiles
 ################################################################################
-# BL31 is not needed and BL1, BL2 & BL2U are not currently supported in AArch32
-ifneq (${ARCH},aarch32)
 ifdef BL1_SOURCES
 NEED_BL1 := yes
 include bl1/bl1.mk
 endif
 
+# For AArch32, BL31 is not applicable, and BL2 & BL2U are not supported at present.
+ifneq (${ARCH},aarch32)
 ifdef BL2_SOURCES
 NEED_BL2 := yes
 include bl2/bl2.mk

diff --git a/plat/arm/board/fvp/platform.mk b/plat/arm/board/fvp/platform.mk
index 2865569aa5f38016b8421f64608acff83f946d98..1dad9895b20db1625ca340bdea0efa3ee895ea31 100644 (file)
--- a/plat/arm/board/fvp/platform.mk
+++ b/plat/arm/board/fvp/platform.mk
@@ -113,8 +113,8 @@ endif
 
 BL1_SOURCES            +=      drivers/io/io_semihosting.c                     \
                                lib/semihosting/semihosting.c                   \
-                               lib/semihosting/aarch64/semihosting_call.S      \
-                               plat/arm/board/fvp/aarch64/fvp_helpers.S        \
+                               lib/semihosting/${ARCH}/semihosting_call.S      \
+                               plat/arm/board/fvp/${ARCH}/fvp_helpers.S        \
                                plat/arm/board/fvp/fvp_bl1_setup.c              \
                                plat/arm/board/fvp/fvp_err.c                    \
                                plat/arm/board/fvp/fvp_io_storage.c             \

diff --git a/plat/arm/common/arm_bl1_setup.c b/plat/arm/common/arm_bl1_setup.c
index 6782f8897bf0df9f386a1204e6e9f0c0f1b77282..50d102afee631147152ad08f99a63a02afc4ff8e 100644 (file)
--- a/plat/arm/common/arm_bl1_setup.c
+++ b/plat/arm/common/arm_bl1_setup.c
@@ -132,7 +132,11 @@ void arm_bl1_plat_arch_setup(void)
                              BL1_COHERENT_RAM_LIMIT
 #endif
                             );
+#ifdef AARCH32
+       enable_mmu_secure(0);
+#else
        enable_mmu_el3(0);
+#endif /* AARCH32 */
 }
 
 void bl1_plat_arch_setup(void)

diff --git a/plat/arm/common/arm_common.mk b/plat/arm/common/arm_common.mk
index 51bd60c9dff569931a1a577c6262ba470dd69de2..875e9196ae9fce9b6dc5cc1a336d06c7689c6568 100644 (file)
--- a/plat/arm/common/arm_common.mk
+++ b/plat/arm/common/arm_common.mk
@@ -116,7 +116,7 @@ BL1_SOURCES         +=      drivers/arm/sp805/sp805.c                       \
                                drivers/io/io_storage.c                         \
                                plat/arm/common/arm_bl1_setup.c                 \
                                plat/arm/common/arm_io_storage.c                \
-                               plat/common/aarch64/platform_up_stack.S
+                               plat/common/${ARCH}/platform_up_stack.S
 ifdef EL3_PAYLOAD_BASE
 # Need the arm_program_trusted_mailbox() function to release secondary CPUs from
 # their holding pen