Add end_vector_entry assembler macro

Check_vector_size checks if the size of the vector fits
in the size reserved for it. This check creates problems in
the Clang assembler. A new macro, end_vector_entry, is added
and check_vector_size is deprecated.

This new macro fills the current exception vector until the next
exception vector. If the size of the current vector is bigger
than 32 instructions then it gives an error.

Change-Id: Ie8545cf1003a1e31656a1018dd6b4c28a4eaf671
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>

diff --git a/bl1/aarch64/bl1_exceptions.S b/bl1/aarch64/bl1_exceptions.S
index 7ac028a5c8bbd6897d350b6b071d158f55218fb3..cf8a6a79df0e23e952dabcdc323fc7f9e325c407 100644 (file)
--- a/bl1/aarch64/bl1_exceptions.S
+++ b/bl1/aarch64/bl1_exceptions.S
@@ -26,25 +26,25 @@ vector_entry SynchronousExceptionSP0
        mov     x0, #SYNC_EXCEPTION_SP_EL0
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size SynchronousExceptionSP0
+end_vector_entry SynchronousExceptionSP0
 
 vector_entry IrqSP0
        mov     x0, #IRQ_SP_EL0
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size IrqSP0
+end_vector_entry IrqSP0
 
 vector_entry FiqSP0
        mov     x0, #FIQ_SP_EL0
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size FiqSP0
+end_vector_entry FiqSP0
 
 vector_entry SErrorSP0
        mov     x0, #SERROR_SP_EL0
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size SErrorSP0
+end_vector_entry SErrorSP0
 
        /* -----------------------------------------------------
         * Current EL with SPx: 0x200 - 0x400
@@ -54,25 +54,25 @@ vector_entry SynchronousExceptionSPx
        mov     x0, #SYNC_EXCEPTION_SP_ELX
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size SynchronousExceptionSPx
+end_vector_entry SynchronousExceptionSPx
 
 vector_entry IrqSPx
        mov     x0, #IRQ_SP_ELX
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size IrqSPx
+end_vector_entry IrqSPx
 
 vector_entry FiqSPx
        mov     x0, #FIQ_SP_ELX
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size FiqSPx
+end_vector_entry FiqSPx
 
 vector_entry SErrorSPx
        mov     x0, #SERROR_SP_ELX
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size SErrorSPx
+end_vector_entry SErrorSPx
 
        /* -----------------------------------------------------
         * Lower EL using AArch64 : 0x400 - 0x600
@@ -91,25 +91,25 @@ vector_entry SynchronousExceptionA64
        b.ne    unexpected_sync_exception
 
        b       smc_handler64
-       check_vector_size SynchronousExceptionA64
+end_vector_entry SynchronousExceptionA64
 
 vector_entry IrqA64
        mov     x0, #IRQ_AARCH64
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size IrqA64
+end_vector_entry IrqA64
 
 vector_entry FiqA64
        mov     x0, #FIQ_AARCH64
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size FiqA64
+end_vector_entry FiqA64
 
 vector_entry SErrorA64
        mov     x0, #SERROR_AARCH64
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size SErrorA64
+end_vector_entry SErrorA64
 
        /* -----------------------------------------------------
         * Lower EL using AArch32 : 0x600 - 0x800
@@ -119,25 +119,25 @@ vector_entry SynchronousExceptionA32
        mov     x0, #SYNC_EXCEPTION_AARCH32
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size SynchronousExceptionA32
+end_vector_entry SynchronousExceptionA32
 
 vector_entry IrqA32
        mov     x0, #IRQ_AARCH32
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size IrqA32
+end_vector_entry IrqA32
 
 vector_entry FiqA32
        mov     x0, #FIQ_AARCH32
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size FiqA32
+end_vector_entry FiqA32
 
 vector_entry SErrorA32
        mov     x0, #SERROR_AARCH32
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size SErrorA32
+end_vector_entry SErrorA32
 
 
 func smc_handler64

diff --git a/bl2/aarch64/bl2_el3_exceptions.S b/bl2/aarch64/bl2_el3_exceptions.S
index 987f6e35bf9828e5c0fdb52167a77162c7a69058..07d104062691615f409b9231b2f310607c4b3f26 100644 (file)
--- a/bl2/aarch64/bl2_el3_exceptions.S
+++ b/bl2/aarch64/bl2_el3_exceptions.S
@@ -26,25 +26,25 @@ vector_entry SynchronousExceptionSP0
        mov     x0, #SYNC_EXCEPTION_SP_EL0
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size SynchronousExceptionSP0
+end_vector_entry SynchronousExceptionSP0
 
 vector_entry IrqSP0
        mov     x0, #IRQ_SP_EL0
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size IrqSP0
+end_vector_entry IrqSP0
 
 vector_entry FiqSP0
        mov     x0, #FIQ_SP_EL0
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size FiqSP0
+end_vector_entry FiqSP0
 
 vector_entry SErrorSP0
        mov     x0, #SERROR_SP_EL0
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size SErrorSP0
+end_vector_entry SErrorSP0
 
        /* -----------------------------------------------------
         * Current EL with SPx: 0x200 - 0x400
@@ -54,25 +54,25 @@ vector_entry SynchronousExceptionSPx
        mov     x0, #SYNC_EXCEPTION_SP_ELX
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size SynchronousExceptionSPx
+end_vector_entry SynchronousExceptionSPx
 
 vector_entry IrqSPx
        mov     x0, #IRQ_SP_ELX
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size IrqSPx
+end_vector_entry IrqSPx
 
 vector_entry FiqSPx
        mov     x0, #FIQ_SP_ELX
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size FiqSPx
+end_vector_entry FiqSPx
 
 vector_entry SErrorSPx
        mov     x0, #SERROR_SP_ELX
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size SErrorSPx
+end_vector_entry SErrorSPx
 
        /* -----------------------------------------------------
         * Lower EL using AArch64 : 0x400 - 0x600
@@ -82,25 +82,25 @@ vector_entry SynchronousExceptionA64
        mov     x0, #SYNC_EXCEPTION_AARCH64
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size SynchronousExceptionA64
+end_vector_entry SynchronousExceptionA64
 
 vector_entry IrqA64
        mov     x0, #IRQ_AARCH64
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size IrqA64
+end_vector_entry IrqA64
 
 vector_entry FiqA64
        mov     x0, #FIQ_AARCH64
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size FiqA64
+end_vector_entry FiqA64
 
 vector_entry SErrorA64
        mov     x0, #SERROR_AARCH64
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size SErrorA64
+end_vector_entry SErrorA64
 
        /* -----------------------------------------------------
         * Lower EL using AArch32 : 0x600 - 0x800
@@ -110,22 +110,22 @@ vector_entry SynchronousExceptionA32
        mov     x0, #SYNC_EXCEPTION_AARCH32
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size SynchronousExceptionA32
+end_vector_entry SynchronousExceptionA32
 
 vector_entry IrqA32
        mov     x0, #IRQ_AARCH32
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size IrqA32
+end_vector_entry IrqA32
 
 vector_entry FiqA32
        mov     x0, #FIQ_AARCH32
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size FiqA32
+end_vector_entry FiqA32
 
 vector_entry SErrorA32
        mov     x0, #SERROR_AARCH32
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size SErrorA32
+end_vector_entry SErrorA32

diff --git a/bl31/aarch64/runtime_exceptions.S b/bl31/aarch64/runtime_exceptions.S
index 346cd3b313a5e56fccdfbc7e6b46cd80ae50b9af..12f9f109b39ec327d041e1ef487eb78ed9a37081 100644 (file)
--- a/bl31/aarch64/runtime_exceptions.S
+++ b/bl31/aarch64/runtime_exceptions.S
@@ -233,7 +233,7 @@ vector_base runtime_exceptions
 vector_entry sync_exception_sp_el0
        /* We don't expect any synchronous exceptions from EL3 */
        b       report_unhandled_exception
-       check_vector_size sync_exception_sp_el0
+end_vector_entry sync_exception_sp_el0
 
 vector_entry irq_sp_el0
        /*
@@ -241,17 +241,17 @@ vector_entry irq_sp_el0
         * error. Loop infinitely.
         */
        b       report_unhandled_interrupt
-       check_vector_size irq_sp_el0
+end_vector_entry irq_sp_el0
 
 
 vector_entry fiq_sp_el0
        b       report_unhandled_interrupt
-       check_vector_size fiq_sp_el0
+end_vector_entry fiq_sp_el0
 
 
 vector_entry serror_sp_el0
        b       report_unhandled_exception
-       check_vector_size serror_sp_el0
+end_vector_entry serror_sp_el0
 
        /* ---------------------------------------------------------------------
         * Current EL with SP_ELx: 0x200 - 0x400
@@ -265,19 +265,19 @@ vector_entry sync_exception_sp_elx
         * corrupted.
         */
        b       report_unhandled_exception
-       check_vector_size sync_exception_sp_elx
+end_vector_entry sync_exception_sp_elx
 
 vector_entry irq_sp_elx
        b       report_unhandled_interrupt
-       check_vector_size irq_sp_elx
+end_vector_entry irq_sp_elx
 
 vector_entry fiq_sp_elx
        b       report_unhandled_interrupt
-       check_vector_size fiq_sp_elx
+end_vector_entry fiq_sp_elx
 
 vector_entry serror_sp_elx
        b       report_unhandled_exception
-       check_vector_size serror_sp_elx
+end_vector_entry serror_sp_elx
 
        /* ---------------------------------------------------------------------
         * Lower EL using AArch64 : 0x400 - 0x600
@@ -292,17 +292,17 @@ vector_entry sync_exception_aarch64
         */
        check_and_unmask_ea
        handle_sync_exception
-       check_vector_size sync_exception_aarch64
+end_vector_entry sync_exception_aarch64
 
 vector_entry irq_aarch64
        check_and_unmask_ea
        handle_interrupt_exception irq_aarch64
-       check_vector_size irq_aarch64
+end_vector_entry irq_aarch64
 
 vector_entry fiq_aarch64
        check_and_unmask_ea
        handle_interrupt_exception fiq_aarch64
-       check_vector_size fiq_aarch64
+end_vector_entry fiq_aarch64
 
 vector_entry serror_aarch64
        msr     daifclr, #DAIF_ABT_BIT
@@ -313,7 +313,7 @@ vector_entry serror_aarch64
         */
        str     x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]
        handle_ea #ERROR_EA_ASYNC
-       check_vector_size serror_aarch64
+end_vector_entry serror_aarch64
 
        /* ---------------------------------------------------------------------
         * Lower EL using AArch32 : 0x600 - 0x800
@@ -328,17 +328,17 @@ vector_entry sync_exception_aarch32
         */
        check_and_unmask_ea
        handle_sync_exception
-       check_vector_size sync_exception_aarch32
+end_vector_entry sync_exception_aarch32
 
 vector_entry irq_aarch32
        check_and_unmask_ea
        handle_interrupt_exception irq_aarch32
-       check_vector_size irq_aarch32
+end_vector_entry irq_aarch32
 
 vector_entry fiq_aarch32
        check_and_unmask_ea
        handle_interrupt_exception fiq_aarch32
-       check_vector_size fiq_aarch32
+end_vector_entry fiq_aarch32
 
 vector_entry serror_aarch32
        msr     daifclr, #DAIF_ABT_BIT
@@ -349,7 +349,7 @@ vector_entry serror_aarch32
         */
        str     x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]
        handle_ea #ERROR_EA_ASYNC
-       check_vector_size serror_aarch32
+end_vector_entry serror_aarch32
 
 
        /* ---------------------------------------------------------------------

diff --git a/bl32/tsp/aarch64/tsp_exceptions.S b/bl32/tsp/aarch64/tsp_exceptions.S
index 4b2ad75eeaf529dd2a5f43ec542b904e9189378f..48e358a3a4b3d7527a7ba9716fc54359d36b5fa1 100644 (file)
--- a/bl32/tsp/aarch64/tsp_exceptions.S
+++ b/bl32/tsp/aarch64/tsp_exceptions.S
@@ -82,19 +82,19 @@ vector_base tsp_exceptions
         */
 vector_entry sync_exception_sp_el0
        b       plat_panic_handler
-       check_vector_size sync_exception_sp_el0
+end_vector_entry sync_exception_sp_el0
 
 vector_entry irq_sp_el0
        b       plat_panic_handler
-       check_vector_size irq_sp_el0
+end_vector_entry irq_sp_el0
 
 vector_entry fiq_sp_el0
        b       plat_panic_handler
-       check_vector_size fiq_sp_el0
+end_vector_entry fiq_sp_el0
 
 vector_entry serror_sp_el0
        b       plat_panic_handler
-       check_vector_size serror_sp_el0
+end_vector_entry serror_sp_el0
 
 
        /* -----------------------------------------------------
@@ -104,19 +104,19 @@ vector_entry serror_sp_el0
         */
 vector_entry sync_exception_sp_elx
        b       plat_panic_handler
-       check_vector_size sync_exception_sp_elx
+end_vector_entry sync_exception_sp_elx
 
 vector_entry irq_sp_elx
        handle_tsp_interrupt irq_sp_elx
-       check_vector_size irq_sp_elx
+end_vector_entry irq_sp_elx
 
 vector_entry fiq_sp_elx
        handle_tsp_interrupt fiq_sp_elx
-       check_vector_size fiq_sp_elx
+end_vector_entry fiq_sp_elx
 
 vector_entry serror_sp_elx
        b       plat_panic_handler
-       check_vector_size serror_sp_elx
+end_vector_entry serror_sp_elx
 
 
        /* -----------------------------------------------------
@@ -126,19 +126,19 @@ vector_entry serror_sp_elx
         */
 vector_entry sync_exception_aarch64
        b       plat_panic_handler
-       check_vector_size sync_exception_aarch64
+end_vector_entry sync_exception_aarch64
 
 vector_entry irq_aarch64
        b       plat_panic_handler
-       check_vector_size irq_aarch64
+end_vector_entry irq_aarch64
 
 vector_entry fiq_aarch64
        b       plat_panic_handler
-       check_vector_size fiq_aarch64
+end_vector_entry fiq_aarch64
 
 vector_entry serror_aarch64
        b       plat_panic_handler
-       check_vector_size serror_aarch64
+end_vector_entry serror_aarch64
 
 
        /* -----------------------------------------------------
@@ -148,16 +148,16 @@ vector_entry serror_aarch64
         */
 vector_entry sync_exception_aarch32
        b       plat_panic_handler
-       check_vector_size sync_exception_aarch32
+end_vector_entry sync_exception_aarch32
 
 vector_entry irq_aarch32
        b       plat_panic_handler
-       check_vector_size irq_aarch32
+end_vector_entry irq_aarch32
 
 vector_entry fiq_aarch32
        b       plat_panic_handler
-       check_vector_size fiq_aarch32
+end_vector_entry fiq_aarch32
 
 vector_entry serror_aarch32
        b       plat_panic_handler
-       check_vector_size serror_aarch32
+end_vector_entry serror_aarch32

diff --git a/common/aarch64/early_exceptions.S b/common/aarch64/early_exceptions.S
index 19cc35d4ea8a942a88d744265fe3e710a355d0f6..ba94f6cb1eea4175b1e3b0c4512eb167798eaaa3 100644 (file)
--- a/common/aarch64/early_exceptions.S
+++ b/common/aarch64/early_exceptions.S
@@ -24,25 +24,25 @@ vector_entry SynchronousExceptionSP0
        mov     x0, #SYNC_EXCEPTION_SP_EL0
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size SynchronousExceptionSP0
+end_vector_entry SynchronousExceptionSP0
 
 vector_entry IrqSP0
        mov     x0, #IRQ_SP_EL0
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size IrqSP0
+end_vector_entry IrqSP0
 
 vector_entry FiqSP0
        mov     x0, #FIQ_SP_EL0
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size FiqSP0
+end_vector_entry FiqSP0
 
 vector_entry SErrorSP0
        mov     x0, #SERROR_SP_EL0
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size SErrorSP0
+end_vector_entry SErrorSP0
 
        /* -----------------------------------------------------
         * Current EL with SPx: 0x200 - 0x400
@@ -52,25 +52,25 @@ vector_entry SynchronousExceptionSPx
        mov     x0, #SYNC_EXCEPTION_SP_ELX
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size SynchronousExceptionSPx
+end_vector_entry SynchronousExceptionSPx
 
 vector_entry IrqSPx
        mov     x0, #IRQ_SP_ELX
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size IrqSPx
+end_vector_entry IrqSPx
 
 vector_entry FiqSPx
        mov     x0, #FIQ_SP_ELX
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size FiqSPx
+end_vector_entry FiqSPx
 
 vector_entry SErrorSPx
        mov     x0, #SERROR_SP_ELX
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size SErrorSPx
+end_vector_entry SErrorSPx
 
        /* -----------------------------------------------------
         * Lower EL using AArch64 : 0x400 - 0x600
@@ -80,25 +80,25 @@ vector_entry SynchronousExceptionA64
        mov     x0, #SYNC_EXCEPTION_AARCH64
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size SynchronousExceptionA64
+end_vector_entry SynchronousExceptionA64
 
 vector_entry IrqA64
        mov     x0, #IRQ_AARCH64
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size IrqA64
+end_vector_entry IrqA64
 
 vector_entry FiqA64
        mov     x0, #FIQ_AARCH64
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size FiqA64
+end_vector_entry FiqA64
 
 vector_entry SErrorA64
        mov     x0, #SERROR_AARCH64
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size SErrorA64
+end_vector_entry SErrorA64
 
        /* -----------------------------------------------------
         * Lower EL using AArch32 : 0x600 - 0x800
@@ -108,22 +108,22 @@ vector_entry SynchronousExceptionA32
        mov     x0, #SYNC_EXCEPTION_AARCH32
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size SynchronousExceptionA32
+end_vector_entry SynchronousExceptionA32
 
 vector_entry IrqA32
        mov     x0, #IRQ_AARCH32
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size IrqA32
+end_vector_entry IrqA32
 
 vector_entry FiqA32
        mov     x0, #FIQ_AARCH32
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size FiqA32
+end_vector_entry FiqA32
 
 vector_entry SErrorA32
        mov     x0, #SERROR_AARCH32
        bl      plat_report_exception
        no_ret  plat_panic_handler
-       check_vector_size SErrorA32
+end_vector_entry SErrorA32

diff --git a/include/common/aarch64/asm_macros.S b/include/common/aarch64/asm_macros.S
index 10ed301de7be89c885b595a622e6e33481fb723a..6e66ea99e04d105587e9304ad127ca06816152fe 100644 (file)
--- a/include/common/aarch64/asm_macros.S
+++ b/include/common/aarch64/asm_macros.S
@@ -87,6 +87,16 @@
        \label:
        .endm
 
+       /*
+        * Add the bytes until fill the full exception vector, whose size is always
+        * 32 instructions. If there are more than 32 instructions in the
+        * exception vector then an error is emitted.
+        */
+       .macro end_vector_entry label
+       .cfi_endproc
+       .fill   \label + (32 * 4) - .
+       .endm
+
        /*
         * This macro verifies that the given vector doesn't exceed the
         * architectural limit of 32 instructions. This is meant to be placed
@@ -94,10 +104,10 @@
         * vector entry as the parameter
         */
        .macro check_vector_size since
-         .cfi_endproc
-         .if (. - \since) > (32 * 4)
-           .error "Vector exceeds 32 instructions"
-         .endif
+#if ERROR_DEPRECATED
+      .error "check_vector_size must not be used. Use end_vector_entry instead"
+#endif
+       end_vector_entry \since
        .endm
 
 #if ENABLE_PLAT_COMPAT

diff --git a/lib/cpus/aarch64/cortex_a76.S b/lib/cpus/aarch64/cortex_a76.S
index 14705d7b24aebee80ace015ead92ca7596ccf7fa..51d0b15e3d68f6bf4e0b39277bd209d55b689d7a 100644 (file)
--- a/lib/cpus/aarch64/cortex_a76.S
+++ b/lib/cpus/aarch64/cortex_a76.S
@@ -107,19 +107,19 @@ vector_base cortex_a76_wa_cve_2018_3639_a76_vbar
         */
 vector_entry cortex_a76_sync_exception_sp_el0
        b       sync_exception_sp_el0
-       check_vector_size cortex_a76_sync_exception_sp_el0
+end_vector_entry cortex_a76_sync_exception_sp_el0
 
 vector_entry cortex_a76_irq_sp_el0
        b       irq_sp_el0
-       check_vector_size cortex_a76_irq_sp_el0
+end_vector_entry cortex_a76_irq_sp_el0
 
 vector_entry cortex_a76_fiq_sp_el0
        b       fiq_sp_el0
-       check_vector_size cortex_a76_fiq_sp_el0
+end_vector_entry cortex_a76_fiq_sp_el0
 
 vector_entry cortex_a76_serror_sp_el0
        b       serror_sp_el0
-       check_vector_size cortex_a76_serror_sp_el0
+end_vector_entry cortex_a76_serror_sp_el0
 
        /* ---------------------------------------------------------------------
         * Current EL with SP_ELx: 0x200 - 0x400
@@ -127,19 +127,19 @@ vector_entry cortex_a76_serror_sp_el0
         */
 vector_entry cortex_a76_sync_exception_sp_elx
        b       sync_exception_sp_elx
-       check_vector_size cortex_a76_sync_exception_sp_elx
+end_vector_entry cortex_a76_sync_exception_sp_elx
 
 vector_entry cortex_a76_irq_sp_elx
        b       irq_sp_elx
-       check_vector_size cortex_a76_irq_sp_elx
+end_vector_entry cortex_a76_irq_sp_elx
 
 vector_entry cortex_a76_fiq_sp_elx
        b       fiq_sp_elx
-       check_vector_size cortex_a76_fiq_sp_elx
+end_vector_entry cortex_a76_fiq_sp_elx
 
 vector_entry cortex_a76_serror_sp_elx
        b       serror_sp_elx
-       check_vector_size cortex_a76_serror_sp_elx
+end_vector_entry cortex_a76_serror_sp_elx
 
        /* ---------------------------------------------------------------------
         * Lower EL using AArch64 : 0x400 - 0x600
@@ -148,22 +148,22 @@ vector_entry cortex_a76_serror_sp_elx
 vector_entry cortex_a76_sync_exception_aarch64
        apply_cve_2018_3639_wa _is_sync_exception=1 _esr_el3_val=ESR_EL3_A64_SMC0
        b       sync_exception_aarch64
-       check_vector_size cortex_a76_sync_exception_aarch64
+end_vector_entry cortex_a76_sync_exception_aarch64
 
 vector_entry cortex_a76_irq_aarch64
        apply_cve_2018_3639_wa _is_sync_exception=0 _esr_el3_val=ESR_EL3_A64_SMC0
        b       irq_aarch64
-       check_vector_size cortex_a76_irq_aarch64
+end_vector_entry cortex_a76_irq_aarch64
 
 vector_entry cortex_a76_fiq_aarch64
        apply_cve_2018_3639_wa _is_sync_exception=0 _esr_el3_val=ESR_EL3_A64_SMC0
        b       fiq_aarch64
-       check_vector_size cortex_a76_fiq_aarch64
+end_vector_entry cortex_a76_fiq_aarch64
 
 vector_entry cortex_a76_serror_aarch64
        apply_cve_2018_3639_wa _is_sync_exception=0 _esr_el3_val=ESR_EL3_A64_SMC0
        b       serror_aarch64
-       check_vector_size cortex_a76_serror_aarch64
+end_vector_entry cortex_a76_serror_aarch64
 
        /* ---------------------------------------------------------------------
         * Lower EL using AArch32 : 0x600 - 0x800
@@ -172,22 +172,22 @@ vector_entry cortex_a76_serror_aarch64
 vector_entry cortex_a76_sync_exception_aarch32
        apply_cve_2018_3639_wa _is_sync_exception=1 _esr_el3_val=ESR_EL3_A32_SMC0
        b       sync_exception_aarch32
-       check_vector_size cortex_a76_sync_exception_aarch32
+end_vector_entry cortex_a76_sync_exception_aarch32
 
 vector_entry cortex_a76_irq_aarch32
        apply_cve_2018_3639_wa _is_sync_exception=0 _esr_el3_val=ESR_EL3_A32_SMC0
        b       irq_aarch32
-       check_vector_size cortex_a76_irq_aarch32
+end_vector_entry cortex_a76_irq_aarch32
 
 vector_entry cortex_a76_fiq_aarch32
        apply_cve_2018_3639_wa _is_sync_exception=0 _esr_el3_val=ESR_EL3_A32_SMC0
        b       fiq_aarch32
-       check_vector_size cortex_a76_fiq_aarch32
+end_vector_entry cortex_a76_fiq_aarch32
 
 vector_entry cortex_a76_serror_aarch32
        apply_cve_2018_3639_wa _is_sync_exception=0 _esr_el3_val=ESR_EL3_A32_SMC0
        b       serror_aarch32
-       check_vector_size cortex_a76_serror_aarch32
+end_vector_entry cortex_a76_serror_aarch32
 
 func check_errata_cve_2018_3639
 #if WORKAROUND_CVE_2018_3639

diff --git a/lib/cpus/aarch64/denver.S b/lib/cpus/aarch64/denver.S
index aee4feeea198cec0c4a21827c6930cfc6682f53b..f04dbd6c49211b57d48e52559d9c5703575bf22b 100644 (file)
--- a/lib/cpus/aarch64/denver.S
+++ b/lib/cpus/aarch64/denver.S
@@ -55,19 +55,19 @@ vector_base workaround_bpflush_runtime_exceptions
         */
 vector_entry workaround_bpflush_sync_exception_sp_el0
        b       sync_exception_sp_el0
-       check_vector_size workaround_bpflush_sync_exception_sp_el0
+end_vector_entry workaround_bpflush_sync_exception_sp_el0
 
 vector_entry workaround_bpflush_irq_sp_el0
        b       irq_sp_el0
-       check_vector_size workaround_bpflush_irq_sp_el0
+end_vector_entry workaround_bpflush_irq_sp_el0
 
 vector_entry workaround_bpflush_fiq_sp_el0
        b       fiq_sp_el0
-       check_vector_size workaround_bpflush_fiq_sp_el0
+end_vector_entry workaround_bpflush_fiq_sp_el0
 
 vector_entry workaround_bpflush_serror_sp_el0
        b       serror_sp_el0
-       check_vector_size workaround_bpflush_serror_sp_el0
+end_vector_entry workaround_bpflush_serror_sp_el0
 
        /* ---------------------------------------------------------------------
         * Current EL with SP_ELx: 0x200 - 0x400
@@ -75,19 +75,19 @@ vector_entry workaround_bpflush_serror_sp_el0
         */
 vector_entry workaround_bpflush_sync_exception_sp_elx
        b       sync_exception_sp_elx
-       check_vector_size workaround_bpflush_sync_exception_sp_elx
+end_vector_entry workaround_bpflush_sync_exception_sp_elx
 
 vector_entry workaround_bpflush_irq_sp_elx
        b       irq_sp_elx
-       check_vector_size workaround_bpflush_irq_sp_elx
+end_vector_entry workaround_bpflush_irq_sp_elx
 
 vector_entry workaround_bpflush_fiq_sp_elx
        b       fiq_sp_elx
-       check_vector_size workaround_bpflush_fiq_sp_elx
+end_vector_entry workaround_bpflush_fiq_sp_elx
 
 vector_entry workaround_bpflush_serror_sp_elx
        b       serror_sp_elx
-       check_vector_size workaround_bpflush_serror_sp_elx
+end_vector_entry workaround_bpflush_serror_sp_elx
 
        /* ---------------------------------------------------------------------
         * Lower EL using AArch64 : 0x400 - 0x600
@@ -96,22 +96,22 @@ vector_entry workaround_bpflush_serror_sp_elx
 vector_entry workaround_bpflush_sync_exception_aarch64
        apply_workaround
        b       sync_exception_aarch64
-       check_vector_size workaround_bpflush_sync_exception_aarch64
+end_vector_entry workaround_bpflush_sync_exception_aarch64
 
 vector_entry workaround_bpflush_irq_aarch64
        apply_workaround
        b       irq_aarch64
-       check_vector_size workaround_bpflush_irq_aarch64
+end_vector_entry workaround_bpflush_irq_aarch64
 
 vector_entry workaround_bpflush_fiq_aarch64
        apply_workaround
        b       fiq_aarch64
-       check_vector_size workaround_bpflush_fiq_aarch64
+end_vector_entry workaround_bpflush_fiq_aarch64
 
 vector_entry workaround_bpflush_serror_aarch64
        apply_workaround
        b       serror_aarch64
-       check_vector_size workaround_bpflush_serror_aarch64
+end_vector_entry workaround_bpflush_serror_aarch64
 
        /* ---------------------------------------------------------------------
         * Lower EL using AArch32 : 0x600 - 0x800
@@ -120,22 +120,22 @@ vector_entry workaround_bpflush_serror_aarch64
 vector_entry workaround_bpflush_sync_exception_aarch32
        apply_workaround
        b       sync_exception_aarch32
-       check_vector_size workaround_bpflush_sync_exception_aarch32
+end_vector_entry workaround_bpflush_sync_exception_aarch32
 
 vector_entry workaround_bpflush_irq_aarch32
        apply_workaround
        b       irq_aarch32
-       check_vector_size workaround_bpflush_irq_aarch32
+end_vector_entry workaround_bpflush_irq_aarch32
 
 vector_entry workaround_bpflush_fiq_aarch32
        apply_workaround
        b       fiq_aarch32
-       check_vector_size workaround_bpflush_fiq_aarch32
+end_vector_entry workaround_bpflush_fiq_aarch32
 
 vector_entry workaround_bpflush_serror_aarch32
        apply_workaround
        b       serror_aarch32
-       check_vector_size workaround_bpflush_serror_aarch32
+end_vector_entry workaround_bpflush_serror_aarch32
 
        .global denver_disable_dco
 

diff --git a/lib/cpus/aarch64/wa_cve_2017_5715_bpiall.S b/lib/cpus/aarch64/wa_cve_2017_5715_bpiall.S
index 843715515547c94b3dd750f8a23ee34fa0440e9f..c613ebdf6c870c75717956340e175ea9b34f69a4 100644 (file)
--- a/lib/cpus/aarch64/wa_cve_2017_5715_bpiall.S
+++ b/lib/cpus/aarch64/wa_cve_2017_5715_bpiall.S
@@ -114,19 +114,19 @@ aarch32_stub:
        .word   EMIT_BPIALL
        .word   EMIT_SMC
 
-       check_vector_size bpiall_sync_exception_sp_el0
+end_vector_entry bpiall_sync_exception_sp_el0
 
 vector_entry bpiall_irq_sp_el0
        b       irq_sp_el0
-       check_vector_size bpiall_irq_sp_el0
+end_vector_entry bpiall_irq_sp_el0
 
 vector_entry bpiall_fiq_sp_el0
        b       fiq_sp_el0
-       check_vector_size bpiall_fiq_sp_el0
+end_vector_entry bpiall_fiq_sp_el0
 
 vector_entry bpiall_serror_sp_el0
        b       serror_sp_el0
-       check_vector_size bpiall_serror_sp_el0
+end_vector_entry bpiall_serror_sp_el0
 
        /* ---------------------------------------------------------------------
         * Current EL with SP_ELx: 0x200 - 0x400
@@ -134,19 +134,19 @@ vector_entry bpiall_serror_sp_el0
         */
 vector_entry bpiall_sync_exception_sp_elx
        b       sync_exception_sp_elx
-       check_vector_size bpiall_sync_exception_sp_elx
+end_vector_entry bpiall_sync_exception_sp_elx
 
 vector_entry bpiall_irq_sp_elx
        b       irq_sp_elx
-       check_vector_size bpiall_irq_sp_elx
+end_vector_entry bpiall_irq_sp_elx
 
 vector_entry bpiall_fiq_sp_elx
        b       fiq_sp_elx
-       check_vector_size bpiall_fiq_sp_elx
+end_vector_entry bpiall_fiq_sp_elx
 
 vector_entry bpiall_serror_sp_elx
        b       serror_sp_elx
-       check_vector_size bpiall_serror_sp_elx
+end_vector_entry bpiall_serror_sp_elx
 
        /* ---------------------------------------------------------------------
         * Lower EL using AArch64 : 0x400 - 0x600
@@ -154,19 +154,19 @@ vector_entry bpiall_serror_sp_elx
         */
 vector_entry bpiall_sync_exception_aarch64
        apply_cve_2017_5715_wa 1
-       check_vector_size bpiall_sync_exception_aarch64
+end_vector_entry bpiall_sync_exception_aarch64
 
 vector_entry bpiall_irq_aarch64
        apply_cve_2017_5715_wa 2
-       check_vector_size bpiall_irq_aarch64
+end_vector_entry bpiall_irq_aarch64
 
 vector_entry bpiall_fiq_aarch64
        apply_cve_2017_5715_wa 4
-       check_vector_size bpiall_fiq_aarch64
+end_vector_entry bpiall_fiq_aarch64
 
 vector_entry bpiall_serror_aarch64
        apply_cve_2017_5715_wa 8
-       check_vector_size bpiall_serror_aarch64
+end_vector_entry bpiall_serror_aarch64
 
        /* ---------------------------------------------------------------------
         * Lower EL using AArch32 : 0x600 - 0x800
@@ -174,19 +174,19 @@ vector_entry bpiall_serror_aarch64
         */
 vector_entry bpiall_sync_exception_aarch32
        apply_cve_2017_5715_wa 1
-       check_vector_size bpiall_sync_exception_aarch32
+end_vector_entry bpiall_sync_exception_aarch32
 
 vector_entry bpiall_irq_aarch32
        apply_cve_2017_5715_wa 2
-       check_vector_size bpiall_irq_aarch32
+end_vector_entry bpiall_irq_aarch32
 
 vector_entry bpiall_fiq_aarch32
        apply_cve_2017_5715_wa 4
-       check_vector_size bpiall_fiq_aarch32
+end_vector_entry bpiall_fiq_aarch32
 
 vector_entry bpiall_serror_aarch32
        apply_cve_2017_5715_wa 8
-       check_vector_size bpiall_serror_aarch32
+end_vector_entry bpiall_serror_aarch32
 
        /* ---------------------------------------------------------------------
         * This vector table is used while the workaround is executing.  It
@@ -203,19 +203,19 @@ vector_base wa_cve_2017_5715_bpiall_ret_vbar
         */
 vector_entry bpiall_ret_sync_exception_sp_el0
        b       report_unhandled_exception
-       check_vector_size bpiall_ret_sync_exception_sp_el0
+end_vector_entry bpiall_ret_sync_exception_sp_el0
 
 vector_entry bpiall_ret_irq_sp_el0
        b       report_unhandled_interrupt
-       check_vector_size bpiall_ret_irq_sp_el0
+end_vector_entry bpiall_ret_irq_sp_el0
 
 vector_entry bpiall_ret_fiq_sp_el0
        b       report_unhandled_interrupt
-       check_vector_size bpiall_ret_fiq_sp_el0
+end_vector_entry bpiall_ret_fiq_sp_el0
 
 vector_entry bpiall_ret_serror_sp_el0
        b       report_unhandled_exception
-       check_vector_size bpiall_ret_serror_sp_el0
+end_vector_entry bpiall_ret_serror_sp_el0
 
        /* ---------------------------------------------------------------------
         * Current EL with SP_ELx: 0x200 - 0x400 (UNUSED)
@@ -223,19 +223,19 @@ vector_entry bpiall_ret_serror_sp_el0
         */
 vector_entry bpiall_ret_sync_exception_sp_elx
        b       report_unhandled_exception
-       check_vector_size bpiall_ret_sync_exception_sp_elx
+end_vector_entry bpiall_ret_sync_exception_sp_elx
 
 vector_entry bpiall_ret_irq_sp_elx
        b       report_unhandled_interrupt
-       check_vector_size bpiall_ret_irq_sp_elx
+end_vector_entry bpiall_ret_irq_sp_elx
 
 vector_entry bpiall_ret_fiq_sp_elx
        b       report_unhandled_interrupt
-       check_vector_size bpiall_ret_fiq_sp_elx
+end_vector_entry bpiall_ret_fiq_sp_elx
 
 vector_entry bpiall_ret_serror_sp_elx
        b       report_unhandled_exception
-       check_vector_size bpiall_ret_serror_sp_elx
+end_vector_entry bpiall_ret_serror_sp_elx
 
        /* ---------------------------------------------------------------------
         * Lower EL using AArch64 : 0x400 - 0x600 (UNUSED)
@@ -243,19 +243,19 @@ vector_entry bpiall_ret_serror_sp_elx
         */
 vector_entry bpiall_ret_sync_exception_aarch64
        b       report_unhandled_exception
-       check_vector_size bpiall_ret_sync_exception_aarch64
+end_vector_entry bpiall_ret_sync_exception_aarch64
 
 vector_entry bpiall_ret_irq_aarch64
        b       report_unhandled_interrupt
-       check_vector_size bpiall_ret_irq_aarch64
+end_vector_entry bpiall_ret_irq_aarch64
 
 vector_entry bpiall_ret_fiq_aarch64
        b       report_unhandled_interrupt
-       check_vector_size bpiall_ret_fiq_aarch64
+end_vector_entry bpiall_ret_fiq_aarch64
 
 vector_entry bpiall_ret_serror_aarch64
        b       report_unhandled_exception
-       check_vector_size bpiall_ret_serror_aarch64
+end_vector_entry bpiall_ret_serror_aarch64
 
        /* ---------------------------------------------------------------------
         * Lower EL using AArch32 : 0x600 - 0x800
@@ -324,7 +324,7 @@ vector_entry bpiall_ret_sync_exception_aarch32
 1:
        ldp     x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
        b       sync_exception_aarch64
-       check_vector_size bpiall_ret_sync_exception_aarch32
+end_vector_entry bpiall_ret_sync_exception_aarch32
 
 vector_entry bpiall_ret_irq_aarch32
        b       report_unhandled_interrupt
@@ -346,12 +346,12 @@ bpiall_ret_fiq:
 bpiall_ret_serror:
        ldp     x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
        b       serror_aarch64
-       check_vector_size bpiall_ret_irq_aarch32
+end_vector_entry bpiall_ret_irq_aarch32
 
 vector_entry bpiall_ret_fiq_aarch32
        b       report_unhandled_interrupt
-       check_vector_size bpiall_ret_fiq_aarch32
+end_vector_entry bpiall_ret_fiq_aarch32
 
 vector_entry bpiall_ret_serror_aarch32
        b       report_unhandled_exception
-       check_vector_size bpiall_ret_serror_aarch32
+end_vector_entry bpiall_ret_serror_aarch32

diff --git a/lib/cpus/aarch64/wa_cve_2017_5715_mmu.S b/lib/cpus/aarch64/wa_cve_2017_5715_mmu.S
index a556d1fee0e4e1ab128512bb39e2edd4d283df0c..d7b6e26e40f7128ab148d3a2cac9e74f06022410 100644 (file)
--- a/lib/cpus/aarch64/wa_cve_2017_5715_mmu.S
+++ b/lib/cpus/aarch64/wa_cve_2017_5715_mmu.S
@@ -66,19 +66,19 @@ vector_base wa_cve_2017_5715_mmu_vbar
         */
 vector_entry mmu_sync_exception_sp_el0
        b       sync_exception_sp_el0
-       check_vector_size mmu_sync_exception_sp_el0
+end_vector_entry mmu_sync_exception_sp_el0
 
 vector_entry mmu_irq_sp_el0
        b       irq_sp_el0
-       check_vector_size mmu_irq_sp_el0
+end_vector_entry mmu_irq_sp_el0
 
 vector_entry mmu_fiq_sp_el0
        b       fiq_sp_el0
-       check_vector_size mmu_fiq_sp_el0
+end_vector_entry mmu_fiq_sp_el0
 
 vector_entry mmu_serror_sp_el0
        b       serror_sp_el0
-       check_vector_size mmu_serror_sp_el0
+end_vector_entry mmu_serror_sp_el0
 
        /* ---------------------------------------------------------------------
         * Current EL with SP_ELx: 0x200 - 0x400
@@ -86,19 +86,19 @@ vector_entry mmu_serror_sp_el0
         */
 vector_entry mmu_sync_exception_sp_elx
        b       sync_exception_sp_elx
-       check_vector_size mmu_sync_exception_sp_elx
+end_vector_entry mmu_sync_exception_sp_elx
 
 vector_entry mmu_irq_sp_elx
        b       irq_sp_elx
-       check_vector_size mmu_irq_sp_elx
+end_vector_entry mmu_irq_sp_elx
 
 vector_entry mmu_fiq_sp_elx
        b       fiq_sp_elx
-       check_vector_size mmu_fiq_sp_elx
+end_vector_entry mmu_fiq_sp_elx
 
 vector_entry mmu_serror_sp_elx
        b       serror_sp_elx
-       check_vector_size mmu_serror_sp_elx
+end_vector_entry mmu_serror_sp_elx
 
        /* ---------------------------------------------------------------------
         * Lower EL using AArch64 : 0x400 - 0x600
@@ -107,22 +107,22 @@ vector_entry mmu_serror_sp_elx
 vector_entry mmu_sync_exception_aarch64
        apply_cve_2017_5715_wa _is_sync_exception=1 _esr_el3_val=ESR_EL3_A64_SMC0
        b       sync_exception_aarch64
-       check_vector_size mmu_sync_exception_aarch64
+end_vector_entry mmu_sync_exception_aarch64
 
 vector_entry mmu_irq_aarch64
        apply_cve_2017_5715_wa _is_sync_exception=0 _esr_el3_val=ESR_EL3_A64_SMC0
        b       irq_aarch64
-       check_vector_size mmu_irq_aarch64
+end_vector_entry mmu_irq_aarch64
 
 vector_entry mmu_fiq_aarch64
        apply_cve_2017_5715_wa _is_sync_exception=0 _esr_el3_val=ESR_EL3_A64_SMC0
        b       fiq_aarch64
-       check_vector_size mmu_fiq_aarch64
+end_vector_entry mmu_fiq_aarch64
 
 vector_entry mmu_serror_aarch64
        apply_cve_2017_5715_wa _is_sync_exception=0 _esr_el3_val=ESR_EL3_A64_SMC0
        b       serror_aarch64
-       check_vector_size mmu_serror_aarch64
+end_vector_entry mmu_serror_aarch64
 
        /* ---------------------------------------------------------------------
         * Lower EL using AArch32 : 0x600 - 0x800
@@ -131,19 +131,19 @@ vector_entry mmu_serror_aarch64
 vector_entry mmu_sync_exception_aarch32
        apply_cve_2017_5715_wa _is_sync_exception=1 _esr_el3_val=ESR_EL3_A32_SMC0
        b       sync_exception_aarch32
-       check_vector_size mmu_sync_exception_aarch32
+end_vector_entry mmu_sync_exception_aarch32
 
 vector_entry mmu_irq_aarch32
        apply_cve_2017_5715_wa _is_sync_exception=0 _esr_el3_val=ESR_EL3_A32_SMC0
        b       irq_aarch32
-       check_vector_size mmu_irq_aarch32
+end_vector_entry mmu_irq_aarch32
 
 vector_entry mmu_fiq_aarch32
        apply_cve_2017_5715_wa _is_sync_exception=0 _esr_el3_val=ESR_EL3_A32_SMC0
        b       fiq_aarch32
-       check_vector_size mmu_fiq_aarch32
+end_vector_entry mmu_fiq_aarch32
 
 vector_entry mmu_serror_aarch32
        apply_cve_2017_5715_wa _is_sync_exception=0 _esr_el3_val=ESR_EL3_A32_SMC0
        b       serror_aarch32
-       check_vector_size mmu_serror_aarch32
+end_vector_entry mmu_serror_aarch32

diff --git a/services/std_svc/spm/aarch64/spm_shim_exceptions.S b/services/std_svc/spm/aarch64/spm_shim_exceptions.S
index 218245d8e20dd269e40373ea84ea1e3630484a5b..9c218dfe85e42a7dffb33a134c5e4a2473d8a199 100644 (file)
--- a/services/std_svc/spm/aarch64/spm_shim_exceptions.S
+++ b/services/std_svc/spm/aarch64/spm_shim_exceptions.S
@@ -23,19 +23,19 @@ vector_base spm_shim_exceptions_ptr, .spm_shim_exceptions
         */
 vector_entry SynchronousExceptionSP0, .spm_shim_exceptions
        b       .
-       check_vector_size SynchronousExceptionSP0
+end_vector_entry SynchronousExceptionSP0
 
 vector_entry IrqSP0, .spm_shim_exceptions
        b       .
-       check_vector_size IrqSP0
+end_vector_entry IrqSP0
 
 vector_entry FiqSP0, .spm_shim_exceptions
        b       .
-       check_vector_size FiqSP0
+end_vector_entry FiqSP0
 
 vector_entry SErrorSP0, .spm_shim_exceptions
        b       .
-       check_vector_size SErrorSP0
+end_vector_entry SErrorSP0
 
        /* -----------------------------------------------------
         * Current EL with SPx: 0x200 - 0x400
@@ -43,19 +43,19 @@ vector_entry SErrorSP0, .spm_shim_exceptions
         */
 vector_entry SynchronousExceptionSPx, .spm_shim_exceptions
        b       .
-       check_vector_size SynchronousExceptionSPx
+end_vector_entry SynchronousExceptionSPx
 
 vector_entry IrqSPx, .spm_shim_exceptions
        b       .
-       check_vector_size IrqSPx
+end_vector_entry IrqSPx
 
 vector_entry FiqSPx, .spm_shim_exceptions
        b       .
-       check_vector_size FiqSPx
+end_vector_entry FiqSPx
 
 vector_entry SErrorSPx, .spm_shim_exceptions
        b       .
-       check_vector_size SErrorSPx
+end_vector_entry SErrorSPx
 
        /* -----------------------------------------------------
         * Lower EL using AArch64 : 0x400 - 0x600. No exceptions
@@ -93,19 +93,19 @@ do_smc:
 handle_sys_trap:
 panic:
        b       panic
-       check_vector_size SynchronousExceptionA64
+end_vector_entry SynchronousExceptionA64
 
 vector_entry IrqA64, .spm_shim_exceptions
        b       .
-       check_vector_size IrqA64
+end_vector_entry IrqA64
 
 vector_entry FiqA64, .spm_shim_exceptions
        b       .
-       check_vector_size FiqA64
+end_vector_entry FiqA64
 
 vector_entry SErrorA64, .spm_shim_exceptions
        b       .
-       check_vector_size SErrorA64
+end_vector_entry SErrorA64
 
        /* -----------------------------------------------------
         * Lower EL using AArch32 : 0x600 - 0x800
@@ -113,16 +113,16 @@ vector_entry SErrorA64, .spm_shim_exceptions
         */
 vector_entry SynchronousExceptionA32, .spm_shim_exceptions
        b       .
-       check_vector_size SynchronousExceptionA32
+end_vector_entry SynchronousExceptionA32
 
 vector_entry IrqA32, .spm_shim_exceptions
        b       .
-       check_vector_size IrqA32
+end_vector_entry IrqA32
 
 vector_entry FiqA32, .spm_shim_exceptions
        b       .
-       check_vector_size FiqA32
+end_vector_entry FiqA32
 
 vector_entry SErrorA32, .spm_shim_exceptions
        b       .
-       check_vector_size SErrorA32
+end_vector_entry SErrorA32