kernel: bump 5.4 to 5.4.154
authorHauke Mehrtens <hauke@hauke-m.de>
Tue, 19 Oct 2021 22:35:22 +0000 (00:35 +0200)
committerHauke Mehrtens <hauke@hauke-m.de>
Tue, 19 Oct 2021 22:37:51 +0000 (00:37 +0200)
Removed upstreamed:
  generic/backport-5.4/070-v5.5-MIPS-BPF-Restore-MIPS32-cBPF-JIT.patch

All others updated automatically.

Compile-tested on: lantiq/xrx200, armvirt/64
Runtime-tested on: lantiq/xrx200, armvirt/64

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
32 files changed:
include/kernel-version.mk
target/linux/generic/backport-5.4/070-v5.5-MIPS-BPF-Restore-MIPS32-cBPF-JIT.patch [deleted file]
target/linux/generic/hack-5.4/661-use_fq_codel_by_default.patch
target/linux/generic/hack-5.4/901-debloat_sock_diag.patch
target/linux/generic/hack-5.4/902-debloat_proc.patch
target/linux/generic/pending-5.4/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch
target/linux/generic/pending-5.4/834-ledtrig-libata.patch
target/linux/layerscape/patches-5.4/302-dts-0055-arm64-dts-ls1028a-Add-PCIe-controller-DT-nodes.patch
target/linux/layerscape/patches-5.4/302-dts-0058-arm64-dts-fsl-ls1028a-add-flexcan-node.patch
target/linux/layerscape/patches-5.4/302-dts-0066-arm64-dts-ls1028a-add-gpu-node.patch
target/linux/layerscape/patches-5.4/302-dts-0067-arm64-dts-fsl-add-optee-node-for-ls1028.patch
target/linux/layerscape/patches-5.4/302-dts-0069-arm64-dts-ls1028a-Add-ftm_alarm0-DT-node.patch
target/linux/layerscape/patches-5.4/302-dts-0074-arm64-dts-fsl-ls1028a-Add-Felix-switch-port-DT-node.patch
target/linux/layerscape/patches-5.4/302-dts-0076-arm64-dts-ls1028a-support-Felix-PF5-INTB-interrupt.patch
target/linux/layerscape/patches-5.4/302-dts-0077-arm64-dts-ls1028a-Add-ethernet-property-for-l2switch.patch
target/linux/layerscape/patches-5.4/302-dts-0078-arm64-dts-fix-endianness-of-rcpm.patch
target/linux/layerscape/patches-5.4/302-dts-0079-arm64-dts-ls1028a-Fix-interrupt-map-property-of-PCIe.patch
target/linux/layerscape/patches-5.4/302-dts-0088-arm64-dts-ls1028a-fix-dwc-pci-over-smmu.patch
target/linux/layerscape/patches-5.4/302-dts-0089-arm64-dts-ls1028a-Update-the-clock-providers-for-the.patch
target/linux/layerscape/patches-5.4/302-dts-0090-arm64-dts-ls1028a-Update-clock-cells-of-dpclk-node.patch
target/linux/layerscape/patches-5.4/302-dts-0091-arm64-dts-ls1028a-Add-properties-for-HD-Display-cont.patch
target/linux/layerscape/patches-5.4/302-dts-0093-arm64-dts-fsl-Specify-phy-mode-for-CPU-ports.patch
target/linux/layerscape/patches-5.4/302-dts-0094-arm64-dts-fsl-Drop-compatible-string-from-Felix-swit.patch
target/linux/layerscape/patches-5.4/302-dts-0095-arm64-dts-fsl-ls1028a-Specify-that-the-Felix-port-4-.patch
target/linux/layerscape/patches-5.4/302-dts-0096-arm64-dts-fsl-ls1028a-Disable-eno3-and-make-swp5-the.patch
target/linux/layerscape/patches-5.4/302-dts-0098-LF-403-ARM64-dts-fsl-Add-clock-names-mclk0-for-SAI-n.patch
target/linux/layerscape/patches-5.4/302-dts-0099-arm64-dts-layerscape-apply-dma-coherent-for-dwc3-nod.patch
target/linux/layerscape/patches-5.4/302-dts-0103-arm64-dts-ls1028a-Update-edma-compatible-to-fit-eDMA.patch
target/linux/layerscape/patches-5.4/302-dts-0110-arm64-dts-ls1028a-Disable-swp5-by-default.patch
target/linux/layerscape/patches-5.4/302-dts-0112-arm64-dts-fsl-ls1028a-prepare-dts-for-overlay.patch
target/linux/layerscape/patches-5.4/302-dts-0114-arm64-dts-fsl-ls1028a-add-labels-to-Ethernet-switch-.patch
target/linux/oxnas/patches-5.4/999-libata-hacks.patch

index 402136bb261ec659e849a9f55d961dacdb62d715..83bfcd8ff23b9e70c270ae5575c5a42bf7641448 100644 (file)
@@ -6,9 +6,9 @@ ifdef CONFIG_TESTING_KERNEL
   KERNEL_PATCHVER:=$(KERNEL_TESTING_PATCHVER)
 endif
 
-LINUX_VERSION-5.4 = .150
+LINUX_VERSION-5.4 = .154
 
-LINUX_KERNEL_HASH-5.4.150 = f424a9bbb05007f04c17f96a2e4f041a8001554a9060d2c291606e8a97c62aa2
+LINUX_KERNEL_HASH-5.4.154 = 058994f4666b6b0474a4d5228583e394594e406783b7e93d487c2a66c35f3c06
 
 remove_uri_prefix=$(subst git://,,$(subst http://,,$(subst https://,,$(1))))
 sanitize_uri=$(call qstrip,$(subst @,_,$(subst :,_,$(subst .,_,$(subst -,_,$(subst /,_,$(1)))))))
diff --git a/target/linux/generic/backport-5.4/070-v5.5-MIPS-BPF-Restore-MIPS32-cBPF-JIT.patch b/target/linux/generic/backport-5.4/070-v5.5-MIPS-BPF-Restore-MIPS32-cBPF-JIT.patch
deleted file mode 100644 (file)
index 027d025..0000000
+++ /dev/null
@@ -1,1650 +0,0 @@
-From 36366e367ee93ced84fddb8fae6675e12985f5a4 Mon Sep 17 00:00:00 2001
-From: Paul Burton <paulburton@kernel.org>
-Date: Thu, 5 Dec 2019 10:23:18 -0800
-Subject: [PATCH] MIPS: BPF: Restore MIPS32 cBPF JIT
-
-Commit 716850ab104d ("MIPS: eBPF: Initial eBPF support for MIPS32
-architecture.") enabled our eBPF JIT for MIPS32 kernels, whereas it has
-previously only been availailable for MIPS64. It was my understanding at
-the time that the BPF test suite was passing & JITing a comparable
-number of tests to our cBPF JIT [1], but it turns out that was not the
-case.
-
-The eBPF JIT has a number of problems on MIPS32:
-
-- Most notably various code paths still result in emission of MIPS64
-  instructions which will cause reserved instruction exceptions & kernel
-  panics when run on MIPS32 CPUs.
-
-- The eBPF JIT doesn't account for differences between the O32 ABI used
-  by MIPS32 kernels versus the N64 ABI used by MIPS64 kernels. Notably
-  arguments beyond the first 4 are passed on the stack in O32, and this
-  is entirely unhandled when JITing a BPF_CALL instruction. Stack space
-  must be reserved for arguments even if they all fit in registers, and
-  the callee is free to assume that stack space has been reserved for
-  its use - with the eBPF JIT this is not the case, so calling any
-  function can result in clobbering values on the stack & unpredictable
-  behaviour. Function arguments in eBPF are always 64-bit values which
-  is also entirely unhandled - the JIT still uses a single (32-bit)
-  register per argument. As a result all function arguments are always
-  passed incorrectly when JITing a BPF_CALL instruction, leading to
-  kernel crashes or strange behavior.
-
-- The JIT attempts to bail our on use of ALU64 instructions or 64-bit
-  memory access instructions. The code doing this at the start of
-  build_one_insn() incorrectly checks whether BPF_OP() equals BPF_DW,
-  when it should really be checking BPF_SIZE() & only doing so when
-  BPF_CLASS() is one of BPF_{LD,LDX,ST,STX}. This results in false
-  positives that cause more bailouts than intended, and that in turns
-  hides some of the problems described above.
-
-- The kernel's cBPF->eBPF translation makes heavy use of 64-bit eBPF
-  instructions that the MIPS32 eBPF JIT bails out on, leading to most
-  cBPF programs not being JITed at all.
-
-Until these problems are resolved, revert the removal of the cBPF JIT
-performed by commit 716850ab104d ("MIPS: eBPF: Initial eBPF support for
-MIPS32 architecture."). Together with commit f8fffebdea75 ("MIPS: BPF:
-Disable MIPS32 eBPF JIT") this restores MIPS32 BPF JIT behavior back to
-the same state it was prior to the introduction of the broken eBPF JIT
-support.
-
-[1] https://lore.kernel.org/linux-mips/MWHPR2201MB13583388481F01A422CE7D66D4410@MWHPR2201MB1358.namprd22.prod.outlook.com/
-
-Signed-off-by: Paul Burton <paulburton@kernel.org>
-Fixes: 716850ab104d ("MIPS: eBPF: Initial eBPF support for MIPS32 architecture.")
-Cc: Daniel Borkmann <daniel@iogearbox.net>
-Cc: Hassan Naveed <hnaveed@wavecomp.com>
-Cc: Tony Ambardar <itugrok@yahoo.com>
-Cc: bpf@vger.kernel.org
-Cc: netdev@vger.kernel.org
-Cc: linux-mips@vger.kernel.org
-Cc: linux-kernel@vger.kernel.org
----
- arch/mips/Kconfig           |    1 +
- arch/mips/net/Makefile      |    1 +
- arch/mips/net/bpf_jit.c     | 1270 +++++++++++++++++++++++++++++++++++
- arch/mips/net/bpf_jit_asm.S |  285 ++++++++
- 4 files changed, 1557 insertions(+)
- create mode 100644 arch/mips/net/bpf_jit.c
- create mode 100644 arch/mips/net/bpf_jit_asm.S
-
---- a/arch/mips/Kconfig
-+++ b/arch/mips/Kconfig
-@@ -46,6 +46,7 @@ config MIPS
-       select HAVE_ARCH_TRACEHOOK
-       select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
-       select HAVE_ASM_MODVERSIONS
-+      select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS
-       select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2
-       select HAVE_CONTEXT_TRACKING
-       select HAVE_COPY_THREAD_TLS
---- a/arch/mips/net/Makefile
-+++ b/arch/mips/net/Makefile
-@@ -1,4 +1,5 @@
- # SPDX-License-Identifier: GPL-2.0-only
- # MIPS networking code
-+obj-$(CONFIG_MIPS_CBPF_JIT) += bpf_jit.o bpf_jit_asm.o
- obj-$(CONFIG_MIPS_EBPF_JIT) += ebpf_jit.o
---- /dev/null
-+++ b/arch/mips/net/bpf_jit.c
-@@ -0,0 +1,1270 @@
-+/*
-+ * Just-In-Time compiler for BPF filters on MIPS
-+ *
-+ * Copyright (c) 2014 Imagination Technologies Ltd.
-+ * Author: Markos Chandras <markos.chandras@imgtec.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License as published by the
-+ * Free Software Foundation; version 2 of the License.
-+ */
-+
-+#include <linux/bitops.h>
-+#include <linux/compiler.h>
-+#include <linux/errno.h>
-+#include <linux/filter.h>
-+#include <linux/if_vlan.h>
-+#include <linux/moduleloader.h>
-+#include <linux/netdevice.h>
-+#include <linux/string.h>
-+#include <linux/slab.h>
-+#include <linux/types.h>
-+#include <asm/asm.h>
-+#include <asm/bitops.h>
-+#include <asm/cacheflush.h>
-+#include <asm/cpu-features.h>
-+#include <asm/uasm.h>
-+
-+#include "bpf_jit.h"
-+
-+/* ABI
-+ * r_skb_hl   SKB header length
-+ * r_data     SKB data pointer
-+ * r_off      Offset
-+ * r_A                BPF register A
-+ * r_X                BPF register X
-+ * r_skb      *skb
-+ * r_M                *scratch memory
-+ * r_skb_len  SKB length
-+ *
-+ * On entry (*bpf_func)(*skb, *filter)
-+ * a0 = MIPS_R_A0 = skb;
-+ * a1 = MIPS_R_A1 = filter;
-+ *
-+ * Stack
-+ * ...
-+ * M[15]
-+ * M[14]
-+ * M[13]
-+ * ...
-+ * M[0] <-- r_M
-+ * saved reg k-1
-+ * saved reg k-2
-+ * ...
-+ * saved reg 0 <-- r_sp
-+ * <no argument area>
-+ *
-+ *                     Packet layout
-+ *
-+ * <--------------------- len ------------------------>
-+ * <--skb-len(r_skb_hl)-->< ----- skb->data_len ------>
-+ * ----------------------------------------------------
-+ * |                  skb->data                       |
-+ * ----------------------------------------------------
-+ */
-+
-+#define ptr typeof(unsigned long)
-+
-+#define SCRATCH_OFF(k)                (4 * (k))
-+
-+/* JIT flags */
-+#define SEEN_CALL             (1 << BPF_MEMWORDS)
-+#define SEEN_SREG_SFT         (BPF_MEMWORDS + 1)
-+#define SEEN_SREG_BASE                (1 << SEEN_SREG_SFT)
-+#define SEEN_SREG(x)          (SEEN_SREG_BASE << (x))
-+#define SEEN_OFF              SEEN_SREG(2)
-+#define SEEN_A                        SEEN_SREG(3)
-+#define SEEN_X                        SEEN_SREG(4)
-+#define SEEN_SKB              SEEN_SREG(5)
-+#define SEEN_MEM              SEEN_SREG(6)
-+/* SEEN_SK_DATA also implies skb_hl an skb_len */
-+#define SEEN_SKB_DATA         (SEEN_SREG(7) | SEEN_SREG(1) | SEEN_SREG(0))
-+
-+/* Arguments used by JIT */
-+#define ARGS_USED_BY_JIT      2 /* only applicable to 64-bit */
-+
-+#define SBIT(x)                       (1 << (x)) /* Signed version of BIT() */
-+
-+/**
-+ * struct jit_ctx - JIT context
-+ * @skf:              The sk_filter
-+ * @prologue_bytes:   Number of bytes for prologue
-+ * @idx:              Instruction index
-+ * @flags:            JIT flags
-+ * @offsets:          Instruction offsets
-+ * @target:           Memory location for the compiled filter
-+ */
-+struct jit_ctx {
-+      const struct bpf_prog *skf;
-+      unsigned int prologue_bytes;
-+      u32 idx;
-+      u32 flags;
-+      u32 *offsets;
-+      u32 *target;
-+};
-+
-+
-+static inline int optimize_div(u32 *k)
-+{
-+      /* power of 2 divides can be implemented with right shift */
-+      if (!(*k & (*k-1))) {
-+              *k = ilog2(*k);
-+              return 1;
-+      }
-+
-+      return 0;
-+}
-+
-+static inline void emit_jit_reg_move(ptr dst, ptr src, struct jit_ctx *ctx);
-+
-+/* Simply emit the instruction if the JIT memory space has been allocated */
-+#define emit_instr(ctx, func, ...)                    \
-+do {                                                  \
-+      if ((ctx)->target != NULL) {                    \
-+              u32 *p = &(ctx)->target[ctx->idx];      \
-+              uasm_i_##func(&p, ##__VA_ARGS__);       \
-+      }                                               \
-+      (ctx)->idx++;                                   \
-+} while (0)
-+
-+/*
-+ * Similar to emit_instr but it must be used when we need to emit
-+ * 32-bit or 64-bit instructions
-+ */
-+#define emit_long_instr(ctx, func, ...)                       \
-+do {                                                  \
-+      if ((ctx)->target != NULL) {                    \
-+              u32 *p = &(ctx)->target[ctx->idx];      \
-+              UASM_i_##func(&p, ##__VA_ARGS__);       \
-+      }                                               \
-+      (ctx)->idx++;                                   \
-+} while (0)
-+
-+/* Determine if immediate is within the 16-bit signed range */
-+static inline bool is_range16(s32 imm)
-+{
-+      return !(imm >= SBIT(15) || imm < -SBIT(15));
-+}
-+
-+static inline void emit_addu(unsigned int dst, unsigned int src1,
-+                           unsigned int src2, struct jit_ctx *ctx)
-+{
-+      emit_instr(ctx, addu, dst, src1, src2);
-+}
-+
-+static inline void emit_nop(struct jit_ctx *ctx)
-+{
-+      emit_instr(ctx, nop);
-+}
-+
-+/* Load a u32 immediate to a register */
-+static inline void emit_load_imm(unsigned int dst, u32 imm, struct jit_ctx *ctx)
-+{
-+      if (ctx->target != NULL) {
-+              /* addiu can only handle s16 */
-+              if (!is_range16(imm)) {
-+                      u32 *p = &ctx->target[ctx->idx];
-+                      uasm_i_lui(&p, r_tmp_imm, (s32)imm >> 16);
-+                      p = &ctx->target[ctx->idx + 1];
-+                      uasm_i_ori(&p, dst, r_tmp_imm, imm & 0xffff);
-+              } else {
-+                      u32 *p = &ctx->target[ctx->idx];
-+                      uasm_i_addiu(&p, dst, r_zero, imm);
-+              }
-+      }
-+      ctx->idx++;
-+
-+      if (!is_range16(imm))
-+              ctx->idx++;
-+}
-+
-+static inline void emit_or(unsigned int dst, unsigned int src1,
-+                         unsigned int src2, struct jit_ctx *ctx)
-+{
-+      emit_instr(ctx, or, dst, src1, src2);
-+}
-+
-+static inline void emit_ori(unsigned int dst, unsigned src, u32 imm,
-+                          struct jit_ctx *ctx)
-+{
-+      if (imm >= BIT(16)) {
-+              emit_load_imm(r_tmp, imm, ctx);
-+              emit_or(dst, src, r_tmp, ctx);
-+      } else {
-+              emit_instr(ctx, ori, dst, src, imm);
-+      }
-+}
-+
-+static inline void emit_daddiu(unsigned int dst, unsigned int src,
-+                             int imm, struct jit_ctx *ctx)
-+{
-+      /*
-+       * Only used for stack, so the imm is relatively small
-+       * and it fits in 15-bits
-+       */
-+      emit_instr(ctx, daddiu, dst, src, imm);
-+}
-+
-+static inline void emit_addiu(unsigned int dst, unsigned int src,
-+                            u32 imm, struct jit_ctx *ctx)
-+{
-+      if (!is_range16(imm)) {
-+              emit_load_imm(r_tmp, imm, ctx);
-+              emit_addu(dst, r_tmp, src, ctx);
-+      } else {
-+              emit_instr(ctx, addiu, dst, src, imm);
-+      }
-+}
-+
-+static inline void emit_and(unsigned int dst, unsigned int src1,
-+                          unsigned int src2, struct jit_ctx *ctx)
-+{
-+      emit_instr(ctx, and, dst, src1, src2);
-+}
-+
-+static inline void emit_andi(unsigned int dst, unsigned int src,
-+                           u32 imm, struct jit_ctx *ctx)
-+{
-+      /* If imm does not fit in u16 then load it to register */
-+      if (imm >= BIT(16)) {
-+              emit_load_imm(r_tmp, imm, ctx);
-+              emit_and(dst, src, r_tmp, ctx);
-+      } else {
-+              emit_instr(ctx, andi, dst, src, imm);
-+      }
-+}
-+
-+static inline void emit_xor(unsigned int dst, unsigned int src1,
-+                          unsigned int src2, struct jit_ctx *ctx)
-+{
-+      emit_instr(ctx, xor, dst, src1, src2);
-+}
-+
-+static inline void emit_xori(ptr dst, ptr src, u32 imm, struct jit_ctx *ctx)
-+{
-+      /* If imm does not fit in u16 then load it to register */
-+      if (imm >= BIT(16)) {
-+              emit_load_imm(r_tmp, imm, ctx);
-+              emit_xor(dst, src, r_tmp, ctx);
-+      } else {
-+              emit_instr(ctx, xori, dst, src, imm);
-+      }
-+}
-+
-+static inline void emit_stack_offset(int offset, struct jit_ctx *ctx)
-+{
-+      emit_long_instr(ctx, ADDIU, r_sp, r_sp, offset);
-+}
-+
-+static inline void emit_subu(unsigned int dst, unsigned int src1,
-+                           unsigned int src2, struct jit_ctx *ctx)
-+{
-+      emit_instr(ctx, subu, dst, src1, src2);
-+}
-+
-+static inline void emit_neg(unsigned int reg, struct jit_ctx *ctx)
-+{
-+      emit_subu(reg, r_zero, reg, ctx);
-+}
-+
-+static inline void emit_sllv(unsigned int dst, unsigned int src,
-+                           unsigned int sa, struct jit_ctx *ctx)
-+{
-+      emit_instr(ctx, sllv, dst, src, sa);
-+}
-+
-+static inline void emit_sll(unsigned int dst, unsigned int src,
-+                          unsigned int sa, struct jit_ctx *ctx)
-+{
-+      /* sa is 5-bits long */
-+      if (sa >= BIT(5))
-+              /* Shifting >= 32 results in zero */
-+              emit_jit_reg_move(dst, r_zero, ctx);
-+      else
-+              emit_instr(ctx, sll, dst, src, sa);
-+}
-+
-+static inline void emit_srlv(unsigned int dst, unsigned int src,
-+                           unsigned int sa, struct jit_ctx *ctx)
-+{
-+      emit_instr(ctx, srlv, dst, src, sa);
-+}
-+
-+static inline void emit_srl(unsigned int dst, unsigned int src,
-+                          unsigned int sa, struct jit_ctx *ctx)
-+{
-+      /* sa is 5-bits long */
-+      if (sa >= BIT(5))
-+              /* Shifting >= 32 results in zero */
-+              emit_jit_reg_move(dst, r_zero, ctx);
-+      else
-+              emit_instr(ctx, srl, dst, src, sa);
-+}
-+
-+static inline void emit_slt(unsigned int dst, unsigned int src1,
-+                          unsigned int src2, struct jit_ctx *ctx)
-+{
-+      emit_instr(ctx, slt, dst, src1, src2);
-+}
-+
-+static inline void emit_sltu(unsigned int dst, unsigned int src1,
-+                           unsigned int src2, struct jit_ctx *ctx)
-+{
-+      emit_instr(ctx, sltu, dst, src1, src2);
-+}
-+
-+static inline void emit_sltiu(unsigned dst, unsigned int src,
-+                            unsigned int imm, struct jit_ctx *ctx)
-+{
-+      /* 16 bit immediate */
-+      if (!is_range16((s32)imm)) {
-+              emit_load_imm(r_tmp, imm, ctx);
-+              emit_sltu(dst, src, r_tmp, ctx);
-+      } else {
-+              emit_instr(ctx, sltiu, dst, src, imm);
-+      }
-+
-+}
-+
-+/* Store register on the stack */
-+static inline void emit_store_stack_reg(ptr reg, ptr base,
-+                                      unsigned int offset,
-+                                      struct jit_ctx *ctx)
-+{
-+      emit_long_instr(ctx, SW, reg, offset, base);
-+}
-+
-+static inline void emit_store(ptr reg, ptr base, unsigned int offset,
-+                            struct jit_ctx *ctx)
-+{
-+      emit_instr(ctx, sw, reg, offset, base);
-+}
-+
-+static inline void emit_load_stack_reg(ptr reg, ptr base,
-+                                     unsigned int offset,
-+                                     struct jit_ctx *ctx)
-+{
-+      emit_long_instr(ctx, LW, reg, offset, base);
-+}
-+
-+static inline void emit_load(unsigned int reg, unsigned int base,
-+                           unsigned int offset, struct jit_ctx *ctx)
-+{
-+      emit_instr(ctx, lw, reg, offset, base);
-+}
-+
-+static inline void emit_load_byte(unsigned int reg, unsigned int base,
-+                                unsigned int offset, struct jit_ctx *ctx)
-+{
-+      emit_instr(ctx, lb, reg, offset, base);
-+}
-+
-+static inline void emit_half_load(unsigned int reg, unsigned int base,
-+                                unsigned int offset, struct jit_ctx *ctx)
-+{
-+      emit_instr(ctx, lh, reg, offset, base);
-+}
-+
-+static inline void emit_half_load_unsigned(unsigned int reg, unsigned int base,
-+                                         unsigned int offset, struct jit_ctx *ctx)
-+{
-+      emit_instr(ctx, lhu, reg, offset, base);
-+}
-+
-+static inline void emit_mul(unsigned int dst, unsigned int src1,
-+                          unsigned int src2, struct jit_ctx *ctx)
-+{
-+      emit_instr(ctx, mul, dst, src1, src2);
-+}
-+
-+static inline void emit_div(unsigned int dst, unsigned int src,
-+                          struct jit_ctx *ctx)
-+{
-+      if (ctx->target != NULL) {
-+              u32 *p = &ctx->target[ctx->idx];
-+              uasm_i_divu(&p, dst, src);
-+              p = &ctx->target[ctx->idx + 1];
-+              uasm_i_mflo(&p, dst);
-+      }
-+      ctx->idx += 2; /* 2 insts */
-+}
-+
-+static inline void emit_mod(unsigned int dst, unsigned int src,
-+                          struct jit_ctx *ctx)
-+{
-+      if (ctx->target != NULL) {
-+              u32 *p = &ctx->target[ctx->idx];
-+              uasm_i_divu(&p, dst, src);
-+              p = &ctx->target[ctx->idx + 1];
-+              uasm_i_mfhi(&p, dst);
-+      }
-+      ctx->idx += 2; /* 2 insts */
-+}
-+
-+static inline void emit_dsll(unsigned int dst, unsigned int src,
-+                           unsigned int sa, struct jit_ctx *ctx)
-+{
-+      emit_instr(ctx, dsll, dst, src, sa);
-+}
-+
-+static inline void emit_dsrl32(unsigned int dst, unsigned int src,
-+                             unsigned int sa, struct jit_ctx *ctx)
-+{
-+      emit_instr(ctx, dsrl32, dst, src, sa);
-+}
-+
-+static inline void emit_wsbh(unsigned int dst, unsigned int src,
-+                           struct jit_ctx *ctx)
-+{
-+      emit_instr(ctx, wsbh, dst, src);
-+}
-+
-+/* load pointer to register */
-+static inline void emit_load_ptr(unsigned int dst, unsigned int src,
-+                                   int imm, struct jit_ctx *ctx)
-+{
-+      /* src contains the base addr of the 32/64-pointer */
-+      emit_long_instr(ctx, LW, dst, imm, src);
-+}
-+
-+/* load a function pointer to register */
-+static inline void emit_load_func(unsigned int reg, ptr imm,
-+                                struct jit_ctx *ctx)
-+{
-+      if (IS_ENABLED(CONFIG_64BIT)) {
-+              /* At this point imm is always 64-bit */
-+              emit_load_imm(r_tmp, (u64)imm >> 32, ctx);
-+              emit_dsll(r_tmp_imm, r_tmp, 16, ctx); /* left shift by 16 */
-+              emit_ori(r_tmp, r_tmp_imm, (imm >> 16) & 0xffff, ctx);
-+              emit_dsll(r_tmp_imm, r_tmp, 16, ctx); /* left shift by 16 */
-+              emit_ori(reg, r_tmp_imm, imm & 0xffff, ctx);
-+      } else {
-+              emit_load_imm(reg, imm, ctx);
-+      }
-+}
-+
-+/* Move to real MIPS register */
-+static inline void emit_reg_move(ptr dst, ptr src, struct jit_ctx *ctx)
-+{
-+      emit_long_instr(ctx, ADDU, dst, src, r_zero);
-+}
-+
-+/* Move to JIT (32-bit) register */
-+static inline void emit_jit_reg_move(ptr dst, ptr src, struct jit_ctx *ctx)
-+{
-+      emit_addu(dst, src, r_zero, ctx);
-+}
-+
-+/* Compute the immediate value for PC-relative branches. */
-+static inline u32 b_imm(unsigned int tgt, struct jit_ctx *ctx)
-+{
-+      if (ctx->target == NULL)
-+              return 0;
-+
-+      /*
-+       * We want a pc-relative branch. We only do forward branches
-+       * so tgt is always after pc. tgt is the instruction offset
-+       * we want to jump to.
-+
-+       * Branch on MIPS:
-+       * I: target_offset <- sign_extend(offset)
-+       * I+1: PC += target_offset (delay slot)
-+       *
-+       * ctx->idx currently points to the branch instruction
-+       * but the offset is added to the delay slot so we need
-+       * to subtract 4.
-+       */
-+      return ctx->offsets[tgt] -
-+              (ctx->idx * 4 - ctx->prologue_bytes) - 4;
-+}
-+
-+static inline void emit_bcond(int cond, unsigned int reg1, unsigned int reg2,
-+                           unsigned int imm, struct jit_ctx *ctx)
-+{
-+      if (ctx->target != NULL) {
-+              u32 *p = &ctx->target[ctx->idx];
-+
-+              switch (cond) {
-+              case MIPS_COND_EQ:
-+                      uasm_i_beq(&p, reg1, reg2, imm);
-+                      break;
-+              case MIPS_COND_NE:
-+                      uasm_i_bne(&p, reg1, reg2, imm);
-+                      break;
-+              case MIPS_COND_ALL:
-+                      uasm_i_b(&p, imm);
-+                      break;
-+              default:
-+                      pr_warn("%s: Unhandled branch conditional: %d\n",
-+                              __func__, cond);
-+              }
-+      }
-+      ctx->idx++;
-+}
-+
-+static inline void emit_b(unsigned int imm, struct jit_ctx *ctx)
-+{
-+      emit_bcond(MIPS_COND_ALL, r_zero, r_zero, imm, ctx);
-+}
-+
-+static inline void emit_jalr(unsigned int link, unsigned int reg,
-+                           struct jit_ctx *ctx)
-+{
-+      emit_instr(ctx, jalr, link, reg);
-+}
-+
-+static inline void emit_jr(unsigned int reg, struct jit_ctx *ctx)
-+{
-+      emit_instr(ctx, jr, reg);
-+}
-+
-+static inline u16 align_sp(unsigned int num)
-+{
-+      /* Double word alignment for 32-bit, quadword for 64-bit */
-+      unsigned int align = IS_ENABLED(CONFIG_64BIT) ? 16 : 8;
-+      num = (num + (align - 1)) & -align;
-+      return num;
-+}
-+
-+static void save_bpf_jit_regs(struct jit_ctx *ctx, unsigned offset)
-+{
-+      int i = 0, real_off = 0;
-+      u32 sflags, tmp_flags;
-+
-+      /* Adjust the stack pointer */
-+      if (offset)
-+              emit_stack_offset(-align_sp(offset), ctx);
-+
-+      tmp_flags = sflags = ctx->flags >> SEEN_SREG_SFT;
-+      /* sflags is essentially a bitmap */
-+      while (tmp_flags) {
-+              if ((sflags >> i) & 0x1) {
-+                      emit_store_stack_reg(MIPS_R_S0 + i, r_sp, real_off,
-+                                           ctx);
-+                      real_off += SZREG;
-+              }
-+              i++;
-+              tmp_flags >>= 1;
-+      }
-+
-+      /* save return address */
-+      if (ctx->flags & SEEN_CALL) {
-+              emit_store_stack_reg(r_ra, r_sp, real_off, ctx);
-+              real_off += SZREG;
-+      }
-+
-+      /* Setup r_M leaving the alignment gap if necessary */
-+      if (ctx->flags & SEEN_MEM) {
-+              if (real_off % (SZREG * 2))
-+                      real_off += SZREG;
-+              emit_long_instr(ctx, ADDIU, r_M, r_sp, real_off);
-+      }
-+}
-+
-+static void restore_bpf_jit_regs(struct jit_ctx *ctx,
-+                               unsigned int offset)
-+{
-+      int i, real_off = 0;
-+      u32 sflags, tmp_flags;
-+
-+      tmp_flags = sflags = ctx->flags >> SEEN_SREG_SFT;
-+      /* sflags is a bitmap */
-+      i = 0;
-+      while (tmp_flags) {
-+              if ((sflags >> i) & 0x1) {
-+                      emit_load_stack_reg(MIPS_R_S0 + i, r_sp, real_off,
-+                                          ctx);
-+                      real_off += SZREG;
-+              }
-+              i++;
-+              tmp_flags >>= 1;
-+      }
-+
-+      /* restore return address */
-+      if (ctx->flags & SEEN_CALL)
-+              emit_load_stack_reg(r_ra, r_sp, real_off, ctx);
-+
-+      /* Restore the sp and discard the scrach memory */
-+      if (offset)
-+              emit_stack_offset(align_sp(offset), ctx);
-+}
-+
-+static unsigned int get_stack_depth(struct jit_ctx *ctx)
-+{
-+      int sp_off = 0;
-+
-+
-+      /* How may s* regs do we need to preserved? */
-+      sp_off += hweight32(ctx->flags >> SEEN_SREG_SFT) * SZREG;
-+
-+      if (ctx->flags & SEEN_MEM)
-+              sp_off += 4 * BPF_MEMWORDS; /* BPF_MEMWORDS are 32-bit */
-+
-+      if (ctx->flags & SEEN_CALL)
-+              sp_off += SZREG; /* Space for our ra register */
-+
-+      return sp_off;
-+}
-+
-+static void build_prologue(struct jit_ctx *ctx)
-+{
-+      int sp_off;
-+
-+      /* Calculate the total offset for the stack pointer */
-+      sp_off = get_stack_depth(ctx);
-+      save_bpf_jit_regs(ctx, sp_off);
-+
-+      if (ctx->flags & SEEN_SKB)
-+              emit_reg_move(r_skb, MIPS_R_A0, ctx);
-+
-+      if (ctx->flags & SEEN_SKB_DATA) {
-+              /* Load packet length */
-+              emit_load(r_skb_len, r_skb, offsetof(struct sk_buff, len),
-+                        ctx);
-+              emit_load(r_tmp, r_skb, offsetof(struct sk_buff, data_len),
-+                        ctx);
-+              /* Load the data pointer */
-+              emit_load_ptr(r_skb_data, r_skb,
-+                            offsetof(struct sk_buff, data), ctx);
-+              /* Load the header length */
-+              emit_subu(r_skb_hl, r_skb_len, r_tmp, ctx);
-+      }
-+
-+      if (ctx->flags & SEEN_X)
-+              emit_jit_reg_move(r_X, r_zero, ctx);
-+
-+      /*
-+       * Do not leak kernel data to userspace, we only need to clear
-+       * r_A if it is ever used.  In fact if it is never used, we
-+       * will not save/restore it, so clearing it in this case would
-+       * corrupt the state of the caller.
-+       */
-+      if (bpf_needs_clear_a(&ctx->skf->insns[0]) &&
-+          (ctx->flags & SEEN_A))
-+              emit_jit_reg_move(r_A, r_zero, ctx);
-+}
-+
-+static void build_epilogue(struct jit_ctx *ctx)
-+{
-+      unsigned int sp_off;
-+
-+      /* Calculate the total offset for the stack pointer */
-+
-+      sp_off = get_stack_depth(ctx);
-+      restore_bpf_jit_regs(ctx, sp_off);
-+
-+      /* Return */
-+      emit_jr(r_ra, ctx);
-+      emit_nop(ctx);
-+}
-+
-+#define CHOOSE_LOAD_FUNC(K, func) \
-+      ((int)K < 0 ? ((int)K >= SKF_LL_OFF ? func##_negative : func) : \
-+       func##_positive)
-+
-+static int build_body(struct jit_ctx *ctx)
-+{
-+      const struct bpf_prog *prog = ctx->skf;
-+      const struct sock_filter *inst;
-+      unsigned int i, off, condt;
-+      u32 k, b_off __maybe_unused;
-+      u8 (*sk_load_func)(unsigned long *skb, int offset);
-+
-+      for (i = 0; i < prog->len; i++) {
-+              u16 code;
-+
-+              inst = &(prog->insns[i]);
-+              pr_debug("%s: code->0x%02x, jt->0x%x, jf->0x%x, k->0x%x\n",
-+                       __func__, inst->code, inst->jt, inst->jf, inst->k);
-+              k = inst->k;
-+              code = bpf_anc_helper(inst);
-+
-+              if (ctx->target == NULL)
-+                      ctx->offsets[i] = ctx->idx * 4;
-+
-+              switch (code) {
-+              case BPF_LD | BPF_IMM:
-+                      /* A <- k ==> li r_A, k */
-+                      ctx->flags |= SEEN_A;
-+                      emit_load_imm(r_A, k, ctx);
-+                      break;
-+              case BPF_LD | BPF_W | BPF_LEN:
-+                      BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, len) != 4);
-+                      /* A <- len ==> lw r_A, offset(skb) */
-+                      ctx->flags |= SEEN_SKB | SEEN_A;
-+                      off = offsetof(struct sk_buff, len);
-+                      emit_load(r_A, r_skb, off, ctx);
-+                      break;
-+              case BPF_LD | BPF_MEM:
-+                      /* A <- M[k] ==> lw r_A, offset(M) */
-+                      ctx->flags |= SEEN_MEM | SEEN_A;
-+                      emit_load(r_A, r_M, SCRATCH_OFF(k), ctx);
-+                      break;
-+              case BPF_LD | BPF_W | BPF_ABS:
-+                      /* A <- P[k:4] */
-+                      sk_load_func = CHOOSE_LOAD_FUNC(k, sk_load_word);
-+                      goto load;
-+              case BPF_LD | BPF_H | BPF_ABS:
-+                      /* A <- P[k:2] */
-+                      sk_load_func = CHOOSE_LOAD_FUNC(k, sk_load_half);
-+                      goto load;
-+              case BPF_LD | BPF_B | BPF_ABS:
-+                      /* A <- P[k:1] */
-+                      sk_load_func = CHOOSE_LOAD_FUNC(k, sk_load_byte);
-+load:
-+                      emit_load_imm(r_off, k, ctx);
-+load_common:
-+                      ctx->flags |= SEEN_CALL | SEEN_OFF |
-+                              SEEN_SKB | SEEN_A | SEEN_SKB_DATA;
-+
-+                      emit_load_func(r_s0, (ptr)sk_load_func, ctx);
-+                      emit_reg_move(MIPS_R_A0, r_skb, ctx);
-+                      emit_jalr(MIPS_R_RA, r_s0, ctx);
-+                      /* Load second argument to delay slot */
-+                      emit_reg_move(MIPS_R_A1, r_off, ctx);
-+                      /* Check the error value */
-+                      emit_bcond(MIPS_COND_EQ, r_ret, 0, b_imm(i + 1, ctx),
-+                                 ctx);
-+                      /* Load return register on DS for failures */
-+                      emit_reg_move(r_ret, r_zero, ctx);
-+                      /* Return with error */
-+                      emit_b(b_imm(prog->len, ctx), ctx);
-+                      emit_nop(ctx);
-+                      break;
-+              case BPF_LD | BPF_W | BPF_IND:
-+                      /* A <- P[X + k:4] */
-+                      sk_load_func = sk_load_word;
-+                      goto load_ind;
-+              case BPF_LD | BPF_H | BPF_IND:
-+                      /* A <- P[X + k:2] */
-+                      sk_load_func = sk_load_half;
-+                      goto load_ind;
-+              case BPF_LD | BPF_B | BPF_IND:
-+                      /* A <- P[X + k:1] */
-+                      sk_load_func = sk_load_byte;
-+load_ind:
-+                      ctx->flags |= SEEN_OFF | SEEN_X;
-+                      emit_addiu(r_off, r_X, k, ctx);
-+                      goto load_common;
-+              case BPF_LDX | BPF_IMM:
-+                      /* X <- k */
-+                      ctx->flags |= SEEN_X;
-+                      emit_load_imm(r_X, k, ctx);
-+                      break;
-+              case BPF_LDX | BPF_MEM:
-+                      /* X <- M[k] */
-+                      ctx->flags |= SEEN_X | SEEN_MEM;
-+                      emit_load(r_X, r_M, SCRATCH_OFF(k), ctx);
-+                      break;
-+              case BPF_LDX | BPF_W | BPF_LEN:
-+                      /* X <- len */
-+                      ctx->flags |= SEEN_X | SEEN_SKB;
-+                      off = offsetof(struct sk_buff, len);
-+                      emit_load(r_X, r_skb, off, ctx);
-+                      break;
-+              case BPF_LDX | BPF_B | BPF_MSH:
-+                      /* X <- 4 * (P[k:1] & 0xf) */
-+                      ctx->flags |= SEEN_X | SEEN_CALL | SEEN_SKB;
-+                      /* Load offset to a1 */
-+                      emit_load_func(r_s0, (ptr)sk_load_byte, ctx);
-+                      /*
-+                       * This may emit two instructions so it may not fit
-+                       * in the delay slot. So use a0 in the delay slot.
-+                       */
-+                      emit_load_imm(MIPS_R_A1, k, ctx);
-+                      emit_jalr(MIPS_R_RA, r_s0, ctx);
-+                      emit_reg_move(MIPS_R_A0, r_skb, ctx); /* delay slot */
-+                      /* Check the error value */
-+                      emit_bcond(MIPS_COND_NE, r_ret, 0,
-+                                 b_imm(prog->len, ctx), ctx);
-+                      emit_reg_move(r_ret, r_zero, ctx);
-+                      /* We are good */
-+                      /* X <- P[1:K] & 0xf */
-+                      emit_andi(r_X, r_A, 0xf, ctx);
-+                      /* X << 2 */
-+                      emit_b(b_imm(i + 1, ctx), ctx);
-+                      emit_sll(r_X, r_X, 2, ctx); /* delay slot */
-+                      break;
-+              case BPF_ST:
-+                      /* M[k] <- A */
-+                      ctx->flags |= SEEN_MEM | SEEN_A;
-+                      emit_store(r_A, r_M, SCRATCH_OFF(k), ctx);
-+                      break;
-+              case BPF_STX:
-+                      /* M[k] <- X */
-+                      ctx->flags |= SEEN_MEM | SEEN_X;
-+                      emit_store(r_X, r_M, SCRATCH_OFF(k), ctx);
-+                      break;
-+              case BPF_ALU | BPF_ADD | BPF_K:
-+                      /* A += K */
-+                      ctx->flags |= SEEN_A;
-+                      emit_addiu(r_A, r_A, k, ctx);
-+                      break;
-+              case BPF_ALU | BPF_ADD | BPF_X:
-+                      /* A += X */
-+                      ctx->flags |= SEEN_A | SEEN_X;
-+                      emit_addu(r_A, r_A, r_X, ctx);
-+                      break;
-+              case BPF_ALU | BPF_SUB | BPF_K:
-+                      /* A -= K */
-+                      ctx->flags |= SEEN_A;
-+                      emit_addiu(r_A, r_A, -k, ctx);
-+                      break;
-+              case BPF_ALU | BPF_SUB | BPF_X:
-+                      /* A -= X */
-+                      ctx->flags |= SEEN_A | SEEN_X;
-+                      emit_subu(r_A, r_A, r_X, ctx);
-+                      break;
-+              case BPF_ALU | BPF_MUL | BPF_K:
-+                      /* A *= K */
-+                      /* Load K to scratch register before MUL */
-+                      ctx->flags |= SEEN_A;
-+                      emit_load_imm(r_s0, k, ctx);
-+                      emit_mul(r_A, r_A, r_s0, ctx);
-+                      break;
-+              case BPF_ALU | BPF_MUL | BPF_X:
-+                      /* A *= X */
-+                      ctx->flags |= SEEN_A | SEEN_X;
-+                      emit_mul(r_A, r_A, r_X, ctx);
-+                      break;
-+              case BPF_ALU | BPF_DIV | BPF_K:
-+                      /* A /= k */
-+                      if (k == 1)
-+                              break;
-+                      if (optimize_div(&k)) {
-+                              ctx->flags |= SEEN_A;
-+                              emit_srl(r_A, r_A, k, ctx);
-+                              break;
-+                      }
-+                      ctx->flags |= SEEN_A;
-+                      emit_load_imm(r_s0, k, ctx);
-+                      emit_div(r_A, r_s0, ctx);
-+                      break;
-+              case BPF_ALU | BPF_MOD | BPF_K:
-+                      /* A %= k */
-+                      if (k == 1) {
-+                              ctx->flags |= SEEN_A;
-+                              emit_jit_reg_move(r_A, r_zero, ctx);
-+                      } else {
-+                              ctx->flags |= SEEN_A;
-+                              emit_load_imm(r_s0, k, ctx);
-+                              emit_mod(r_A, r_s0, ctx);
-+                      }
-+                      break;
-+              case BPF_ALU | BPF_DIV | BPF_X:
-+                      /* A /= X */
-+                      ctx->flags |= SEEN_X | SEEN_A;
-+                      /* Check if r_X is zero */
-+                      emit_bcond(MIPS_COND_EQ, r_X, r_zero,
-+                                 b_imm(prog->len, ctx), ctx);
-+                      emit_load_imm(r_ret, 0, ctx); /* delay slot */
-+                      emit_div(r_A, r_X, ctx);
-+                      break;
-+              case BPF_ALU | BPF_MOD | BPF_X:
-+                      /* A %= X */
-+                      ctx->flags |= SEEN_X | SEEN_A;
-+                      /* Check if r_X is zero */
-+                      emit_bcond(MIPS_COND_EQ, r_X, r_zero,
-+                                 b_imm(prog->len, ctx), ctx);
-+                      emit_load_imm(r_ret, 0, ctx); /* delay slot */
-+                      emit_mod(r_A, r_X, ctx);
-+                      break;
-+              case BPF_ALU | BPF_OR | BPF_K:
-+                      /* A |= K */
-+                      ctx->flags |= SEEN_A;
-+                      emit_ori(r_A, r_A, k, ctx);
-+                      break;
-+              case BPF_ALU | BPF_OR | BPF_X:
-+                      /* A |= X */
-+                      ctx->flags |= SEEN_A;
-+                      emit_ori(r_A, r_A, r_X, ctx);
-+                      break;
-+              case BPF_ALU | BPF_XOR | BPF_K:
-+                      /* A ^= k */
-+                      ctx->flags |= SEEN_A;
-+                      emit_xori(r_A, r_A, k, ctx);
-+                      break;
-+              case BPF_ANC | SKF_AD_ALU_XOR_X:
-+              case BPF_ALU | BPF_XOR | BPF_X:
-+                      /* A ^= X */
-+                      ctx->flags |= SEEN_A;
-+                      emit_xor(r_A, r_A, r_X, ctx);
-+                      break;
-+              case BPF_ALU | BPF_AND | BPF_K:
-+                      /* A &= K */
-+                      ctx->flags |= SEEN_A;
-+                      emit_andi(r_A, r_A, k, ctx);
-+                      break;
-+              case BPF_ALU | BPF_AND | BPF_X:
-+                      /* A &= X */
-+                      ctx->flags |= SEEN_A | SEEN_X;
-+                      emit_and(r_A, r_A, r_X, ctx);
-+                      break;
-+              case BPF_ALU | BPF_LSH | BPF_K:
-+                      /* A <<= K */
-+                      ctx->flags |= SEEN_A;
-+                      emit_sll(r_A, r_A, k, ctx);
-+                      break;
-+              case BPF_ALU | BPF_LSH | BPF_X:
-+                      /* A <<= X */
-+                      ctx->flags |= SEEN_A | SEEN_X;
-+                      emit_sllv(r_A, r_A, r_X, ctx);
-+                      break;
-+              case BPF_ALU | BPF_RSH | BPF_K:
-+                      /* A >>= K */
-+                      ctx->flags |= SEEN_A;
-+                      emit_srl(r_A, r_A, k, ctx);
-+                      break;
-+              case BPF_ALU | BPF_RSH | BPF_X:
-+                      ctx->flags |= SEEN_A | SEEN_X;
-+                      emit_srlv(r_A, r_A, r_X, ctx);
-+                      break;
-+              case BPF_ALU | BPF_NEG:
-+                      /* A = -A */
-+                      ctx->flags |= SEEN_A;
-+                      emit_neg(r_A, ctx);
-+                      break;
-+              case BPF_JMP | BPF_JA:
-+                      /* pc += K */
-+                      emit_b(b_imm(i + k + 1, ctx), ctx);
-+                      emit_nop(ctx);
-+                      break;
-+              case BPF_JMP | BPF_JEQ | BPF_K:
-+                      /* pc += ( A == K ) ? pc->jt : pc->jf */
-+                      condt = MIPS_COND_EQ | MIPS_COND_K;
-+                      goto jmp_cmp;
-+              case BPF_JMP | BPF_JEQ | BPF_X:
-+                      ctx->flags |= SEEN_X;
-+                      /* pc += ( A == X ) ? pc->jt : pc->jf */
-+                      condt = MIPS_COND_EQ | MIPS_COND_X;
-+                      goto jmp_cmp;
-+              case BPF_JMP | BPF_JGE | BPF_K:
-+                      /* pc += ( A >= K ) ? pc->jt : pc->jf */
-+                      condt = MIPS_COND_GE | MIPS_COND_K;
-+                      goto jmp_cmp;
-+              case BPF_JMP | BPF_JGE | BPF_X:
-+                      ctx->flags |= SEEN_X;
-+                      /* pc += ( A >= X ) ? pc->jt : pc->jf */
-+                      condt = MIPS_COND_GE | MIPS_COND_X;
-+                      goto jmp_cmp;
-+              case BPF_JMP | BPF_JGT | BPF_K:
-+                      /* pc += ( A > K ) ? pc->jt : pc->jf */
-+                      condt = MIPS_COND_GT | MIPS_COND_K;
-+                      goto jmp_cmp;
-+              case BPF_JMP | BPF_JGT | BPF_X:
-+                      ctx->flags |= SEEN_X;
-+                      /* pc += ( A > X ) ? pc->jt : pc->jf */
-+                      condt = MIPS_COND_GT | MIPS_COND_X;
-+jmp_cmp:
-+                      /* Greater or Equal */
-+                      if ((condt & MIPS_COND_GE) ||
-+                          (condt & MIPS_COND_GT)) {
-+                              if (condt & MIPS_COND_K) { /* K */
-+                                      ctx->flags |= SEEN_A;
-+                                      emit_sltiu(r_s0, r_A, k, ctx);
-+                              } else { /* X */
-+                                      ctx->flags |= SEEN_A |
-+                                              SEEN_X;
-+                                      emit_sltu(r_s0, r_A, r_X, ctx);
-+                              }
-+                              /* A < (K|X) ? r_scrach = 1 */
-+                              b_off = b_imm(i + inst->jf + 1, ctx);
-+                              emit_bcond(MIPS_COND_NE, r_s0, r_zero, b_off,
-+                                         ctx);
-+                              emit_nop(ctx);
-+                              /* A > (K|X) ? scratch = 0 */
-+                              if (condt & MIPS_COND_GT) {
-+                                      /* Checking for equality */
-+                                      ctx->flags |= SEEN_A | SEEN_X;
-+                                      if (condt & MIPS_COND_K)
-+                                              emit_load_imm(r_s0, k, ctx);
-+                                      else
-+                                              emit_jit_reg_move(r_s0, r_X,
-+                                                                ctx);
-+                                      b_off = b_imm(i + inst->jf + 1, ctx);
-+                                      emit_bcond(MIPS_COND_EQ, r_A, r_s0,
-+                                                 b_off, ctx);
-+                                      emit_nop(ctx);
-+                                      /* Finally, A > K|X */
-+                                      b_off = b_imm(i + inst->jt + 1, ctx);
-+                                      emit_b(b_off, ctx);
-+                                      emit_nop(ctx);
-+                              } else {
-+                                      /* A >= (K|X) so jump */
-+                                      b_off = b_imm(i + inst->jt + 1, ctx);
-+                                      emit_b(b_off, ctx);
-+                                      emit_nop(ctx);
-+                              }
-+                      } else {
-+                              /* A == K|X */
-+                              if (condt & MIPS_COND_K) { /* K */
-+                                      ctx->flags |= SEEN_A;
-+                                      emit_load_imm(r_s0, k, ctx);
-+                                      /* jump true */
-+                                      b_off = b_imm(i + inst->jt + 1, ctx);
-+                                      emit_bcond(MIPS_COND_EQ, r_A, r_s0,
-+                                                 b_off, ctx);
-+                                      emit_nop(ctx);
-+                                      /* jump false */
-+                                      b_off = b_imm(i + inst->jf + 1,
-+                                                    ctx);
-+                                      emit_bcond(MIPS_COND_NE, r_A, r_s0,
-+                                                 b_off, ctx);
-+                                      emit_nop(ctx);
-+                              } else { /* X */
-+                                      /* jump true */
-+                                      ctx->flags |= SEEN_A | SEEN_X;
-+                                      b_off = b_imm(i + inst->jt + 1,
-+                                                    ctx);
-+                                      emit_bcond(MIPS_COND_EQ, r_A, r_X,
-+                                                 b_off, ctx);
-+                                      emit_nop(ctx);
-+                                      /* jump false */
-+                                      b_off = b_imm(i + inst->jf + 1, ctx);
-+                                      emit_bcond(MIPS_COND_NE, r_A, r_X,
-+                                                 b_off, ctx);
-+                                      emit_nop(ctx);
-+                              }
-+                      }
-+                      break;
-+              case BPF_JMP | BPF_JSET | BPF_K:
-+                      ctx->flags |= SEEN_A;
-+                      /* pc += (A & K) ? pc -> jt : pc -> jf */
-+                      emit_load_imm(r_s1, k, ctx);
-+                      emit_and(r_s0, r_A, r_s1, ctx);
-+                      /* jump true */
-+                      b_off = b_imm(i + inst->jt + 1, ctx);
-+                      emit_bcond(MIPS_COND_NE, r_s0, r_zero, b_off, ctx);
-+                      emit_nop(ctx);
-+                      /* jump false */
-+                      b_off = b_imm(i + inst->jf + 1, ctx);
-+                      emit_b(b_off, ctx);
-+                      emit_nop(ctx);
-+                      break;
-+              case BPF_JMP | BPF_JSET | BPF_X:
-+                      ctx->flags |= SEEN_X | SEEN_A;
-+                      /* pc += (A & X) ? pc -> jt : pc -> jf */
-+                      emit_and(r_s0, r_A, r_X, ctx);
-+                      /* jump true */
-+                      b_off = b_imm(i + inst->jt + 1, ctx);
-+                      emit_bcond(MIPS_COND_NE, r_s0, r_zero, b_off, ctx);
-+                      emit_nop(ctx);
-+                      /* jump false */
-+                      b_off = b_imm(i + inst->jf + 1, ctx);
-+                      emit_b(b_off, ctx);
-+                      emit_nop(ctx);
-+                      break;
-+              case BPF_RET | BPF_A:
-+                      ctx->flags |= SEEN_A;
-+                      if (i != prog->len - 1)
-+                              /*
-+                               * If this is not the last instruction
-+                               * then jump to the epilogue
-+                               */
-+                              emit_b(b_imm(prog->len, ctx), ctx);
-+                      emit_reg_move(r_ret, r_A, ctx); /* delay slot */
-+                      break;
-+              case BPF_RET | BPF_K:
-+                      /*
-+                       * It can emit two instructions so it does not fit on
-+                       * the delay slot.
-+                       */
-+                      emit_load_imm(r_ret, k, ctx);
-+                      if (i != prog->len - 1) {
-+                              /*
-+                               * If this is not the last instruction
-+                               * then jump to the epilogue
-+                               */
-+                              emit_b(b_imm(prog->len, ctx), ctx);
-+                              emit_nop(ctx);
-+                      }
-+                      break;
-+              case BPF_MISC | BPF_TAX:
-+                      /* X = A */
-+                      ctx->flags |= SEEN_X | SEEN_A;
-+                      emit_jit_reg_move(r_X, r_A, ctx);
-+                      break;
-+              case BPF_MISC | BPF_TXA:
-+                      /* A = X */
-+                      ctx->flags |= SEEN_A | SEEN_X;
-+                      emit_jit_reg_move(r_A, r_X, ctx);
-+                      break;
-+              /* AUX */
-+              case BPF_ANC | SKF_AD_PROTOCOL:
-+                      /* A = ntohs(skb->protocol */
-+                      ctx->flags |= SEEN_SKB | SEEN_OFF | SEEN_A;
-+                      BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff,
-+                                                protocol) != 2);
-+                      off = offsetof(struct sk_buff, protocol);
-+                      emit_half_load(r_A, r_skb, off, ctx);
-+#ifdef CONFIG_CPU_LITTLE_ENDIAN
-+                      /* This needs little endian fixup */
-+                      if (cpu_has_wsbh) {
-+                              /* R2 and later have the wsbh instruction */
-+                              emit_wsbh(r_A, r_A, ctx);
-+                      } else {
-+                              /* Get first byte */
-+                              emit_andi(r_tmp_imm, r_A, 0xff, ctx);
-+                              /* Shift it */
-+                              emit_sll(r_tmp, r_tmp_imm, 8, ctx);
-+                              /* Get second byte */
-+                              emit_srl(r_tmp_imm, r_A, 8, ctx);
-+                              emit_andi(r_tmp_imm, r_tmp_imm, 0xff, ctx);
-+                              /* Put everyting together in r_A */
-+                              emit_or(r_A, r_tmp, r_tmp_imm, ctx);
-+                      }
-+#endif
-+                      break;
-+              case BPF_ANC | SKF_AD_CPU:
-+                      ctx->flags |= SEEN_A | SEEN_OFF;
-+                      /* A = current_thread_info()->cpu */
-+                      BUILD_BUG_ON(FIELD_SIZEOF(struct thread_info,
-+                                                cpu) != 4);
-+                      off = offsetof(struct thread_info, cpu);
-+                      /* $28/gp points to the thread_info struct */
-+                      emit_load(r_A, 28, off, ctx);
-+                      break;
-+              case BPF_ANC | SKF_AD_IFINDEX:
-+                      /* A = skb->dev->ifindex */
-+              case BPF_ANC | SKF_AD_HATYPE:
-+                      /* A = skb->dev->type */
-+                      ctx->flags |= SEEN_SKB | SEEN_A;
-+                      off = offsetof(struct sk_buff, dev);
-+                      /* Load *dev pointer */
-+                      emit_load_ptr(r_s0, r_skb, off, ctx);
-+                      /* error (0) in the delay slot */
-+                      emit_bcond(MIPS_COND_EQ, r_s0, r_zero,
-+                                 b_imm(prog->len, ctx), ctx);
-+                      emit_reg_move(r_ret, r_zero, ctx);
-+                      if (code == (BPF_ANC | SKF_AD_IFINDEX)) {
-+                              BUILD_BUG_ON(FIELD_SIZEOF(struct net_device, ifindex) != 4);
-+                              off = offsetof(struct net_device, ifindex);
-+                              emit_load(r_A, r_s0, off, ctx);
-+                      } else { /* (code == (BPF_ANC | SKF_AD_HATYPE) */
-+                              BUILD_BUG_ON(FIELD_SIZEOF(struct net_device, type) != 2);
-+                              off = offsetof(struct net_device, type);
-+                              emit_half_load_unsigned(r_A, r_s0, off, ctx);
-+                      }
-+                      break;
-+              case BPF_ANC | SKF_AD_MARK:
-+                      ctx->flags |= SEEN_SKB | SEEN_A;
-+                      BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, mark) != 4);
-+                      off = offsetof(struct sk_buff, mark);
-+                      emit_load(r_A, r_skb, off, ctx);
-+                      break;
-+              case BPF_ANC | SKF_AD_RXHASH:
-+                      ctx->flags |= SEEN_SKB | SEEN_A;
-+                      BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, hash) != 4);
-+                      off = offsetof(struct sk_buff, hash);
-+                      emit_load(r_A, r_skb, off, ctx);
-+                      break;
-+              case BPF_ANC | SKF_AD_VLAN_TAG:
-+                      ctx->flags |= SEEN_SKB | SEEN_A;
-+                      BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff,
-+                                                vlan_tci) != 2);
-+                      off = offsetof(struct sk_buff, vlan_tci);
-+                      emit_half_load_unsigned(r_A, r_skb, off, ctx);
-+                      break;
-+              case BPF_ANC | SKF_AD_VLAN_TAG_PRESENT:
-+                      ctx->flags |= SEEN_SKB | SEEN_A;
-+                      emit_load_byte(r_A, r_skb, PKT_VLAN_PRESENT_OFFSET(), ctx);
-+                      if (PKT_VLAN_PRESENT_BIT)
-+                              emit_srl(r_A, r_A, PKT_VLAN_PRESENT_BIT, ctx);
-+                      if (PKT_VLAN_PRESENT_BIT < 7)
-+                              emit_andi(r_A, r_A, 1, ctx);
-+                      break;
-+              case BPF_ANC | SKF_AD_PKTTYPE:
-+                      ctx->flags |= SEEN_SKB;
-+
-+                      emit_load_byte(r_tmp, r_skb, PKT_TYPE_OFFSET(), ctx);
-+                      /* Keep only the last 3 bits */
-+                      emit_andi(r_A, r_tmp, PKT_TYPE_MAX, ctx);
-+#ifdef __BIG_ENDIAN_BITFIELD
-+                      /* Get the actual packet type to the lower 3 bits */
-+                      emit_srl(r_A, r_A, 5, ctx);
-+#endif
-+                      break;
-+              case BPF_ANC | SKF_AD_QUEUE:
-+                      ctx->flags |= SEEN_SKB | SEEN_A;
-+                      BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff,
-+                                                queue_mapping) != 2);
-+                      BUILD_BUG_ON(offsetof(struct sk_buff,
-+                                            queue_mapping) > 0xff);
-+                      off = offsetof(struct sk_buff, queue_mapping);
-+                      emit_half_load_unsigned(r_A, r_skb, off, ctx);
-+                      break;
-+              default:
-+                      pr_debug("%s: Unhandled opcode: 0x%02x\n", __FILE__,
-+                               inst->code);
-+                      return -1;
-+              }
-+      }
-+
-+      /* compute offsets only during the first pass */
-+      if (ctx->target == NULL)
-+              ctx->offsets[i] = ctx->idx * 4;
-+
-+      return 0;
-+}
-+
-+void bpf_jit_compile(struct bpf_prog *fp)
-+{
-+      struct jit_ctx ctx;
-+      unsigned int alloc_size, tmp_idx;
-+
-+      if (!bpf_jit_enable)
-+              return;
-+
-+      memset(&ctx, 0, sizeof(ctx));
-+
-+      ctx.offsets = kcalloc(fp->len + 1, sizeof(*ctx.offsets), GFP_KERNEL);
-+      if (ctx.offsets == NULL)
-+              return;
-+
-+      ctx.skf = fp;
-+
-+      if (build_body(&ctx))
-+              goto out;
-+
-+      tmp_idx = ctx.idx;
-+      build_prologue(&ctx);
-+      ctx.prologue_bytes = (ctx.idx - tmp_idx) * 4;
-+      /* just to complete the ctx.idx count */
-+      build_epilogue(&ctx);
-+
-+      alloc_size = 4 * ctx.idx;
-+      ctx.target = module_alloc(alloc_size);
-+      if (ctx.target == NULL)
-+              goto out;
-+
-+      /* Clean it */
-+      memset(ctx.target, 0, alloc_size);
-+
-+      ctx.idx = 0;
-+
-+      /* Generate the actual JIT code */
-+      build_prologue(&ctx);
-+      build_body(&ctx);
-+      build_epilogue(&ctx);
-+
-+      /* Update the icache */
-+      flush_icache_range((ptr)ctx.target, (ptr)(ctx.target + ctx.idx));
-+
-+      if (bpf_jit_enable > 1)
-+              /* Dump JIT code */
-+              bpf_jit_dump(fp->len, alloc_size, 2, ctx.target);
-+
-+      fp->bpf_func = (void *)ctx.target;
-+      fp->jited = 1;
-+
-+out:
-+      kfree(ctx.offsets);
-+}
-+
-+void bpf_jit_free(struct bpf_prog *fp)
-+{
-+      if (fp->jited)
-+              module_memfree(fp->bpf_func);
-+
-+      bpf_prog_unlock_free(fp);
-+}
---- /dev/null
-+++ b/arch/mips/net/bpf_jit_asm.S
-@@ -0,0 +1,285 @@
-+/*
-+ * bpf_jib_asm.S: Packet/header access helper functions for MIPS/MIPS64 BPF
-+ * compiler.
-+ *
-+ * Copyright (C) 2015 Imagination Technologies Ltd.
-+ * Author: Markos Chandras <markos.chandras@imgtec.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License as published by the
-+ * Free Software Foundation; version 2 of the License.
-+ */
-+
-+#include <asm/asm.h>
-+#include <asm/isa-rev.h>
-+#include <asm/regdef.h>
-+#include "bpf_jit.h"
-+
-+/* ABI
-+ *
-+ * r_skb_hl   skb header length
-+ * r_skb_data skb data
-+ * r_off(a1)  offset register
-+ * r_A                BPF register A
-+ * r_X                PF register X
-+ * r_skb(a0)  *skb
-+ * r_M                *scratch memory
-+ * r_skb_le   skb length
-+ * r_s0               Scratch register 0
-+ * r_s1               Scratch register 1
-+ *
-+ * On entry:
-+ * a0: *skb
-+ * a1: offset (imm or imm + X)
-+ *
-+ * All non-BPF-ABI registers are free for use. On return, we only
-+ * care about r_ret. The BPF-ABI registers are assumed to remain
-+ * unmodified during the entire filter operation.
-+ */
-+
-+#define skb   a0
-+#define offset        a1
-+#define SKF_LL_OFF  (-0x200000) /* Can't include linux/filter.h in assembly */
-+
-+      /* We know better :) so prevent assembler reordering etc */
-+      .set    noreorder
-+
-+#define is_offset_negative(TYPE)                              \
-+      /* If offset is negative we have more work to do */     \
-+      slti    t0, offset, 0;                                  \
-+      bgtz    t0, bpf_slow_path_##TYPE##_neg;                 \
-+      /* Be careful what follows in DS. */
-+
-+#define is_offset_in_header(SIZE, TYPE)                               \
-+      /* Reading from header? */                              \
-+      addiu   $r_s0, $r_skb_hl, -SIZE;                        \
-+      slt     t0, $r_s0, offset;                              \
-+      bgtz    t0, bpf_slow_path_##TYPE;                       \
-+
-+LEAF(sk_load_word)
-+      is_offset_negative(word)
-+FEXPORT(sk_load_word_positive)
-+      is_offset_in_header(4, word)
-+      /* Offset within header boundaries */
-+      PTR_ADDU t1, $r_skb_data, offset
-+      .set    reorder
-+      lw      $r_A, 0(t1)
-+      .set    noreorder
-+#ifdef CONFIG_CPU_LITTLE_ENDIAN
-+# if MIPS_ISA_REV >= 2
-+      wsbh    t0, $r_A
-+      rotr    $r_A, t0, 16
-+# else
-+      sll     t0, $r_A, 24
-+      srl     t1, $r_A, 24
-+      srl     t2, $r_A, 8
-+      or      t0, t0, t1
-+      andi    t2, t2, 0xff00
-+      andi    t1, $r_A, 0xff00
-+      or      t0, t0, t2
-+      sll     t1, t1, 8
-+      or      $r_A, t0, t1
-+# endif
-+#endif
-+      jr      $r_ra
-+       move   $r_ret, zero
-+      END(sk_load_word)
-+
-+LEAF(sk_load_half)
-+      is_offset_negative(half)
-+FEXPORT(sk_load_half_positive)
-+      is_offset_in_header(2, half)
-+      /* Offset within header boundaries */
-+      PTR_ADDU t1, $r_skb_data, offset
-+      lhu     $r_A, 0(t1)
-+#ifdef CONFIG_CPU_LITTLE_ENDIAN
-+# if MIPS_ISA_REV >= 2
-+      wsbh    $r_A, $r_A
-+# else
-+      sll     t0, $r_A, 8
-+      srl     t1, $r_A, 8
-+      andi    t0, t0, 0xff00
-+      or      $r_A, t0, t1
-+# endif
-+#endif
-+      jr      $r_ra
-+       move   $r_ret, zero
-+      END(sk_load_half)
-+
-+LEAF(sk_load_byte)
-+      is_offset_negative(byte)
-+FEXPORT(sk_load_byte_positive)
-+      is_offset_in_header(1, byte)
-+      /* Offset within header boundaries */
-+      PTR_ADDU t1, $r_skb_data, offset
-+      lbu     $r_A, 0(t1)
-+      jr      $r_ra
-+       move   $r_ret, zero
-+      END(sk_load_byte)
-+
-+/*
-+ * call skb_copy_bits:
-+ * (prototype in linux/skbuff.h)
-+ *
-+ * int skb_copy_bits(sk_buff *skb, int offset, void *to, int len)
-+ *
-+ * o32 mandates we leave 4 spaces for argument registers in case
-+ * the callee needs to use them. Even though we don't care about
-+ * the argument registers ourselves, we need to allocate that space
-+ * to remain ABI compliant since the callee may want to use that space.
-+ * We also allocate 2 more spaces for $r_ra and our return register (*to).
-+ *
-+ * n64 is a bit different. The *caller* will allocate the space to preserve
-+ * the arguments. So in 64-bit kernels, we allocate the 4-arg space for no
-+ * good reason but it does not matter that much really.
-+ *
-+ * (void *to) is returned in r_s0
-+ *
-+ */
-+#ifdef CONFIG_CPU_LITTLE_ENDIAN
-+#define DS_OFFSET(SIZE) (4 * SZREG)
-+#else
-+#define DS_OFFSET(SIZE) ((4 * SZREG) + (4 - SIZE))
-+#endif
-+#define bpf_slow_path_common(SIZE)                            \
-+      /* Quick check. Are we within reasonable boundaries? */ \
-+      LONG_ADDIU      $r_s1, $r_skb_len, -SIZE;               \
-+      sltu            $r_s0, offset, $r_s1;                   \
-+      beqz            $r_s0, fault;                           \
-+      /* Load 4th argument in DS */                           \
-+       LONG_ADDIU     a3, zero, SIZE;                         \
-+      PTR_ADDIU       $r_sp, $r_sp, -(6 * SZREG);             \
-+      PTR_LA          t0, skb_copy_bits;                      \
-+      PTR_S           $r_ra, (5 * SZREG)($r_sp);              \
-+      /* Assign low slot to a2 */                             \
-+      PTR_ADDIU       a2, $r_sp, DS_OFFSET(SIZE);             \
-+      jalr            t0;                                     \
-+      /* Reset our destination slot (DS but it's ok) */       \
-+       INT_S          zero, (4 * SZREG)($r_sp);               \
-+      /*                                                      \
-+       * skb_copy_bits returns 0 on success and -EFAULT       \
-+       * on error. Our data live in a2. Do not bother with    \
-+       * our data if an error has been returned.              \
-+       */                                                     \
-+      /* Restore our frame */                                 \
-+      PTR_L           $r_ra, (5 * SZREG)($r_sp);              \
-+      INT_L           $r_s0, (4 * SZREG)($r_sp);              \
-+      bltz            v0, fault;                              \
-+       PTR_ADDIU      $r_sp, $r_sp, 6 * SZREG;                \
-+      move            $r_ret, zero;                           \
-+
-+NESTED(bpf_slow_path_word, (6 * SZREG), $r_sp)
-+      bpf_slow_path_common(4)
-+#ifdef CONFIG_CPU_LITTLE_ENDIAN
-+# if MIPS_ISA_REV >= 2
-+      wsbh    t0, $r_s0
-+      jr      $r_ra
-+       rotr   $r_A, t0, 16
-+# else
-+      sll     t0, $r_s0, 24
-+      srl     t1, $r_s0, 24
-+      srl     t2, $r_s0, 8
-+      or      t0, t0, t1
-+      andi    t2, t2, 0xff00
-+      andi    t1, $r_s0, 0xff00
-+      or      t0, t0, t2
-+      sll     t1, t1, 8
-+      jr      $r_ra
-+       or     $r_A, t0, t1
-+# endif
-+#else
-+      jr      $r_ra
-+       move   $r_A, $r_s0
-+#endif
-+
-+      END(bpf_slow_path_word)
-+
-+NESTED(bpf_slow_path_half, (6 * SZREG), $r_sp)
-+      bpf_slow_path_common(2)
-+#ifdef CONFIG_CPU_LITTLE_ENDIAN
-+# if MIPS_ISA_REV >= 2
-+      jr      $r_ra
-+       wsbh   $r_A, $r_s0
-+# else
-+      sll     t0, $r_s0, 8
-+      andi    t1, $r_s0, 0xff00
-+      andi    t0, t0, 0xff00
-+      srl     t1, t1, 8
-+      jr      $r_ra
-+       or     $r_A, t0, t1
-+# endif
-+#else
-+      jr      $r_ra
-+       move   $r_A, $r_s0
-+#endif
-+
-+      END(bpf_slow_path_half)
-+
-+NESTED(bpf_slow_path_byte, (6 * SZREG), $r_sp)
-+      bpf_slow_path_common(1)
-+      jr      $r_ra
-+       move   $r_A, $r_s0
-+
-+      END(bpf_slow_path_byte)
-+
-+/*
-+ * Negative entry points
-+ */
-+      .macro bpf_is_end_of_data
-+      li      t0, SKF_LL_OFF
-+      /* Reading link layer data? */
-+      slt     t1, offset, t0
-+      bgtz    t1, fault
-+      /* Be careful what follows in DS. */
-+      .endm
-+/*
-+ * call skb_copy_bits:
-+ * (prototype in linux/filter.h)
-+ *
-+ * void *bpf_internal_load_pointer_neg_helper(const struct sk_buff *skb,
-+ *                                            int k, unsigned int size)
-+ *
-+ * see above (bpf_slow_path_common) for ABI restrictions
-+ */
-+#define bpf_negative_common(SIZE)                                     \
-+      PTR_ADDIU       $r_sp, $r_sp, -(6 * SZREG);                     \
-+      PTR_LA          t0, bpf_internal_load_pointer_neg_helper;       \
-+      PTR_S           $r_ra, (5 * SZREG)($r_sp);                      \
-+      jalr            t0;                                             \
-+       li             a2, SIZE;                                       \
-+      PTR_L           $r_ra, (5 * SZREG)($r_sp);                      \
-+      /* Check return pointer */                                      \
-+      beqz            v0, fault;                                      \
-+       PTR_ADDIU      $r_sp, $r_sp, 6 * SZREG;                        \
-+      /* Preserve our pointer */                                      \
-+      move            $r_s0, v0;                                      \
-+      /* Set return value */                                          \
-+      move            $r_ret, zero;                                   \
-+
-+bpf_slow_path_word_neg:
-+      bpf_is_end_of_data
-+NESTED(sk_load_word_negative, (6 * SZREG), $r_sp)
-+      bpf_negative_common(4)
-+      jr      $r_ra
-+       lw     $r_A, 0($r_s0)
-+      END(sk_load_word_negative)
-+
-+bpf_slow_path_half_neg:
-+      bpf_is_end_of_data
-+NESTED(sk_load_half_negative, (6 * SZREG), $r_sp)
-+      bpf_negative_common(2)
-+      jr      $r_ra
-+       lhu    $r_A, 0($r_s0)
-+      END(sk_load_half_negative)
-+
-+bpf_slow_path_byte_neg:
-+      bpf_is_end_of_data
-+NESTED(sk_load_byte_negative, (6 * SZREG), $r_sp)
-+      bpf_negative_common(1)
-+      jr      $r_ra
-+       lbu    $r_A, 0($r_s0)
-+      END(sk_load_byte_negative)
-+
-+fault:
-+      jr      $r_ra
-+       addiu $r_ret, zero, 1
index cd86a7ab84b9edb9325c2dd81b1297509cfd985a..bbe43d24c240d93f9ae3ffe44a07f88f91c14efd 100644 (file)
@@ -44,7 +44,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
          device, it has to decide which ones to send first, which ones to
 --- a/net/sched/sch_api.c
 +++ b/net/sched/sch_api.c
-@@ -2272,7 +2272,7 @@ static int __init pktsched_init(void)
+@@ -2278,7 +2278,7 @@ static int __init pktsched_init(void)
                return err;
        }
  
index 7c9046c6e3b5bed066450012e84d196de80f769e..0abb6726398388857ae721d9e8600e61e40ff2e5 100644 (file)
@@ -69,7 +69,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  struct dst_entry *__sk_dst_check(struct sock *sk, u32 cookie)
  {
        struct dst_entry *dst = __sk_dst_get(sk);
-@@ -1742,9 +1755,11 @@ static void __sk_free(struct sock *sk)
+@@ -1760,9 +1773,11 @@ static void __sk_free(struct sock *sk)
        if (likely(sk->sk_net_refcnt))
                sock_inuse_add(sock_net(sk), -1);
  
index f8ee3f083b59e17fdc242b210f34375b3eb57243..042588a623a9e3fc289b67ad58aa8135918a29ee 100644 (file)
@@ -330,7 +330,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  
 --- a/net/core/sock.c
 +++ b/net/core/sock.c
-@@ -3623,6 +3623,8 @@ static __net_initdata struct pernet_oper
+@@ -3643,6 +3643,8 @@ static __net_initdata struct pernet_oper
  
  static int __init proto_init(void)
  {
index c7053fc686203cf3c01720884f8db6fdd659a0f7..0b95eee494e61c1c8522a1820c518d6623da7a19 100644 (file)
@@ -185,7 +185,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
                cfg->fc_flags |= RTF_REJECT;
  
        if (rtm->rtm_type == RTN_LOCAL)
-@@ -6028,6 +6059,8 @@ static int ip6_route_dev_notify(struct n
+@@ -6029,6 +6060,8 @@ static int ip6_route_dev_notify(struct n
  #ifdef CONFIG_IPV6_MULTIPLE_TABLES
                net->ipv6.ip6_prohibit_entry->dst.dev = dev;
                net->ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(dev);
@@ -194,7 +194,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
                net->ipv6.ip6_blk_hole_entry->dst.dev = dev;
                net->ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(dev);
  #endif
-@@ -6039,6 +6072,7 @@ static int ip6_route_dev_notify(struct n
+@@ -6040,6 +6073,7 @@ static int ip6_route_dev_notify(struct n
                in6_dev_put_clear(&net->ipv6.ip6_null_entry->rt6i_idev);
  #ifdef CONFIG_IPV6_MULTIPLE_TABLES
                in6_dev_put_clear(&net->ipv6.ip6_prohibit_entry->rt6i_idev);
@@ -202,7 +202,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
                in6_dev_put_clear(&net->ipv6.ip6_blk_hole_entry->rt6i_idev);
  #endif
        }
-@@ -6231,6 +6265,8 @@ static int __net_init ip6_route_net_init
+@@ -6232,6 +6266,8 @@ static int __net_init ip6_route_net_init
  
  #ifdef CONFIG_IPV6_MULTIPLE_TABLES
        net->ipv6.fib6_has_custom_rules = false;
@@ -211,7 +211,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
        net->ipv6.ip6_prohibit_entry = kmemdup(&ip6_prohibit_entry_template,
                                               sizeof(*net->ipv6.ip6_prohibit_entry),
                                               GFP_KERNEL);
-@@ -6241,11 +6277,21 @@ static int __net_init ip6_route_net_init
+@@ -6242,11 +6278,21 @@ static int __net_init ip6_route_net_init
                         ip6_template_metrics, true);
        INIT_LIST_HEAD(&net->ipv6.ip6_prohibit_entry->rt6i_uncached);
  
@@ -234,7 +234,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
        net->ipv6.ip6_blk_hole_entry->dst.ops = &net->ipv6.ip6_dst_ops;
        dst_init_metrics(&net->ipv6.ip6_blk_hole_entry->dst,
                         ip6_template_metrics, true);
-@@ -6269,6 +6315,8 @@ out:
+@@ -6270,6 +6316,8 @@ out:
        return ret;
  
  #ifdef CONFIG_IPV6_MULTIPLE_TABLES
@@ -243,7 +243,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
  out_ip6_prohibit_entry:
        kfree(net->ipv6.ip6_prohibit_entry);
  out_ip6_null_entry:
-@@ -6288,6 +6336,7 @@ static void __net_exit ip6_route_net_exi
+@@ -6289,6 +6337,7 @@ static void __net_exit ip6_route_net_exi
        kfree(net->ipv6.ip6_null_entry);
  #ifdef CONFIG_IPV6_MULTIPLE_TABLES
        kfree(net->ipv6.ip6_prohibit_entry);
@@ -251,7 +251,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
        kfree(net->ipv6.ip6_blk_hole_entry);
  #endif
        dst_entries_destroy(&net->ipv6.ip6_dst_ops);
-@@ -6365,6 +6414,9 @@ void __init ip6_route_init_special_entri
+@@ -6366,6 +6415,9 @@ void __init ip6_route_init_special_entri
        init_net.ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev);
        init_net.ipv6.ip6_blk_hole_entry->dst.dev = init_net.loopback_dev;
        init_net.ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev);
index cb049af0a552eba6d6cd36141178c03f2260f904..f33ceec126d566d54ad8cbdb25ee7ea0003c6603 100644 (file)
@@ -65,7 +65,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
  /**
   *    ata_build_rw_tf - Build ATA taskfile for given read/write request
   *    @tf: Target ATA taskfile
-@@ -5121,6 +5134,9 @@ struct ata_queued_cmd *ata_qc_new_init(s
+@@ -5149,6 +5162,9 @@ struct ata_queued_cmd *ata_qc_new_init(s
                if (tag < 0)
                        return NULL;
        }
@@ -75,7 +75,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
  
        qc = __ata_qc_from_tag(ap, tag);
        qc->tag = qc->hw_tag = tag;
-@@ -6057,6 +6073,9 @@ struct ata_port *ata_port_alloc(struct a
+@@ -6085,6 +6101,9 @@ struct ata_port *ata_port_alloc(struct a
        ap->stats.unhandled_irq = 1;
        ap->stats.idle_irq = 1;
  #endif
@@ -85,7 +85,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
        ata_sff_port_init(ap);
  
        return ap;
-@@ -6092,6 +6111,12 @@ static void ata_host_release(struct kref
+@@ -6120,6 +6139,12 @@ static void ata_host_release(struct kref
  
                kfree(ap->pmp_link);
                kfree(ap->slave_link);
@@ -98,7 +98,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
                kfree(ap);
                host->ports[i] = NULL;
        }
-@@ -6555,7 +6580,23 @@ int ata_host_register(struct ata_host *h
+@@ -6583,7 +6608,23 @@ int ata_host_register(struct ata_host *h
                host->ports[i]->print_id = atomic_inc_return(&ata_print_id);
                host->ports[i]->local_port_no = i + 1;
        }
@@ -134,7 +134,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
  
  /*
   * Define if arch has non-standard setup.  This is a _PCI_ standard
-@@ -881,6 +884,12 @@ struct ata_port {
+@@ -882,6 +885,12 @@ struct ata_port {
  #ifdef CONFIG_ATA_ACPI
        struct ata_acpi_gtm     __acpi_init_gtm; /* use ata_acpi_init_gtm() */
  #endif
index 739f00e0cabd0596313e177d8a9e8b49d3fe12af..2543c879a90564ade1ae4444d9aac41737f9e204 100644 (file)
@@ -12,7 +12,7 @@ Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
 
 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
-@@ -631,6 +631,56 @@
+@@ -649,6 +649,56 @@
                        };
                };
  
index dbd7ec8578ad90f374f0c50957c3c70f2736d729..28dd5675eaffcc5ded683ffe431329a26d691f0a 100644 (file)
@@ -85,10 +85,14 @@ Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
   *
   * Harninder Rai <harninder.rai@nxp.com>
   *
-@@ -287,6 +287,26 @@
-                       status = "disabled";
-               };
+@@ -301,6 +301,26 @@
+                       reg = <0x0 0x2190000 0x0 0x10000>;
+                       interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&sysclk>, <&clockgen 4 1>;
++                      clock-names = "ipg", "per";
++                      status = "disabled";
++              };
++
 +              can0: can@2180000 {
 +                      compatible = "fsl,ls1028ar1-flexcan",
 +                                   "fsl,lx2160ar1-flexcan";
@@ -105,10 +109,6 @@ Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
 +                      reg = <0x0 0x2190000 0x0 0x10000>;
 +                      interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 +                      clocks = <&sysclk>, <&clockgen 4 1>;
-+                      clock-names = "ipg", "per";
-+                      status = "disabled";
-+              };
-+
-               duart0: serial@21c0500 {
-                       compatible = "fsl,ns16550", "ns16550a";
-                       reg = <0x00 0x21c0500 0x0 0x100>;
+                       clock-names = "ipg", "per";
+                       status = "disabled";
+               };
index a1b3823b3891ddec9876b262a8a1cc62e7374a49..24db800a113aed5e5d496263aed24603bb050eb8 100644 (file)
@@ -12,8 +12,8 @@ Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
 
 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
-@@ -538,6 +538,16 @@
-                       clock-names = "apb_pclk", "wdog_clk";
+@@ -556,6 +556,16 @@
+                       clock-names = "wdog_clk", "apb_pclk";
                };
  
 +              gpu@f0c0000 {
index 3b7a67d9022e90f348069987be1c0b9668ebeaab..aa7bf3a34cb5fbf738b2d32cf4fd0a0fad8cc395 100644 (file)
@@ -13,7 +13,7 @@ Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
 
 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
-@@ -771,6 +771,13 @@
+@@ -789,6 +789,13 @@
                };
        };
  
index f79e93213fa3236d25dc41d70b2c7906aad4285d..38434cc8e7b7335eeaf74f0a21d9dc82aa25256b 100644 (file)
@@ -24,7 +24,7 @@ Signed-off-by: Biwen Li <biwen.li@nxp.com>
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
-@@ -769,6 +773,19 @@
+@@ -787,6 +791,19 @@
                                little-endian;
                        };
                };
index 4976a467b422bd111d0f6b554b31e9dadc9b73ef..9d041feb14c87eac4d53e0206771cba060bbbfe0 100644 (file)
@@ -22,7 +22,7 @@ Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
 
 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
-@@ -750,7 +750,9 @@
+@@ -768,7 +768,9 @@
                                  /* PF1: VF0-1 BAR0 - non-prefetchable memory */
                                  0x82000000 0x0 0x00000000  0x1 0xf8210000  0x0 0x020000
                                  /* PF1: VF0-1 BAR2 - prefetchable memory */
@@ -33,7 +33,7 @@ Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
  
                        enetc_port0: ethernet@0,0 {
                                compatible = "fsl,enetc";
-@@ -766,12 +768,66 @@
+@@ -784,12 +786,66 @@
                                #address-cells = <1>;
                                #size-cells = <0>;
                        };
index 9427662354cec67a7c4fcf28d75e54ff04240d47..338764d486fb1d1410a6c73e50ddb2d4115f5d97 100644 (file)
@@ -15,7 +15,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 
 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
-@@ -732,7 +732,6 @@
+@@ -750,7 +750,6 @@
                        reg = <0x01 0xf0000000 0x0 0x100000>;
                        #address-cells = <3>;
                        #size-cells = <2>;
@@ -23,7 +23,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
                        msi-parent = <&its>;
                        device_type = "pci";
                        bus-range = <0x0 0x0>;
-@@ -785,6 +784,8 @@
+@@ -803,6 +802,8 @@
                        switch@0,5 {
                                compatible = "mscc,felix-switch";
                                reg = <0x000500 0 0 0 0>;
index b5bc421da963ef51315d1685bead66e68e3232ff..0417cd7b61bdb9ce37fa677fe36b54c060998fc1 100644 (file)
@@ -14,7 +14,7 @@ Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
 
 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
-@@ -814,6 +814,7 @@
+@@ -832,6 +832,7 @@
                                        };
                                        port@5 {
                                                reg = <5>;
@@ -22,7 +22,7 @@ Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
                                                fixed-link {
                                                        speed = <1000>;
                                                        full-duplex;
-@@ -821,7 +822,7 @@
+@@ -839,7 +840,7 @@
                                        };
                                };
                        };
index 4aabcebcae34efc5c2a05f1f1b7bf0a7fdc63067..23aabe8c27b9265adcbc864156bcc9ee797a20bd 100644 (file)
@@ -14,7 +14,7 @@ Signed-off-by: Biwen Li <biwen.li@nxp.com>
 
 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
-@@ -836,6 +836,7 @@
+@@ -854,6 +854,7 @@
                        compatible = "fsl,ls1028a-rcpm", "fsl,qoriq-rcpm-2.1+";
                        reg = <0x0 0x1e34040 0x0 0x1c>;
                        #fsl,rcpm-wakeup-cells = <7>;
index c34862667e9e903bc72ef7d26f3c3fb12e68fead..6114b3ecca5a9ab4f02045dfd8d5241b963e21d8 100644 (file)
@@ -13,7 +13,7 @@ Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
 
 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
-@@ -695,10 +695,10 @@
+@@ -713,10 +713,10 @@
                        msi-parent = <&its>;
                        #interrupt-cells = <1>;
                        interrupt-map-mask = <0 0 0 7>;
@@ -28,7 +28,7 @@ Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
                        status = "disabled";
                };
  
-@@ -720,10 +720,10 @@
+@@ -738,10 +738,10 @@
                        msi-parent = <&its>;
                        #interrupt-cells = <1>;
                        interrupt-map-mask = <0 0 0 7>;
index 80ab53eef9f091fb3f6e041faa78e65befb3e033..205b46f7bd2d6064581e7cd4b658b9fe1c53c5be 100644 (file)
@@ -16,7 +16,7 @@ Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
 
 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
-@@ -689,6 +689,7 @@
+@@ -707,6 +707,7 @@
                        #size-cells = <2>;
                        device_type = "pci";
                        dma-coherent;
@@ -24,7 +24,7 @@ Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
                        bus-range = <0x0 0xff>;
                        ranges = <0x81000000 0x0 0x00000000 0x80 0x00010000 0x0 0x00010000   /* downstream I/O */
                                  0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
-@@ -714,6 +715,7 @@
+@@ -732,6 +733,7 @@
                        #size-cells = <2>;
                        device_type = "pci";
                        dma-coherent;
index 31a896887a2c1ed610a4f9d2c1064b74a4f07d80..bcb3d7b5f01503149049dddc1aead786607374a4 100644 (file)
@@ -43,7 +43,7 @@ Signed-off-by: Shawn Guo <shawnguo@kernel.org>
        reboot {
                compatible ="syscon-reboot";
                regmap = <&rst>;
-@@ -862,7 +848,8 @@
+@@ -880,7 +866,8 @@
                interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
                             <0 223 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "DE", "SE";
index 861429eb0703a81b581e6adae4b605d4e19f53a6..62a506ae3da4c0946cb58d14fe72c741a3998e17 100644 (file)
@@ -24,7 +24,7 @@ Signed-off-by: Shawn Guo <shawnguo@kernel.org>
                clocks = <&osc_27m>;
        };
  
-@@ -848,7 +848,7 @@
+@@ -866,7 +866,7 @@
                interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
                             <0 223 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "DE", "SE";
index 96247aed9ecf006482690b241f2479bd019ce59b..f28eacbcf4aa117e321a98135ea52525c1ca04cc 100644 (file)
@@ -17,7 +17,7 @@ Signed-off-by: Wen He <wen.he_1@nxp.com>
 
 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
-@@ -856,7 +856,23 @@
+@@ -874,7 +874,23 @@
  
                port {
                        dp0_out: endpoint {
index 3cbb09074d558ac2dfb015aee781cda847d84c1a..119a9b00c2d9d5e21a3f866c69be4d2d0c99fba0 100644 (file)
@@ -15,7 +15,7 @@ Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
 
 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
-@@ -795,6 +795,8 @@
+@@ -813,6 +813,8 @@
                                        /* internal to-cpu ports */
                                        port@4 {
                                                reg = <4>;
@@ -24,7 +24,7 @@ Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
                                                fixed-link {
                                                        speed = <1000>;
                                                        full-duplex;
-@@ -803,6 +805,8 @@
+@@ -821,6 +823,8 @@
                                        port@5 {
                                                reg = <5>;
                                                ethernet = <&enetc_port3>;
index 21b133bc9a59d418516ca0ff679f4238c62d7e8b..5c75c52aedebfc1f60b0ef4b742ad67a54464345 100644 (file)
@@ -14,7 +14,7 @@ Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
 
 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
-@@ -770,7 +770,6 @@
+@@ -788,7 +788,6 @@
                                little-endian;
                        };
                        switch@0,5 {
index b97e83d4add78f5ee1442f61e9681325eb8a5518..5aa96470ad2b437ebf07216cddf4d95f305b7728 100644 (file)
@@ -22,7 +22,7 @@ Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
 
 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
-@@ -797,7 +797,7 @@
+@@ -815,7 +815,7 @@
                                                phy-mode = "gmii";
  
                                                fixed-link {
index 4a3eaaa0aac79e775bab7d24661df535ad407aff..af0933aca563cb2b4e24e2ab2edcaa9a46ed42da 100644 (file)
@@ -27,7 +27,7 @@ Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
 
 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
-@@ -755,7 +755,7 @@
+@@ -773,7 +773,7 @@
                                #address-cells = <1>;
                                #size-cells = <0>;
                        };
@@ -36,7 +36,7 @@ Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
                                compatible = "fsl,enetc";
                                reg = <0x000200 0 0 0 0>;
                                fixed-link {
-@@ -794,6 +794,7 @@
+@@ -812,6 +812,7 @@
                                        /* internal to-cpu ports */
                                        port@4 {
                                                reg = <4>;
@@ -44,7 +44,7 @@ Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
                                                phy-mode = "gmii";
  
                                                fixed-link {
-@@ -803,7 +804,6 @@
+@@ -821,7 +822,6 @@
                                        };
                                        port@5 {
                                                reg = <5>;
@@ -52,7 +52,7 @@ Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
                                                phy-mode = "gmii";
  
                                                fixed-link {
-@@ -816,6 +816,8 @@
+@@ -834,6 +834,8 @@
                        enetc_port3: ethernet@0,6 {
                                compatible = "fsl,enetc";
                                reg = <0x000600 0 0 0 0>;
index fd2999efab9437c830821e5571c772d0a8c0981f..0133ea009dfe25d3178f0ca90aaaf437233e8433 100644 (file)
@@ -67,7 +67,7 @@ Signed-off-by: Alison Wang <alison.wang@nxp.com>
                               <&edma0 1 44>;
 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
-@@ -544,8 +544,9 @@
+@@ -562,8 +562,9 @@
                        reg = <0x0 0xf100000 0x0 0x10000>;
                        interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&clockgen 4 1>, <&clockgen 4 1>,
@@ -79,7 +79,7 @@ Signed-off-by: Alison Wang <alison.wang@nxp.com>
                        dma-names = "tx", "rx";
                        dmas = <&edma0 1 4>,
                               <&edma0 1 3>;
-@@ -558,8 +559,9 @@
+@@ -576,8 +577,9 @@
                        reg = <0x0 0xf110000 0x0 0x10000>;
                        interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&clockgen 4 1>, <&clockgen 4 1>,
@@ -91,7 +91,7 @@ Signed-off-by: Alison Wang <alison.wang@nxp.com>
                        dma-names = "tx", "rx";
                        dmas = <&edma0 1 6>,
                               <&edma0 1 5>;
-@@ -572,8 +574,9 @@
+@@ -590,8 +592,9 @@
                        reg = <0x0 0xf130000 0x0 0x10000>;
                        interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&clockgen 4 1>, <&clockgen 4 1>,
index ef719e393b5b7527463e8ccce7b55fa76cf772cc..96003800f1e366a92c200d6845cc38464fa02338 100644 (file)
@@ -34,7 +34,7 @@ Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
                sata: sata@3200000 {
 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
-@@ -381,6 +381,7 @@
+@@ -399,6 +399,7 @@
                        snps,dis_rxdet_inp3_quirk;
                        snps,quirk-frame-length-adjustment = <0x20>;
                        snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
@@ -42,7 +42,7 @@ Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
                };
  
                usb1: usb@3110000 {
-@@ -391,6 +392,7 @@
+@@ -409,6 +410,7 @@
                        snps,dis_rxdet_inp3_quirk;
                        snps,quirk-frame-length-adjustment = <0x20>;
                        snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
index b7e65c7eab2178ffe651e3b2749d72eec89024c1..303b7d42f37d99fa96f770a6b3ef0f83b6f7e632 100644 (file)
@@ -14,7 +14,7 @@ Signed-off-by: Peng Ma <peng.ma@nxp.com>
 
 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
-@@ -327,7 +327,7 @@
+@@ -345,7 +345,7 @@
  
                edma0: dma-controller@22c0000 {
                        #dma-cells = <2>;
index b6c63c4c463afd241ca31c5adc11bde3751afd39..098f760dcf2eed4ff1df8c96da03877b711e4359 100644 (file)
@@ -12,7 +12,7 @@ Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
 
 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
-@@ -810,6 +810,7 @@
+@@ -828,6 +828,7 @@
                                        port@5 {
                                                reg = <5>;
                                                phy-mode = "gmii";
index 1584a0c4024b0fc29f8b9e04671fecdccb9f2bf0..1db8c542badbe80154ce29e7ce70dc0fe50f403d 100644 (file)
@@ -385,7 +385,7 @@ Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
  &sai4 {
 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
-@@ -774,30 +774,39 @@
+@@ -792,30 +792,39 @@
                                clocks = <&clockgen 2 3>;
                                little-endian;
                        };
@@ -432,7 +432,7 @@ Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
                                                reg = <4>;
                                                ethernet = <&enetc_port2>;
                                                phy-mode = "gmii";
-@@ -807,7 +816,8 @@
+@@ -825,7 +834,8 @@
                                                        full-duplex;
                                                };
                                        };
@@ -442,7 +442,7 @@ Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
                                                reg = <5>;
                                                phy-mode = "gmii";
                                                status = "disabled";
-@@ -819,6 +829,7 @@
+@@ -837,6 +847,7 @@
                                        };
                                };
                        };
index 0a1b548b1f2389cb77e2b34487e95d0d2b67be24..9faacc7228d7454e39b6cfb29721b8c6c2c1e7f6 100644 (file)
@@ -13,7 +13,7 @@ Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
 
 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
-@@ -788,21 +788,25 @@
+@@ -806,21 +806,25 @@
                                        mscc_felix_port0: port@0 {
                                                reg = <0>;
                                                status = "disabled";
index d91f2d6724400c9a35f80551576ce2e60b13dfe8..e536a4c1bc09ffcd6cfaa74fe6d7f6174233fbeb 100644 (file)
@@ -15,7 +15,7 @@
        /* initialize internal qc */
        qc = __ata_qc_from_tag(ap, ATA_TAG_INTERNAL);
  
-@@ -5128,6 +5136,9 @@ struct ata_queued_cmd *ata_qc_new_init(s
+@@ -5156,6 +5164,9 @@ struct ata_queued_cmd *ata_qc_new_init(s
        if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
                return NULL;
  
@@ -25,7 +25,7 @@
        /* libsas case */
        if (ap->flags & ATA_FLAG_SAS_HOST) {
                tag = ata_sas_allocate_tag(ap);
-@@ -5173,6 +5184,8 @@ void ata_qc_free(struct ata_queued_cmd *
+@@ -5201,6 +5212,8 @@ void ata_qc_free(struct ata_queued_cmd *
                qc->tag = ATA_TAG_POISON;
                if (ap->flags & ATA_FLAG_SAS_HOST)
                        ata_sas_free_tag(tag, ap);
@@ -36,7 +36,7 @@
  
 --- a/include/linux/libata.h
 +++ b/include/linux/libata.h
-@@ -910,6 +910,8 @@ struct ata_port_operations {
+@@ -911,6 +911,8 @@ struct ata_port_operations {
        enum ata_completion_errors (*qc_prep)(struct ata_queued_cmd *qc);
        unsigned int (*qc_issue)(struct ata_queued_cmd *qc);
        bool (*qc_fill_rtf)(struct ata_queued_cmd *qc);
@@ -45,7 +45,7 @@
  
        /*
         * Configuration and exception handling
-@@ -1000,6 +1002,9 @@ struct ata_port_operations {
+@@ -1001,6 +1003,9 @@ struct ata_port_operations {
        void (*phy_reset)(struct ata_port *ap);
        void (*eng_timeout)(struct ata_port *ap);