* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __BL1_PRIVATE_H__
-#define __BL1_PRIVATE_H__
+#ifndef BL1_PRIVATE_H
+#define BL1_PRIVATE_H
#include <stdint.h>
#include <utils_def.h>
void *cookie,
void *handle,
unsigned int flags);
-#endif /* __BL1_PRIVATE_H__ */
+#endif /* BL1_PRIVATE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __BL2_PRIVATE_H__
-#define __BL2_PRIVATE_H__
+#ifndef BL2_PRIVATE_H
+#define BL2_PRIVATE_H
#if BL2_IN_XIP_MEM
/*******************************************************************************
struct entry_point_info *bl2_load_images(void);
void bl2_run_next_image(const struct entry_point_info *bl_ep_info);
-#endif /* __BL2_PRIVATE_H__ */
+#endif /* BL2_PRIVATE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SP_MIN_H__
-#define __SP_MIN_H__
+#ifndef SP_MIN_PRIVATE_H
+#define SP_MIN_PRIVATE_H
void sp_min_warm_entrypoint(void);
void sp_min_main(void);
void sp_min_warm_boot(void);
void sp_min_fiq(void);
-#endif /* __SP_MIN_H__ */
+#endif /* SP_MIN_PRIVATE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __TSP_PRIVATE_H__
-#define __TSP_PRIVATE_H__
+#ifndef TSP_PRIVATE_H
+#define TSP_PRIVATE_H
/* Definitions to help the assembler access the SMC/ERET args structure */
#define TSP_ARGS_SIZE 0x40
uint64_t tsp_main(void);
#endif /* __ASSEMBLY__ */
-#endif /* __TSP_PRIVATE_H__ */
-
+#endif /* TSP_PRIVATE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CCN_PRIVATE_H__
-#define __CCN_PRIVATE_H__
+#ifndef CCN_PRIVATE_H
+#define CCN_PRIVATE_H
/*
* A CCN implementation can have a maximum of 64 Request nodes with node IDs
#define CCN_GET_HN_NODEID_MAP(periphbase, mn_hn_id_reg_offset) \
ccn_reg_read(periphbase, MN_REGION_ID, mn_hn_id_reg_offset)
-#endif /* __CCN_PRIVATE_H__ */
+#endif /* CCN_PRIVATE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef GIC_COMMON_PRIVATE_H_
-#define GIC_COMMON_PRIVATE_H_
+#ifndef GIC_COMMON_PRIVATE_H
+#define GIC_COMMON_PRIVATE_H
#include <gic_common.h>
#include <mmio.h>
void gicd_set_ipriorityr(uintptr_t base, unsigned int id, unsigned int pri);
void gicd_set_icfgr(uintptr_t base, unsigned int id, unsigned int cfg);
-#endif /* GIC_COMMON_PRIVATE_H_ */
+#endif /* GIC_COMMON_PRIVATE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __GICV2_PRIVATE_H__
-#define __GICV2_PRIVATE_H__
+#ifndef GICV2_PRIVATE_H
+#define GICV2_PRIVATE_H
#include <gicv2.h>
#include <mmio.h>
mmio_write_32(base + GICC_DIR, val);
}
-#endif /* __GICV2_PRIVATE_H__ */
+#endif /* GICV2_PRIVATE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __GICV3_PRIVATE_H__
-#define __GICV3_PRIVATE_H__
+#ifndef GICV3_PRIVATE_H
+#define GICV3_PRIVATE_H
#include <assert.h>
#include <gic_common.h>
}
-#endif /* __GICV3_PRIVATE_H__ */
+#endif /* GICV3_PRIVATE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __IMX_GPT_H__
-#define __IMX_GPT_H__
+#ifndef IMX_GPT_H
+#define IMX_GPT_H
#include <stdint.h>
void imx_gpt_ops_init(uintptr_t reg_base);
-#endif /* __IMX_GPT_H__ */
+#endif /* IMX_GPT_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __IMX_CONSOLE_H__
-#define __IMX_CONSOLE_H__
+#ifndef IMX_UART_H
+#define IMX_UART_H
#define IMX_UART_RXD_OFFSET 0x00
#define IMX_UART_RXD_CHARRDY BIT(15)
#define IMX_UART_TS_RXFULL BIT(3)
#define IMX_UART_TS_SOFTRST BIT(0)
-#endif /* __IMX_UART_H__ */
+#endif /* IMX_UART_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __IMX_USDHC_H__
-#define __IMX_USDHC_H__
+#ifndef IMX_USDHC_H
+#define IMX_USDHC_H
#include <mmc.h>
#define mmio_clrbits32(addr, clear) mmio_write_32(addr, mmio_read_32(addr) & ~(clear))
#define mmio_setbits32(addr, set) mmio_write_32(addr, mmio_read_32(addr) | (set))
-#endif /* __IMX_USDHC_H__ */
+#endif /* IMX_USDHC_H */
/* Driver for COMPHY unit that is part or Marvell A8K SoCs */
-#ifndef _COMPHY_H_
-#define _COMPHY_H_
+#ifndef COMPHY_H
+#define COMPHY_H
/* COMPHY registers */
#define COMMON_PHY_CFG1_REG 0x0
#define HPIPE_GLOBAL_PM_RXDLOZ_WAIT_MASK \
(0xFF << HPIPE_GLOBAL_PM_RXDLOZ_WAIT_OFFSET)
-#endif /* _COMPHY_H_ */
-
+#endif /* COMPHY_H */
/* Marvell CP110 SoC COMPHY unit driver */
-#ifndef _PHY_COMPHY_CP110_H
-#define _PHY_COMPHY_CP110_H
+#ifndef COMPHY_CP110_H
+#define COMPHY_CP110_H
#define SD_ADDR(base, lane) (base + 0x1000 * lane)
#define HPIPE_ADDR(base, lane) (SD_ADDR(base, lane) + 0x800)
/* General defines */
#define PLL_LOCK_TIMEOUT 15000
-#endif /* _PHY_COMPHY_CP110_H */
-
+#endif /* COMPHY_CP110_H */
* https://spdx.org/licenses
*/
-#ifndef _PHY_COMPHY_3700_H
-#define _PHY_COMPHY_3700_H
+#ifndef PHY_COMPHY_3700_H
+#define PHY_COMPHY_3700_H
#define PLL_SET_DELAY_US 600
#define COMPHY_PLL_TIMEOUT 1000
int mvebu_3700_comphy_is_pll_locked(uint8_t comphy_index, uint32_t comphy_mode);
int mvebu_3700_comphy_power_off(uint8_t comphy_index, uint32_t comphy_mode);
int mvebu_3700_comphy_power_on(uint8_t comphy_index, uint32_t comphy_mode);
-#endif /* _PHY_COMPHY_3700_H */
+#endif /* PHY_COMPHY_3700_H */
/* Marvell CP110 ana A3700 common */
-#ifndef _PHY_COMPHY_COMMON_H
-#define _PHY_COMPHY_COMMON_H
+#ifndef PHY_COMPHY_COMMON_H
+#define PHY_COMPHY_COMMON_H
/* #define DEBUG_COMPHY */
#ifdef DEBUG_COMPHY
debug("new val 0x%x\n", mmio_read_16(addr));
}
-#endif /* _PHY_COMPHY_COMMON_H */
+#endif /* PHY_COMPHY_COMMON_H */
* https://spdx.org/licenses
*/
-#ifndef __PHY_DEFAULT_PORTING_LAYER_H
-#define __PHY_DEFAULT_PORTING_LAYER_H
+#ifndef PHY_DEFAULT_PORTING_LAYER_H
+#define PHY_DEFAULT_PORTING_LAYER_H
#define MAX_LANE_NR 6
.valid = 0x1
},
};
-#endif /* __PHY_DEFAULT_PORTING_LAYER_H */
+#endif /* PHY_DEFAULT_PORTING_LAYER_H */
* https://spdx.org/licenses
*/
-#ifndef _MC_TRUSTZONE_H
-#define _MC_TRUSTZONE_H
+#ifndef MC_TRUSTZONE_H
+#define MC_TRUSTZONE_H
#include <addr_map.h>
void tz_enable_win(int ap_index, const struct addr_map_win *win, int win_id);
-#endif /* _MC_TRUSTZONE_H */
+#endif /* MC_TRUSTZONE_H */
* https://spdx.org/licenses
*/
-#ifndef __A3700_CONSOLE_H__
-#define __A3700_CONSOLE_H__
+#ifndef A3700_CONSOLE_H
+#define A3700_CONSOLE_H
/* MVEBU UART Registers */
#define UART_RX_REG 0x00
#define UART_CTRL_TXFIFO_RESET (1 << 15)
#define UARTLSR_TXFIFOEMPTY (1 << 6)
-#endif /* __A3700_CONSOLE_H__ */
+#endif /* A3700_CONSOLE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef AVS_DRIVER_H__
-#define AVS_DRIVER_H__
+#ifndef AVS_DRIVER_H
+#define AVS_DRIVER_H
/* AVS Setting. 1:enable / 0:disable */
#ifndef AVS_SETTING_ENABLE
void rcar_avs_setting(void);
void rcar_avs_end(void);
-#endif /* AVS_DRIVER_H__ */
+#endif /* AVS_DRIVER_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef BOARD_H_
-#define BOARD_H_
+#ifndef BOARD_H
+#define BOARD_H
#define BOARD_SALVATOR_X (0x00)
#define BOARD_KRIEK (0x01)
int32_t rcar_get_board_type(uint32_t *type, uint32_t *rev);
-#endif
+#endif /* BOARD_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef RCAR_PRINTF_H__
-#define RCAR_PRINTF_H__
+#ifndef RCAR_PRINTF_H
+#define RCAR_PRINTF_H
#include <string.h>
extern uint64_t rcar_stack_generic_timer[5];
#endif
-#endif
+#endif /* RCAR_PRINTF_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef MICRO_DELAY_H__
-#define MICRO_DELAY_H__
+#ifndef MICRO_DELAY_H
+#define MICRO_DELAY_H
#define TMU3_MEASUREMENT (0)
#endif
-#endif
+#endif /* MICRO_DELAY_H */
*
*/
-#ifndef __EMMC_CONFIG_H__
-#define __EMMC_CONFIG_H__
+#ifndef EMMC_CONFIG_H
+#define EMMC_CONFIG_H
/* ************************ HEADER (INCLUDE) SECTION *********************** */
/* ********************************* CODE ********************************** */
-#endif /* #ifndef __EMMC_CONFIG_H__ */
+#endif /* EMMC_CONFIG_H */
/* ******************************** END ************************************ */
*
*/
-#ifndef __EMMC_DEF_H__
-#define __EMMC_DEF_H__
+#ifndef EMMC_DEF_H
+#define EMMC_DEF_H
#include "emmc_std.h"
/* ********************************* CODE ********************************** */
-#endif /* #define __EMMC_DEF_H__ */
+#endif /* EMMC_DEF_H */
/* ******************************** END ************************************ */
*
*/
-#ifndef __EMMC_HAL_H__
-#define __EMMC_HAL_H__
+#ifndef EMMC_HAL_H
+#define EMMC_HAL_H
/* ************************ HEADER (INCLUDE) SECTION *********************** */
#include <stdint.h>
/* ***************** MACROS, CONSTANTS, COMPILATION FLAGS ****************** */
/* ********************************* CODE ********************************** */
-#endif /* __EMMC_HAL_H__ */
+#endif /* EMMC_HAL_H */
/* ******************************** END ************************************ */
*
*/
-#ifndef __EMMC_REGISTERS_H__
-#define __EMMC_REGISTERS_H__
+#ifndef EMMC_REGISTERS_H
+#define EMMC_REGISTERS_H
/* ************************ HEADER (INCLUDE) SECTION *********************** */
/* ********************************* CODE ********************************** */
-#endif /* __EMMC_REGISTERS_H__ */
+#endif /* EMMC_REGISTERS_H */
/* ******************************** END ************************************ */
*
*/
-#ifndef __EMMC_STD_H__
-#define __EMMC_STD_H__
+#ifndef EMMC_STD_H
+#define EMMC_STD_H
#include "emmc_hal.h"
/* ********************************* CODE ********************************** */
/* ******************************** END ************************************ */
-#endif /* __EMMC_STD_H__ */
+#endif /* EMMC_STD_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef IIC_DVFS_H__
-#define IIC_DVFS_H__
+#ifndef IIC_DVFS_H
+#define IIC_DVFS_H
/* PMIC slave */
#define PMIC (0x30)
int32_t rcar_iic_dvfs_receive(uint8_t slave, uint8_t reg, uint8_t *data);
int32_t rcar_iic_dvfs_send(uint8_t slave, uint8_t regr, uint8_t data);
-#endif
+#endif /* IIC_DVFS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef IO_COMMON_H__
-#define IO_COMMON_H__
+#ifndef IO_COMMON_H
+#define IO_COMMON_H
typedef struct io_drv_spec {
size_t offset;
uint32_t partition;
} io_drv_spec_t;
-#endif
+#endif /* IO_COMMON_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef IO_EMMCDRV_H__
-#define IO_EMMCDRV_H__
+#ifndef IO_EMMCDRV_H
+#define IO_EMMCDRV_H
struct io_dev_connector;
int32_t rcar_register_io_dev_emmcdrv(const io_dev_connector_t **connector);
-#endif
+#endif /* IO_EMMCDRV_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef IO_MEMDRV_H__
-#define IO_MEMDRV_H__
+#ifndef IO_MEMDRV_H
+#define IO_MEMDRV_H
struct io_dev_connector;
int32_t rcar_register_io_dev_memdrv(const io_dev_connector_t **connector);
-#endif
+#endif /* IO_MEMDRV_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef IO_PRIVATE_H_
-#define IO_PRIVATE_H_
+#ifndef IO_PRIVATE_H
+#define IO_PRIVATE_H
/*
* Return codes reported by 'io_*' APIs
#define IO_NOT_SUPPORTED (-0x82)
#define IO_RESOURCES_EXHAUSTED (-0x83)
-#endif
+#endif /* IO_PRIVATE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef IO_RCAR_H__
-#define IO_RCAR_H__
+#ifndef IO_RCAR_H
+#define IO_RCAR_H
int32_t rcar_register_io_dev(const io_dev_connector_t **dev_con);
int32_t rcar_get_certificate(const int32_t name, uint32_t *cert);
void rcar_read_certificate(uint64_t cert, uint32_t *size, uintptr_t *dest);
-#endif
+#endif /* IO_RCAR_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef RCAR_PWRC_H__
-#define RCAR_PWRC_H__
+#ifndef PWRC_H
+#define PWRC_H
#define PPOFFR_OFF 0x0
#define PPONR_OFF 0x4
#endif
-#endif
+#endif /* PWRC_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef ROM_API_H__
-#define ROM_API_H__
+#ifndef ROM_API_H
+#define ROM_API_H
#include <stdint.h>
rom_read_flash_f f);
uint32_t rcar_rom_get_lcs(uint32_t *lcs);
-#endif
+#endif /* ROM_API_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef RPC_REGISTER_H__
-#define RPC_REGISTER_H__
+#ifndef RPC_REGISTERS_H
+#define RPC_REGISTERS_H
#define RPC_BASE (0xEE200000U)
#define RPC_CMNCR (RPC_BASE + 0x0000U)
#define RPC_PHYCNT (RPC_BASE + 0x007CU)
#define RPC_PHYINT (RPC_BASE + 0x0088U)
-#endif
+#endif /* RPC_REGISTERS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __BOOT_INIT_DRAM_
-#define __BOOT_INIT_DRAM_
+#ifndef BOOT_INIT_DRAM_H
+#define BOOT_INIT_DRAM_H
extern int32_t rcar_dram_init(void);
#define INITDRAM_ERR_O (0xfffffffe)
#define INITDRAM_ERR_T (0xfffffff0)
-#endif
+#endif /* BOOT_INIT_DRAM_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-
-#ifndef BOOT_INIT_DRAM_REGDEF_E3_H_
-#define BOOT_INIT_DRAM_REGDEF_E3_H_
+#ifndef BOOT_INIT_DRAM_REGDEF_E3_H
+#define BOOT_INIT_DRAM_REGDEF_E3_H
#ifdef __cplusplus
extern "C" {
-#endif /* __cplusplus */
+#endif /* __cplusplus */
#define BIT0 0x00000001U
#define BIT11 0x00000800U
#ifdef __cplusplus
}
-#endif /* __cplusplus */
-#endif /* BOOT_INIT_DRAM_REGDEF_E3_H_ */
+#endif /* __cplusplus */
+
+#endif /* BOOT_INIT_DRAM_REGDEF_E3_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#pragma once
-#include <stdint.h>
+#ifndef DDR_INIT_E3_H
+#define DDR_INIT_E3_H
-#ifndef __DDR_INIT_E3_
-#define __DDR_INIT_E3_
+#include <stdint.h>
#define RCAR_E3_DDR_VERSION "rev.0.09"
#define INITDRAM_ERR_O (0xfffffffe)
#define INITDRAM_ERR_T (0xfffffff0)
-#endif /* __DDR_INIT_E3_ */
+#endif /* DDR_INIT_E3_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef DRAM_SUB_FUNC_H_
-#define DRAM_SUB_FUNC_H_
+#ifndef DRAM_SUB_FUNC_H
+#define DRAM_SUB_FUNC_H
#define DRAM_UPDATE_STATUS_ERR (-1)
#define DRAM_BOOT_STATUS_COLD (0)
int32_t rcar_dram_update_boot_status(uint32_t status);
void rcar_dram_get_boot_status(uint32_t * status);
-#endif
+#endif /* DRAM_SUB_FUNC_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef PFC_INIT_E3_H__
-#define PFC_INIT_E3_H__
+#ifndef PFC_INIT_E3_H
+#define PFC_INIT_E3_H
void pfc_init_e3(void);
-#endif /* PFC_INIT_E3_H__ */
+#endif /* PFC_INIT_E3_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef PFC_INIT_H3_V1_H__
-#define PFC_INIT_H3_V1_H__
+#ifndef PFC_INIT_H3_V1_H
+#define PFC_INIT_H3_V1_H
void pfc_init_h3_v1(void);
-#endif /* PFC_INIT_H3_V1_H__ */
+#endif /* PFC_INIT_H3_V1_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef PFC_INIT_H3_V2_H__
-#define PFC_INIT_H3_V2_H__
+#ifndef PFC_INIT_H3_V2_H
+#define PFC_INIT_H3_V2_H
void pfc_init_h3_v2(void);
-#endif /* PFC_INIT_H3_V2_H__ */
+#endif /* PFC_INIT_H3_V2_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef PFC_INIT_M3_H__
-#define PFC_INIT_M3_H__
+#ifndef PFC_INIT_M3_H
+#define PFC_INIT_M3_H
void pfc_init_m3(void);
-#endif /* PFC_INIT_M3_H__ */
+#endif /* PFC_INIT_M3_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef PFC_INIT_M3N_H__
-#define PFC_INIT_M3N_H__
+#ifndef PFC_INIT_M3N_H
+#define PFC_INIT_M3N_H
void pfc_init_m3n(void);
-#endif /* PFC_INIT_M3N_H__ */
+#endif /* PFC_INIT_M3N_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef QOS_INIT_H_E3_V10__
-#define QOS_INIT_H_E3_V10__
+#ifndef QOS_INIT_E3_V10_H
+#define QOS_INIT_E3_V10_H
void qos_init_e3_v10(void);
-#endif /* QOS_INIT_H_E3_V10__ */
+#endif /* QOS_INIT_E3_V10_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef QOS_INIT_H_H3_V10__
-#define QOS_INIT_H_H3_V10__
+#ifndef QOS_INIT_H3_V10_H
+#define QOS_INIT_H3_V10_H
void qos_init_h3_v10(void);
-#endif /* QOS_INIT_H_H3_V10__ */
+#endif /* QOS_INIT_H3_V10_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef QOS_INIT_H_H3_V11__
-#define QOS_INIT_H_H3_V11__
+#ifndef QOS_INIT_H3_V11_H
+#define QOS_INIT_H3_V11_H
void qos_init_h3_v11(void);
-#endif /* QOS_INIT_H_H3_V11__ */
+#endif /* QOS_INIT_H3_V11_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef QOS_INIT_H_H3_V20__
-#define QOS_INIT_H_H3_V20__
+#ifndef QOS_INIT_H3_V20_H
+#define QOS_INIT_H3_V20_H
void qos_init_h3_v20(void);
-#endif /* QOS_INIT_H_H3_V20__ */
+#endif /* QOS_INIT_H3_V20_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef QOS_INIT_H_H3_V30__
-#define QOS_INIT_H_H3_V30__
+#ifndef QOS_INIT_H3_V30_H
+#define QOS_INIT_H3_V30_H
void qos_init_h3_v30(void);
-#endif /* QOS_INIT_H_H3_V20__ */
+#endif /* QOS_INIT_H3_V30_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef QOS_INIT_H_H3N_V30__
-#define QOS_INIT_H_H3N_V30__
+#ifndef QOS_INIT_H3N_V30_H
+#define QOS_INIT_H3N_V30_H
void qos_init_h3n_v30(void);
-#endif /* QOS_INIT_H_H3N_V30__ */
+#endif /* QOS_INIT_H3N_V30_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef QOS_INIT_H_M3_V10__
-#define QOS_INIT_H_M3_V10__
+#ifndef QOS_INIT_M3_V10_H
+#define QOS_INIT_M3_V10_H
void qos_init_m3_v10(void);
-#endif /* QOS_INIT_H_M3_V10__ */
+#endif /* QOS_INIT_M3_V10_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef QOS_INIT_H_M3_V11__
-#define QOS_INIT_H_M3_V11__
+#ifndef QOS_INIT_M3_V11_H
+#define QOS_INIT_M3_V11_H
void qos_init_m3_v11(void);
-#endif /* QOS_INIT_H_M3_V11__ */
+#endif /* QOS_INIT_M3_V11_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef QOS_INIT_H_M3N_V10__
-#define QOS_INIT_H_M3N_V10__
+#ifndef QOS_INIT_M3N_V10_H
+#define QOS_INIT_M3N_V10_H
void qos_init_m3n_v10(void);
-#endif /* QOS_INIT_H_M3N_V10__ */
+#endif /* QOS_INIT_M3N_V10_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef QOS_COMMON_H_
-#define QOS_COMMON_H_
+#ifndef QOS_COMMON_H
+#define QOS_COMMON_H
#define RCAR_REF_DEFAULT (0U)
extern uint32_t qos_init_ddr_ch;
extern uint8_t qos_init_ddr_phyvalid;
-#endif /* QOS_COMMON_H_ */
+#endif /* QOS_COMMON_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef QOS_INIT_H_
-#define QOS_INIT_H_
+#ifndef QOS_INIT_H
+#define QOS_INIT_H
extern void rcar_qos_init(void);
extern uint8_t get_boardcnf_phyvalid(void);
-#endif /* QOS_INIT_H_ */
+#endif /* QOS_INIT_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef QOS_REG_H_
-#define QOS_REG_H_
+#ifndef QOS_REG_H
+#define QOS_REG_H
#define RCAR_QOS_NONE (3U)
#define RCAR_QOS_TYPE_DEFAULT (0U)
#define QOSWT_WTSET0 (QOS_BASE0 + 0x8038U)
#define QOSWT_WTSET1 (QOS_BASE0 + 0x803CU)
-#endif /* QOS_REG_H_ */
+#endif /* QOS_REG_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __BL1_FWU_H__
-#define __BL1_FWU_H__
+#ifndef BL1_H
+#define BL1_H
#include <bl_common.h>
meminfo_t *bl2_mem_layout);
#endif /* __ASSEMBLY__ */
-#endif /* __BL1_FWU_H__ */
+#endif /* BL1_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __TBBR_IMG_DESC_H__
-#define __TBBR_IMG_DESC_H__
+#ifndef TBBR_IMG_DESC_H
+#define TBBR_IMG_DESC_H
#include <bl_common.h>
extern image_desc_t bl1_tbbr_image_descs[];
-#endif /* __TBBR_IMG_DESC_H__ */
+#endif /* TBBR_IMG_DESC_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef BL2_H__
-#define BL2_H__
+#ifndef BL2_H
+#define BL2_H
void bl2_main(void);
-#endif /* BL2_H__ */
+#endif /* BL2_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef BL2_H__
-#define BL2_H__
+#ifndef BL2U_H
+#define BL2U_H
void bl2u_main(void);
-#endif /* BL2_H__ */
+#endif /* BL2U_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __BL31_H__
-#define __BL31_H__
+#ifndef BL31_H
+#define BL31_H
#include <stdint.h>
void bl31_main(void);
void bl31_lib_init(void);
-#endif /* __BL31_H__ */
+#endif /* BL31_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __EA_HANDLE_H__
-#define __EA_HANDLE_H__
+#ifndef EA_HANDLE_H
+#define EA_HANDLE_H
/* Constants indicating the reason for an External Abort */
/* RAS event signalled as peripheral interrupt */
#define ERROR_INTERRUPT 3
-#endif /* __EA_HANDLE_H__ */
+#endif /* EA_HANDLE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __INTERRUPT_MGMT_H__
-#define __INTERRUPT_MGMT_H__
+#ifndef INTERRUPT_MGMT_H
+#define INTERRUPT_MGMT_H
#include <arch.h>
#include <utils_def.h>
int enable_intr_rm_local(uint32_t type, uint32_t security_state);
#endif /*__ASSEMBLY__*/
-#endif /* __INTERRUPT_MGMT_H__ */
+#endif /* INTERRUPT_MGMT_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __TLK_H__
-#define __TLK_H__
+#ifndef TLK_H
+#define TLK_H
#include <utils_def.h>
#define TOS_UID 0xbf00ff01 /* Implementation UID */
#define TOS_CALL_VERSION 0xbf00ff03 /* Trusted OS Call Version */
-#endif /* __TLK_H__ */
+#endif /* TLK_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLATFORM_SP_MIN_H__
-#define __PLATFORM_SP_MIN_H__
+#ifndef PLATFORM_SP_MIN_H
+#define PLATFORM_SP_MIN_H
+
+#include <stdint.h>
/*******************************************************************************
* Mandatory SP_MIN functions
/* Platforms that enable SP_MIN_WITH_SECURE_FIQ shall implement this api */
void sp_min_plat_fiq_handler(uint32_t id);
-#endif /* __PLATFORM_SP_MIN_H__ */
+#endif /* PLATFORM_SP_MIN_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLATFORM_TSP_H__
-
+#ifndef PLATFORM_TSP_H
+#define PLATFORM_TSP_H
/*******************************************************************************
* Mandatory TSP functions (only if platform contains a TSP)
void tsp_plat_arch_setup(void);
void tsp_platform_setup(void);
-
-#define __PLATFORM_H__
-
-#endif
+#endif /* PLATFORM_TSP_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __TSP_H__
-#define __TSP_H__
+#ifndef TSP_H
+#define TSP_H
/*
* SMC function IDs that TSP uses to signal various forms of completions
#endif /* __ASSEMBLY__ */
-#endif /* __TSP_H__ */
+#endif /* TSP_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __ASM_MACROS_S__
-#define __ASM_MACROS_S__
+#ifndef ASM_MACROS_S
+#define ASM_MACROS_S
#include <arch.h>
#include <asm_macros_common.S>
.endif
.endm
-#endif /* __ASM_MACROS_S__ */
+#endif /* ASM_MACROS_S */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __ASSERT_MACROS_S__
-#define __ASSERT_MACROS_S__
+#ifndef ASSERT_MACROS_S
+#define ASSERT_MACROS_S
/*
* Assembler macro to enable asm_assert. We assume that the stack is
b asm_assert;\
300:
-#endif /* __ASSERT_MACROS_S__ */
+#endif /* ASSERT_MACROS_S */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CONSOLE_MACROS_S__
-#define __CONSOLE_MACROS_S__
+#ifndef CONSOLE_MACROS_S
+#define CONSOLE_MACROS_S
#include <console.h>
b console_register
.endm
#endif /* USE_FINISH_CONSOLE_REG_2 */
-#endif /* __CONSOLE_MACROS_S__ */
+#endif /* CONSOLE_MACROS_S */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __EL3_COMMON_MACROS_S__
-#define __EL3_COMMON_MACROS_S__
+#ifndef EL3_COMMON_MACROS_S
+#define EL3_COMMON_MACROS_S
#include <arch.h>
#include <asm_macros.S>
#endif
.endm
-#endif /* __EL3_COMMON_MACROS_S__ */
+#endif /* EL3_COMMON_MACROS_S */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __ASM_MACROS_S__
-#define __ASM_MACROS_S__
+#ifndef ASM_MACROS_S
+#define ASM_MACROS_S
#include <arch.h>
#include <asm_macros_common.S>
.endm
#endif
-#endif /* __ASM_MACROS_S__ */
+#endif /* ASM_MACROS_S */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __ASSERT_MACROS_S__
-#define __ASSERT_MACROS_S__
+#ifndef ASSERT_MACROS_S
+#define ASSERT_MACROS_S
/*
* Assembler macro to enable asm_assert. Use this macro wherever
b asm_assert ;\
300:
-#endif /* __ASSERT_MACROS_S__ */
+#endif /* ASSERT_MACROS_S */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CONSOLE_MACROS_S__
-#define __CONSOLE_MACROS_S__
+#ifndef CONSOLE_MACROS_S
+#define CONSOLE_MACROS_S
#include <console.h>
b console_register
.endm
#endif /* USE_FINISH_CONSOLE_REG_2 */
-#endif /* __CONSOLE_MACROS_S__ */
+
+#endif /* CONSOLE_MACROS_S */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __EL3_COMMON_MACROS_S__
-#define __EL3_COMMON_MACROS_S__
+#ifndef EL3_COMMON_MACROS_S
+#define EL3_COMMON_MACROS_S
#include <arch.h>
#include <asm_macros.S>
#endif
.endm
-#endif /* __EL3_COMMON_MACROS_S__ */
+#endif /* EL3_COMMON_MACROS_S */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __ASM_MACROS_COMMON_S__
-#define __ASM_MACROS_COMMON_S__
+#ifndef ASM_MACROS_COMMON_S
+#define ASM_MACROS_COMMON_S
/*
* This macro is used to create a function label and place the
.endm
-#endif /* __ASM_MACROS_COMMON_S__ */
+#endif /* ASM_MACROS_COMMON_S */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __BL_COMMON_H__
-#define __BL_COMMON_H__
+#ifndef BL_COMMON_H
+#define BL_COMMON_H
#include <ep_info.h>
#include <param_header.h>
#endif /*__ASSEMBLY__*/
-#endif /* __BL_COMMON_H__ */
+#endif /* BL_COMMON_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __DESC_IMAGE_LOAD_H__
-#define __DESC_IMAGE_LOAD_H__
+#ifndef DESC_IMAGE_LOAD_H
+#define DESC_IMAGE_LOAD_H
#include <bl_common.h>
bl_params_t *get_next_bl_params_from_mem_params_desc(void);
void populate_next_bl_params_config(bl_params_t *bl2_to_next_bl_params);
-#endif /* __DESC_IMAGE_LOAD_H__ */
+#endif /* DESC_IMAGE_LOAD_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __EP_INFO_H__
-#define __EP_INFO_H__
+#ifndef EP_INFO_H
+#define EP_INFO_H
#include <param_header.h>
#include <utils_def.h>
#endif /*__ASSEMBLY__*/
-#endif /* __EP_INFO_H__ */
-
+#endif /* EP_INFO_H */
/* Helper functions to offer easier navigation of Device Tree Blob */
-#ifndef __FDT_WRAPPERS__
-#define __FDT_WRAPPERS__
+#ifndef FDT_WRAPPERS_H
+#define FDT_WRAPPERS_H
/* Number of cells, given total length in bytes. Each cell is 4 bytes long */
#define NCELLS(len) ((len) / 4U)
int fdtw_write_inplace_cells(void *dtb, int node, const char *prop,
unsigned int cells, void *value);
-#endif /* __FDT_WRAPPERS__ */
+#endif /* FDT_WRAPPERS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __IMAGE_DECOMPRESS_H__
-#define __IMAGE_DECOMPRESS_H__
+#ifndef IMAGE_DECOMPRESS_H
+#define IMAGE_DECOMPRESS_H
#include <stddef.h>
#include <stdint.h>
void image_decompress_prepare(struct image_info *info);
int image_decompress(struct image_info *info);
-#endif /* __IMAGE_DECOMPRESS_H___ */
+#endif /* IMAGE_DECOMPRESS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __INTERRUPT_PROPS_H__
-#define __INTERRUPT_PROPS_H__
+#ifndef INTERRUPT_PROPS_H
+#define INTERRUPT_PROPS_H
#ifndef __ASSEMBLY__
} interrupt_prop_t;
#endif /* __ASSEMBLY__ */
-#endif /* __INTERRUPT_PROPS_H__ */
+#endif /* INTERRUPT_PROPS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PARAM_HEADER_H__
-#define __PARAM_HEADER_H__
+#ifndef PARAM_HEADER_H
+#define PARAM_HEADER_H
#include <stdbool.h>
#include <utils_def.h>
#endif /*__ASSEMBLY__*/
-#endif /* __PARAM_HEADER_H__ */
-
+#endif /* PARAM_HEADER_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef ROMLIB_H_
+#ifndef ROMLIB_H
+#define ROMLIB_H
#define ROMLIB_MAJOR 0
#define ROMLIB_MINOR 1
int rom_lib_init(int version);
-#endif
+#endif /* ROMLIB_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __COT_DEF_H__
-#define __COT_DEF_H__
+#ifndef COT_DEF_H
+#define COT_DEF_H
/* TBBR CoT definitions */
#define COT_MAX_VERIFIED_PARAMS 4
-#endif /* __COT_DEF_H__ */
+#endif /* COT_DEF_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __TBBR_IMG_DEF_H__
-#define __TBBR_IMG_DEF_H__
+#ifndef TBBR_IMG_DEF_H
+#define TBBR_IMG_DEF_H
#include <utils_def.h>
/* Define size of the array */
#define MAX_NUMBER_IDS U(30)
-#endif /* __TBBR_IMG_DEF_H__ */
+#endif /* TBBR_IMG_DEF_H */
int rsb_read(uint8_t rt_addr, uint8_t reg_addr);
int rsb_write(uint8_t rt_addr, uint8_t reg_addr, uint8_t value);
-#endif
+#endif /* SUNXI_RSB_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __ARM_GICV3_COMMON_H__
-#define __ARM_GICV3_COMMON_H__
+#ifndef ARM_GICV3_COMMON_H
+#define ARM_GICV3_COMMON_H
/*******************************************************************************
* GIC500/GIC600 Re-distributor interface registers & constants
#define WAKER_SL_BIT (1U << WAKER_SL_SHIFT)
#define WAKER_QSC_BIT (1U << WAKER_QSC_SHIFT)
-#endif /* __ARM_GICV3_COMMON_H__ */
+#endif /* ARM_GICV3_COMMON_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CCI_H__
-#define __CCI_H__
+#ifndef CCI_H
+#define CCI_H
#include <utils_def.h>
void cci_disable_snoop_dvm_reqs(unsigned int master_id);
#endif /* __ASSEMBLY__ */
-#endif /* __CCI_H__ */
+#endif /* CCI_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CCN_H__
-#define __CCN_H__
+#ifndef CCN_H
+#define CCN_H
/*
* This macro defines the maximum number of master interfaces that reside on
int ccn_get_part0_id(uintptr_t periphbase);
#endif /* __ASSEMBLY__ */
-#endif /* __CCN_H__ */
+#endif /* CCN_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __GIC_COMMON_H__
-#define __GIC_COMMON_H__
+#ifndef GIC_COMMON_H
+#define GIC_COMMON_H
#include <utils_def.h>
(GIC_HIGHEST_NS_PRIORITY << 16) | \
(GIC_HIGHEST_NS_PRIORITY << 24))
-#endif /* __GIC_COMMON_H__ */
+#endif /* GIC_COMMON_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __GICV2_H__
-#define __GICV2_H__
+#ifndef GICV2_H
+#define GICV2_H
#include <gic_common.h>
void gicv2_interrupt_set_cfg(unsigned int id, unsigned int cfg);
#endif /* __ASSEMBLY__ */
-#endif /* __GICV2_H__ */
+#endif /* GICV2_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __GICV3_H__
-#define __GICV3_H__
+#ifndef GICV3_H
+#define GICV3_H
/*******************************************************************************
* GICv3 miscellaneous definitions
unsigned int gicv3_set_pmr(unsigned int mask);
#endif /* __ASSEMBLY__ */
-#endif /* __GICV3_H__ */
+#endif /* GICV3_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __NIC_400_H__
-#define __NIC_400_H__
+#ifndef NIC_400_H
+#define NIC_400_H
/*
* Address of slave 'n' security setting in the NIC-400 address region
*/
#define NIC400_ADDR_CTRL_SECURITY_REG(n) (0x8 + (n) * 4)
-#endif /* __NIC_400_H__ */
+#endif /* NIC_400_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PL011_H__
-#define __PL011_H__
+#ifndef PL011_H
+#define PL011_H
#include <console.h>
#endif /*__ASSEMBLY__*/
-#endif /* __PL011_H__ */
+#endif /* PL011_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PL061_GPIO_H__
-#define __PL061_GPIO_H__
+#ifndef PL061_GPIO_H
+#define PL061_GPIO_H
#include <gpio.h>
void pl061_gpio_register(uintptr_t base_addr, int gpio_dev);
void pl061_gpio_init(void);
-#endif /* __PL061_GPIO_H__ */
+#endif /* PL061_GPIO_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SMMU_V3_H__
-#define __SMMU_V3_H__
+#ifndef SMMU_V3_H
+#define SMMU_V3_H
-#include <utils_def.h>
#include <stdint.h>
+#include <utils_def.h>
/* SMMUv3 register offsets from device base */
#define SMMU_S_IDR1 U(0x8004)
int smmuv3_init(uintptr_t smmu_base);
-#endif /* __SMMU_V3_H__ */
+#endif /* SMMU_V3_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SP804_DELAY_TIMER_H__
-#define __SP804_DELAY_TIMER_H__
+#ifndef SP804_DELAY_TIMER_H
+#define SP804_DELAY_TIMER_H
#include <delay_timer.h>
#include <stdint.h>
sp804_timer_ops_init((base_addr), &sp804_timer_ops); \
} while (0)
-#endif /* __SP804_DELAY_TIMER_H__ */
+#endif /* SP804_DELAY_TIMER_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __AUTH_COMMON_H__
-#define __AUTH_COMMON_H__
+#ifndef AUTH_COMMON_H
+#define AUTH_COMMON_H
/*
* Authentication framework common types
.len = (unsigned int)_len \
}
-#endif /* __AUTH_COMMON_H__ */
+#endif /* AUTH_COMMON_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __AUTH_MOD_H__
-#define __AUTH_MOD_H__
+#ifndef AUTH_MOD_H
+#define AUTH_MOD_H
#if TRUSTED_BOARD_BOOT
#endif /* TRUSTED_BOARD_BOOT */
-#endif /* __AUTH_MOD_H__ */
+#endif /* AUTH_MOD_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CRYPTO_MOD_H__
-#define __CRYPTO_MOD_H__
+#ifndef CRYPTO_MOD_H
+#define CRYPTO_MOD_H
/* Return values */
enum crypto_ret_value {
extern const crypto_lib_desc_t crypto_lib_desc;
-#endif /* __CRYPTO_MOD_H__ */
+#endif /* CRYPTO_MOD_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __IMG_PARSER_MOD_H__
-#define __IMG_PARSER_MOD_H__
+#ifndef IMG_PARSER_MOD_H
+#define IMG_PARSER_MOD_H
#include <auth_common.h>
.get_auth_param = _get_param \
}
-#endif /* __IMG_PARSER_MOD_H__ */
+#endif /* IMG_PARSER_MOD_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __MBEDTLS_COMMON_H__
-#define __MBEDTLS_COMMON_H__
+#ifndef MBEDTLS_COMMON_H
+#define MBEDTLS_COMMON_H
void mbedtls_init(void);
-#endif /* __MBEDTLS_COMMON_H__ */
+#endif /* MBEDTLS_COMMON_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __MBEDTLS_CONFIG_H__
-#define __MBEDTLS_CONFIG_H__
+#ifndef MBEDTLS_CONFIG_H
+#define MBEDTLS_CONFIG_H
/*
* Key algorithms currently supported on mbed TLS libraries
#define TF_MBEDTLS_HEAP_SIZE U(7168)
#endif
-#endif /* __MBEDTLS_CONFIG_H__ */
+#endif /* MBEDTLS_CONFIG_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CADENCE_UART_H__
-#define __CADENCE_UART_H__
+#ifndef CDNS_UART_H
+#define CDNS_UART_H
#include <console.h>
#endif /*__ASSEMBLY__*/
-#endif
+#endif /* CDNS_UART_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __NORFLASH_H_
-#define __NORFLASH_H_
+#ifndef V2M_FLASH_H
+#define V2M_FLASH_H
#include <stdint.h>
int nor_unlock(uintptr_t base_addr);
int nor_erase(uintptr_t base_addr);
-#endif /* __NORFLASH_H_ */
-
+#endif /* V2M_FLASH_H*/
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CONSOLE_H__
-#define __CONSOLE_H__
+#ifndef CONSOLE_H
+#define CONSOLE_H
#include <utils_def.h>
#endif /* __ASSEMBLY__ */
-#endif /* __CONSOLE_H__ */
-
+#endif /* CONSOLE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CONSOLE_ASSERTIONS_H__
-#define __CONSOLE_ASSERTIONS_H__
+#ifndef CONSOLE_ASSERTIONS_H
+#define CONSOLE_ASSERTIONS_H
#include <cassert.h>
CASSERT(CONSOLE_T_DRVDATA == sizeof(console_t),
assert_console_t_drvdata_offset_mismatch);
-#endif /* __CONSOLE_ASSERTIONS_H__ */
-
+#endif /* CONSOLE_ASSERTIONS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CBMEM_CONSOLE_H__
-#define __CBMEM_CONSOLE_H__
+#ifndef CBMEM_CONSOLE_H
+#define CBMEM_CONSOLE_H
#include <console.h>
#endif /* __ASSEMBLER__ */
-#endif /* __CBMEM_CONSOLE_H__ */
+#endif /* CBMEM_CONSOLE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __DELAY_TIMER_H__
-#define __DELAY_TIMER_H__
+#ifndef DELAY_TIMER_H
+#define DELAY_TIMER_H
#include <stdint.h>
void udelay(uint32_t usec);
void timer_init(const timer_ops_t *ops_ptr);
-
-#endif /* __DELAY_TIMER_H__ */
+#endif /* DELAY_TIMER_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __DW_UFS_H__
-#define __DW_UFS_H__
+#ifndef DW_UFS_H
+#define DW_UFS_H
#include <stdint.h>
int dw_ufs_init(dw_ufs_params_t *params);
-#endif /* __DW_UFS_H__ */
+#endif /* DW_UFS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __GENERIC_DELAY_TIMER_H__
-#define __GENERIC_DELAY_TIMER_H__
+#ifndef GENERIC_DELAY_TIMER_H
+#define GENERIC_DELAY_TIMER_H
#include <stdint.h>
void generic_delay_timer_init(void);
-#endif /* __GENERIC_DELAY_TIMER_H__ */
+#endif /* GENERIC_DELAY_TIMER_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __GPIO_H__
-#define __GPIO_H__
+#ifndef GPIO_H
+#define GPIO_H
#define GPIO_DIR_OUT 0
#define GPIO_DIR_IN 1
int gpio_get_pull(int gpio);
void gpio_init(const gpio_ops_t *ops);
-#endif /* __GPIO_H__ */
+#endif /* GPIO_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __IO_BLOCK_H__
-#define __IO_BLOCK_H__
+#ifndef IO_BLOCK_H
+#define IO_BLOCK_H
#include <io_storage.h>
int register_io_dev_block(const struct io_dev_connector **dev_con);
-#endif /* __IO_BLOCK_H__ */
+#endif /* IO_BLOCK_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __IO_DRIVER_H__
-#define __IO_DRIVER_H__
+#ifndef IO_DRIVER_H
+#define IO_DRIVER_H
#include <io_storage.h>
#include <stdint.h>
/* Register an IO device */
int io_register_device(const io_dev_info_t *dev_info);
-#endif /* __IO_DRIVER_H__ */
+#endif /* IO_DRIVER_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __IO_DUMMY_H__
-#define __IO_DUMMY_H__
+#ifndef IO_DUMMY_H
+#define IO_DUMMY_H
int register_io_dev_dummy(const struct io_dev_connector **dev_con);
-#endif /* __IO_DUMMY_H__ */
+#endif /* IO_DUMMY_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __IO_FIP_H__
-#define __IO_FIP_H__
+#ifndef IO_FIP_H
+#define IO_FIP_H
struct io_dev_connector;
int register_io_dev_fip(const struct io_dev_connector **dev_con);
-#endif /* __IO_FIP_H__ */
+#endif /* IO_FIP_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __IO_MEMMAP_H__
-#define __IO_MEMMAP_H__
+#ifndef IO_MEMMAP_H
+#define IO_MEMMAP_H
struct io_dev_connector;
int register_io_dev_memmap(const struct io_dev_connector **dev_con);
-#endif /* __IO_MEMMAP_H__ */
+#endif /* IO_MEMMAP_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __IO_SH_H__
-#define __IO_SH_H__
+#ifndef IO_SEMIHOSTING_H
+#define IO_SEMIHOSTING_H
struct io_dev_connector;
int register_io_dev_sh(const struct io_dev_connector **dev_con);
-#endif /* __IO_SH_H__ */
+#endif /* IO_SEMIHOSTING_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __IO_H__
-#define __IO_H__
+#ifndef IO_STORAGE_H
+#define IO_STORAGE_H
#include <errno.h>
#include <stdint.h>
int io_close(uintptr_t handle);
-#endif /* __IO_H__ */
+#endif /* IO_STORAGE_H */
/* Address map types for Marvell address translation unit drivers */
-#ifndef _ADDR_MAP_H_
-#define _ADDR_MAP_H_
+#ifndef ADDR_MAP_H
+#define ADDR_MAP_H
#include <stdint.h>
uint32_t target_id;
};
-#endif /* _ADDR_MAP_H_ */
+#endif /* ADDR_MAP_H */
/* AXI to M-Bridge decoding unit driver for Marvell Armada 8K and 8K+ SoCs */
-#ifndef _AMB_ADEC_H_
-#define _AMB_ADEC_H_
+#ifndef AMB_ADEC_H
+#define AMB_ADEC_H
#include <stdint.h>
int init_amb_adec(uintptr_t base);
-#endif /* _AMB_ADEC_H_ */
+#endif /* AMB_ADEC_H */
* SPDX-License-Identifier: BSD-3-Clause
* https://spdx.org/licenses
*/
-#ifndef _ARO_H_
-#define _ARO_H_
+#ifndef ARO_H
+#define ARO_H
enum hws_freq {
CPU_FREQ_2000,
int init_aro(void);
-#endif /* _ARO_H_ */
+#endif /* ARO_H */
* for Marvell SoCs in AP806, AP807, and AP810
*/
-#ifndef _CACHE_LLC_H_
-#define _CACHE_LLC_H_
+#ifndef CACHE_LLC_H
+#define CACHE_LLC_H
#define LLC_CTRL(ap) (MVEBU_LLC_BASE(ap) + 0x100)
#define LLC_SYNC(ap) (MVEBU_LLC_BASE(ap) + 0x700)
void llc_runtime_enable(int ap_index);
#endif
-#endif /* _CACHE_LLC_H_ */
-
+#endif /* CACHE_LLC_H */
/* CCU unit device driver for Marvell AP807, AP807 and AP810 SoCs */
-#ifndef _CCU_H_
-#define _CCU_H_
+#ifndef CCU_H
+#define CCU_H
#ifndef __ASSEMBLY__
#include <addr_map.h>
void ccu_restore_win_all(int ap_id);
#endif
-#endif /* _CCU_H_ */
+#endif /* CCU_H */
/* GWIN unit device driver for Marvell AP810 SoC */
-#ifndef _GWIN_H_
-#define _GWIN_H_
+#ifndef GWIN_H
+#define GWIN_H
#include <addr_map.h>
void gwin_temp_win_insert(int ap_index, struct addr_map_win *win, int size);
void gwin_temp_win_remove(int ap_index, struct addr_map_win *win, int size);
-#endif /* _GWIN_H_ */
+#endif /* GWIN_H */
* https://spdx.org/licenses
*/
-#ifndef _I2C_H_
-#define _I2C_H_
+#ifndef I2C_H
+#define I2C_H
void i2c_init(void);
int i2c_write(uint8_t chip,
unsigned int addr, int alen, uint8_t *buffer, int len);
-#endif
+
+#endif /* I2C_H */
/* IO Window unit device driver for Marvell AP807, AP807 and AP810 SoCs */
-#ifndef _IO_WIN_H_
-#define _IO_WIN_H_
+#ifndef IO_WIN_H
+#define IO_WIN_H
#include <addr_map.h>
void iow_save_win_all(int ap_id);
void iow_restore_win_all(int ap_id);
-#endif /* _IO_WIN_H_ */
+#endif /* IO_WIN_H */
/* IOW unit device driver for Marvell CP110 and CP115 SoCs */
-#ifndef _IOB_H_
-#define _IOB_H_
+#ifndef IOB_H
+#define IOB_H
#include <addr_map.h>
void iob_cfg_space_update(int ap_idx, int cp_idx,
uintptr_t base, uintptr_t new_base);
-#endif /* _IOB_H_ */
+#endif /* IOB_H */
/* MCI bus driver for Marvell ARMADA 8K and 8K+ SoCs */
-#ifndef _MCI_H_
-#define _MCI_H_
+#ifndef MCI_H
+#define MCI_H
int mci_initialize(int mci_index);
void mci_turn_link_down(void);
void mci_turn_link_on(void);
int mci_get_link_status(void);
-#endif /* _MCI_H_ */
+#endif /* MCI_H */
/* AP8xx Marvell SoC driver */
-#ifndef __AP_SETUP_H__
-#define __AP_SETUP_H__
+#ifndef AP_SETUP_H
+#define AP_SETUP_H
void ap_init(void);
void ap_ble_init(void);
int ap_get_count(void);
-#endif /* __AP_SETUP_H__ */
+#endif /* AP_SETUP_H */
/* CP110 Marvell SoC driver */
-#ifndef __CP110_SETUP_H__
-#define __CP110_SETUP_H__
+#ifndef CP110_SETUP_H
+#define CP110_SETUP_H
#include <mmio.h>
#include <mvebu_def.h>
void cp110_init(uintptr_t cp110_base, uint32_t stream_id);
void cp110_ble_init(uintptr_t cp110_base);
-#endif /* __CP110_SETUP_H__ */
+#endif /* CP110_SETUP_H */
/* Driver for thermal unit located in Marvell ARMADA 8K and compatible SoCs */
-#ifndef _THERMAL_H
-#define _THERMAL_H
+#ifndef THERMAL_H
+#define THERMAL_H
struct tsen_config {
/* thermal temperature parameters */
int marvell_thermal_read(struct tsen_config *tsen_cfg, int *temp);
struct tsen_config *marvell_thermal_config_get(void);
-#endif /* _THERMAL_H */
+#endif /* THERMAL_H */
/* This driver provides support for Mentor Graphics MI2CV IP core */
-#ifndef _MI2CV_H_
-#define _MI2CV_H_
+#ifndef MI2CV_H
+#define MI2CV_H
#include <stdint.h>
int i2c_write(uint8_t chip,
unsigned int addr, int alen, uint8_t *buffer, int len);
-#endif
+
+#endif /* MI2CV_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __MMC_H__
-#define __MMC_H__
+#ifndef MMC_H
+#define MMC_H
#include <stdint.h>
#include <utils_def.h>
unsigned int width, unsigned int flags,
struct mmc_device_info *device_info);
-#endif /* __MMC_H__ */
+#endif /* MMC_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __GPT_H__
-#define __GPT_H__
+#ifndef GPT_H
+#define GPT_H
#include <partition.h>
int parse_gpt_entry(gpt_entry_t *gpt_entry, partition_entry_t *entry);
-#endif /* __GPT_H__ */
+#endif /* GPT_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __MBR_H__
-#define __MBR_H__
+#ifndef MBR_H
+#define MBR_H
#define MBR_OFFSET 0
unsigned int sector_nums;
} mbr_entry_t;
-#endif /* __MBR_H__ */
+#endif /* MBR_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PARTITION_H__
-#define __PARTITION_H__
+#ifndef PARTITION_H
+#define PARTITION_H
#include <cassert.h>
#include <stdint.h>
const partition_entry_list_t *get_partition_entry_list(void);
void partition_init(unsigned int image_id);
-#endif /* __PARTITION_H__ */
+#endif /* PARTITION_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_GPIO_H__
-#define __PLAT_GPIO_H__
+#ifndef STM32_GPIO_H
+#define STM32_GPIO_H
#include <utils_def.h>
uint32_t pull, uint32_t alternate);
#endif /*__ASSEMBLY__*/
-#endif /*__PLAT_GPIO_H__*/
+#endif /* STM32_GPIO_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __STM32MP1_I2C_H
-#define __STM32MP1_I2C_H
+#ifndef STM32_I2C_H
+#define STM32_I2C_H
#include <stdint.h>
#include <utils_def.h>
int stm32_i2c_config_analog_filter(struct i2c_handle_s *hi2c,
uint32_t analog_filter);
-#endif /* __STM32MP1_I2C_H */
+#endif /* STM32_I2C_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __STM32MP1_CLK_H__
-#define __STM32MP1_CLK_H__
+#ifndef STM32MP1_CLK_H
+#define STM32MP1_CLK_H
#include <arch_helpers.h>
#include <stdbool.h>
return base - (uint32_t)(~read_cntpct_el0());
}
-#endif /* __STM32MP1_CLK_H__ */
+#endif /* STM32MP1_CLK_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __STM32MP1_CLKFUNC_H__
-#define __STM32MP1_CLKFUNC_H__
+#ifndef STM32MP1_CLKFUNC_H
+#define STM32MP1_CLKFUNC_H
#include <stdbool.h>
uintptr_t fdt_get_stgen_base(void);
int fdt_get_clock_id(int node);
-#endif /* __STM32MP1_CLKFUNC_H__ */
+#endif /* STM32MP1_CLKFUNC_H */
* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
*/
-#ifndef _STM32MP1_DDR_H
-#define _STM32MP1_DDR_H
+#ifndef STM32MP1_DDR_H
+#define STM32MP1_DDR_H
#include <stdbool.h>
+#include <stdint.h>
#define DT_DDR_COMPAT "st,stm32mp1-ddr"
int stm32mp1_ddr_clk_enable(struct ddr_info *priv, uint16_t mem_speed);
void stm32mp1_ddr_init(struct ddr_info *priv,
struct stm32mp1_ddr_config *config);
-#endif /* _STM32MP1_DDR_H */
+#endif /* STM32MP1_DDR_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __STM32MP1_DDR_HELPERS_H__
-#define __STM32MP1_DDR_HELPERS_H__
+#ifndef STM32MP1_DDR_HELPERS_H
+#define STM32MP1_DDR_HELPERS_H
void ddr_enable_clock(void);
-#endif /* __STM32MP1_DDR_HELPERS_H__ */
+#endif /* STM32MP1_DDR_HELPERS_H */
* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
*/
-#ifndef _RAM_STM32MP1_DDR_REGS_H
-#define _RAM_STM32MP1_DDR_REGS_H
+#ifndef STM32MP1_DDR_REGS_H
+#define STM32MP1_DDR_REGS_H
#include <utils_def.h>
void ddr_enable_clock(void);
-#endif /* _RAM_STM32MP1_DDR_REGS_H */
+#endif /* STM32MP1_DDR_REGS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __STM32MP1_PMIC_H__
-#define __STM32MP1_PMIC_H__
+#ifndef STM32MP1_PMIC_H
+#define STM32MP1_PMIC_H
#include <stdbool.h>
void initialize_pmic(void);
int pmic_ddr_power_init(enum ddr_type ddr_type);
-#endif /* __STM32MP1_PMIC_H__ */
+#endif /* STM32MP1_PMIC_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __STM32MP1_PWR_H__
-#define __STM32MP1_PWR_H__
+#ifndef STM32MP1_PWR_H
+#define STM32MP1_PWR_H
#include <utils_def.h>
#define PWR_MPUCR_CSTDBYDIS BIT(3)
#define PWR_MPUCR_CSSF BIT(9)
-#endif /* __STM32MP1_PWR_H__ */
+#endif /* STM32MP1_PWR_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef _STM32MP1_RAM_H
-#define _STM32MP1_RAM_H
+#ifndef STM32MP1_RAM_H
+#define STM32MP1_RAM_H
int stm32mp1_ddr_probe(void);
-#endif /* _STM32MP1_RAM_H */
+#endif /* STM32MP1_RAM_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __STM32MP1_RCC_H__
-#define __STM32MP1_RCC_H__
+#ifndef STM32MP1_RCC_H
+#define STM32MP1_RCC_H
#include <utils_def.h>
/* Values of RCC_MP_AHB4ENSETR register */
#define RCC_MP_AHB4ENSETR_GPIOGEN BIT(6)
-#endif /* __STM32MP1_RCC_H__ */
+#endif /* STM32MP1_RCC_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __STM32MP1_RESET_H__
-#define __STM32MP1_RESET_H__
+#ifndef STM32MP1_RESET_H
+#define STM32MP1_RESET_H
#include <stdint.h>
void stm32mp1_reset_assert(uint32_t reset_id);
void stm32mp1_reset_deassert(uint32_t reset_id);
-#endif /* __STM32MP1_RESET_H__ */
+#endif /* STM32MP1_RESET_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-
-#ifndef __STPMU1_H__
-#define __STPMU1_H__
+#ifndef STPMU1_H
+#define STPMU1_H
#include <stm32_i2c.h>
#include <utils_def.h>
int stpmu1_regulator_voltage_set(const char *name, uint16_t millivolts);
void stpmu1_bind_i2c(struct i2c_handle_s *i2c_handle, uint16_t i2c_addr);
-#endif /* __STPMU1_H__ */
+#endif /* STPMU1_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __DW_MMC_H__
-#define __DW_MMC_H__
+#ifndef DW_MMC_H
+#define DW_MMC_H
#include <mmc.h>
void dw_mmc_init(dw_mmc_params_t *params, struct mmc_device_info *info);
-#endif /* __DW_MMC_H__ */
+#endif /* DW_MMC_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __UART_16550_H__
-#define __UART_16550_H__
+#ifndef UART_16550_H
+#define UART_16550_H
#include <console.h>
#endif /*__ASSEMBLY__*/
-#endif /* __UART_16550_H__ */
+#endif /* UART_16550_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __UFS_H__
-#define __UFS_H__
+#ifndef UFS_H
+#define UFS_H
#include <utils_def.h>
size_t ufs_write_blocks(int lun, int lba, const uintptr_t buf, size_t size);
int ufs_init(const ufs_ops_t *ops, ufs_params_t *params);
-#endif /* __UFS_H__ */
+#endif /* UFS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __ARCH_H__
-#define __ARCH_H__
+#ifndef ARCH_H
+#define ARCH_H
#include <utils_def.h>
#define AMEVTYPER1E p15, 0, c13, c15, 6
#define AMEVTYPER1F p15, 0, c13, c15, 7
-#endif /* __ARCH_H__ */
+#endif /* ARCH_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SMCCC_HELPERS_H__
-#define __SMCCC_HELPERS_H__
+#ifndef SMCCC_HELPERS_H
+#define SMCCC_HELPERS_H
#include <smccc.h>
#endif /*__ASSEMBLY__*/
-#endif /* __SMCCC_HELPERS_H__ */
+#endif /* SMCCC_HELPERS_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SMCCC_MACROS_S__
-#define __SMCCC_MACROS_S__
+#ifndef SMCCC_MACROS_S
+#define SMCCC_MACROS_S
#include <arch.h>
eret
.endm
-#endif /* __SMCCC_MACROS_S__ */
+#endif /* SMCCC_MACROS_S */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __JMP_H__
-#define __JMP_H__
+#ifndef SETJMP_H
+#define SETJMP_H
#define JMP_CTX_X19 0x0
#define JMP_CTX_X21 0x10
void longjmp(struct jmpbuf *buf);
#endif /* __ASSEMBLY__ */
-#endif /* __JMP_H__ */
+#endif /* SETJMP_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SMCCC_HELPERS_H__
-#define __SMCCC_HELPERS_H__
+#ifndef SMCCC_HELPERS_H
+#define SMCCC_HELPERS_H
#include <smccc.h>
#endif /*__ASSEMBLY__*/
-#endif /* __SMCCC_HELPERS_H__ */
+#endif /* SMCCC_HELPERS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CASSERT_H__
-#define __CASSERT_H__
+#ifndef CASSERT_H
+#define CASSERT_H
#include <cdefs.h>
#define CASSERT(cond, msg) \
typedef char msg[(cond) ? 1 : -1] __unused
-#endif /* __CASSERT_H__ */
+#endif /* CASSERT_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __COREBOOT_H__
-#define __COREBOOT_H__
+#ifndef COREBOOT_H
+#define COREBOOT_H
#include <stdint.h>
void coreboot_table_setup(void *base);
-#endif /* __COREBOOT_H__ */
+#endif /* COREBOOT_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __AEM_GENERIC_H__
-#define __AEM_GENERIC_H__
+#ifndef AEM_GENERIC_H
+#define AEM_GENERIC_H
/* BASE AEM midr for revision 0 */
#define BASE_AEM_MIDR 0x410FD0F0
-#endif /* __AEM_GENERIC_H__ */
+#endif /* AEM_GENERIC_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CORTEX_A12_H__
-#define __CORTEX_A12_H__
+#ifndef CORTEX_A12_H
+#define CORTEX_A12_H
/*******************************************************************************
* Cortex-A12 midr with version/revision set to 0
******************************************************************************/
#define CORTEX_A12_ACTLR_SMP_BIT (1 << 6)
-#endif /* __CORTEX_A12_H__ */
+#endif /* CORTEX_A12_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CORTEX_A15_H__
-#define __CORTEX_A15_H__
+#ifndef CORTEX_A15_H
+#define CORTEX_A15_H
/*******************************************************************************
* Cortex-A15 midr with version/revision set to 0
#define CORTEX_A15_ACTLR_INV_BTB_BIT (1 << 0)
#define CORTEX_A15_ACTLR_SMP_BIT (1 << 6)
-#endif /* __CORTEX_A15_H__ */
+#endif /* CORTEX_A15_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CORTEX_A17_H__
-#define __CORTEX_A17_H__
+#ifndef CORTEX_A17_H
+#define CORTEX_A17_H
/*******************************************************************************
* Cortex-A17 midr with version/revision set to 0
******************************************************************************/
#define CORTEX_A17_ACTLR_SMP_BIT (1 << 6)
-#endif /* __CORTEX_A17_H__ */
+#endif /* CORTEX_A17_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CORTEX_A32_H__
-#define __CORTEX_A32_H__
+#ifndef CORTEX_A32_H
+#define CORTEX_A32_H
/* Cortex-A32 Main ID register for revision 0 */
#define CORTEX_A32_MIDR 0x410FD010
#define CORTEX_A32_CPUECTLR_EL1 p15, 1, c15
#define CORTEX_A32_CPUECTLR_SMPEN_BIT (1 << 6)
-#endif /* __CORTEX_A32_H__ */
+#endif /* CORTEX_A32_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CORTEX_A5_H__
-#define __CORTEX_A5_H__
+#ifndef CORTEX_A5_H
+#define CORTEX_A5_H
/*******************************************************************************
* Cortex-A8 midr with version/revision set to 0
******************************************************************************/
#define CORTEX_A5_ACTLR_SMP_BIT (1 << 6)
-#endif /* __CORTEX_A5_H__ */
+#endif /* CORTEX_A5_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CORTEX_A53_H__
-#define __CORTEX_A53_H__
+#ifndef CORTEX_A53_H
+#define CORTEX_A53_H
/* Cortex-A53 midr for revision 0 */
#define CORTEX_A53_MIDR 0x410FD030
******************************************************************************/
#define CORTEX_A53_L2MERRSR p15, 3, c15
-#endif /* __CORTEX_A53_H__ */
+#endif /* CORTEX_A53_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CORTEX_A57_H__
-#define __CORTEX_A57_H__
+#ifndef CORTEX_A57_H
+#define CORTEX_A57_H
+
#include <utils_def.h>
/* Cortex-A57 midr for revision 0 */
******************************************************************************/
#define CORTEX_A57_L2MERRSR p15, 3, c15
-#endif /* __CORTEX_A57_H__ */
+#endif /* CORTEX_A57_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CORTEX_A7_H__
-#define __CORTEX_A7_H__
+#ifndef CORTEX_A7_H
+#define CORTEX_A7_H
/*******************************************************************************
* Cortex-A7 midr with version/revision set to 0
******************************************************************************/
#define CORTEX_A7_ACTLR_SMP_BIT (1 << 6)
-#endif /* __CORTEX_A7_H__ */
+#endif /* CORTEX_A7_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CORTEX_A72_H__
-#define __CORTEX_A72_H__
+#ifndef CORTEX_A72_H
+#define CORTEX_A72_H
#include <utils_def.h>
/* Cortex-A72 midr for revision 0 */
******************************************************************************/
#define CORTEX_A72_L2MERRSR p15, 3, c15
-#endif /* __CORTEX_A72_H__ */
+#endif /* CORTEX_A72_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CORTEX_A9_H__
-#define __CORTEX_A9_H__
+#ifndef CORTEX_A9_H
+#define CORTEX_A9_H
/*******************************************************************************
* Cortex-A9 midr with version/revision set to 0
DEFINE_COPROCR_RW_FUNCS(pcr, PCR)
#endif
-#endif /* __CORTEX_A9_H__ */
+#endif /* CORTEX_A9_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CPU_MACROS_S__
-#define __CPU_MACROS_S__
+#ifndef CPU_MACROS_S
+#define CPU_MACROS_S
#include <arch.h>
#include <errata_report.h>
beq \_label
.endm
-#endif /* __CPU_MACROS_S__ */
+#endif /* CPU_MACROS_S */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __AEM_GENERIC_H__
-#define __AEM_GENERIC_H__
+#ifndef AEM_GENERIC_H
+#define AEM_GENERIC_H
/* BASE AEM midr for revision 0 */
#define BASE_AEM_MIDR 0x410FD0F0
/* Foundation AEM midr for revision 0 */
#define FOUNDATION_AEM_MIDR 0x410FD000
-
-#endif /* __AEM_GENERIC_H__ */
+#endif /* AEM_GENERIC_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CORTEX_A35_H__
-#define __CORTEX_A35_H__
+#ifndef CORTEX_A35_H
+#define CORTEX_A35_H
/* Cortex-A35 Main ID register for revision 0 */
#define CORTEX_A35_MIDR 0x410FD040
#define CORTEX_A35_CPUECTLR_EL1 S3_1_C15_C2_1
#define CORTEX_A35_CPUECTLR_SMPEN_BIT (1 << 6)
-#endif /* __CORTEX_A35_H__ */
+#endif /* CORTEX_A35_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CORTEX_A53_H__
-#define __CORTEX_A53_H__
+#ifndef CORTEX_A53_H
+#define CORTEX_A53_H
/* Cortex-A53 midr for revision 0 */
#define CORTEX_A53_MIDR U(0x410FD030)
******************************************************************************/
#define CORTEX_A53_L2MERRSR_EL1 S3_1_C15_C2_3
-#endif /* __CORTEX_A53_H__ */
+#endif /* CORTEX_A53_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CORTEX_A55_H__
-#define __CORTEX_A55_H__
+#ifndef CORTEX_A55_H
+#define CORTEX_A55_H
/* Cortex-A55 MIDR for revision 0 */
#define CORTEX_A55_MIDR 0x410fd050
/* Definitions of register field mask in CORTEX_A55_CPUPWRCTLR_EL1 */
#define CORTEX_A55_CORE_PWRDN_EN_MASK 0x1
-#endif /* __CORTEX_A55_H__ */
+#endif /* CORTEX_A55_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CORTEX_A57_H__
-#define __CORTEX_A57_H__
+#ifndef CORTEX_A57_H
+#define CORTEX_A57_H
#include <utils_def.h>
/* Cortex-A57 midr for revision 0 */
******************************************************************************/
#define CORTEX_A57_L2MERRSR_EL1 S3_1_C15_C2_3
-#endif /* __CORTEX_A57_H__ */
+#endif /* CORTEX_A57_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CORTEX_A72_H__
-#define __CORTEX_A72_H__
+#ifndef CORTEX_A72_H
+#define CORTEX_A72_H
#include <utils_def.h>
/* Cortex-A72 midr for revision 0 */
******************************************************************************/
#define CORTEX_A72_L2MERRSR_EL1 S3_1_C15_C2_3
-#endif /* __CORTEX_A72_H__ */
+#endif /* CORTEX_A72_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CORTEX_A73_H__
-#define __CORTEX_A73_H__
+#ifndef CORTEX_A73_H
+#define CORTEX_A73_H
/* Cortex-A73 midr for revision 0 */
#define CORTEX_A73_MIDR 0x410FD090
#define CORTEX_A73_IMP_DEF_REG1_DISABLE_LOAD_PASS_STORE (1 << 3)
-#endif /* __CORTEX_A73_H__ */
+#endif /* CORTEX_A73_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CORTEX_A76_H__
-#define __CORTEX_A76_H__
+#ifndef CORTEX_A76_H
+#define CORTEX_A76_H
/* Cortex-A76 MIDR for revision 0 */
#define CORTEX_A76_MIDR 0x410fd0b0
/* Definitions of register field mask in CORTEX_A76_CPUPWRCTLR_EL1 */
#define CORTEX_A76_CORE_PWRDN_EN_MASK 0x1
-#endif /* __CORTEX_A76_H__ */
+#endif /* CORTEX_A76_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CORTEX_DEIMOS_H__
-#define __CORTEX_DEIMOS_H__
+#ifndef CORTEX_DEIMOS_H
+#define CORTEX_DEIMOS_H
#define CORTEX_DEIMOS_MIDR U(0x410FD0D0)
#define CORTEX_DEIMOS_CPUPWRCTLR_EL1 S3_0_C15_C2_7
#define CORTEX_DEIMOS_CPUPWRCTLR_EL1_CORE_PWRDN_BIT (U(1) << 0)
-#endif /* __CORTEX_DEIMOS_H__ */
+#endif /* CORTEX_DEIMOS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CORTEX_HELIOS_H__
-#define __CORTEX_HELIOS_H__
+#ifndef CORTEX_HELIOS_H
+#define CORTEX_HELIOS_H
#define CORTEX_HELIOS_MIDR U(0x410FD060)
#define CORTEX_HELIOS_CPUPWRCTLR_EL1 S3_0_C15_C2_7
#define CORTEX_HELIOS_CPUPWRCTLR_EL1_CORE_PWRDN_BIT (U(1) << 0)
-#endif /* __CORTEX_HELIOS_H__ */
+#endif /* CORTEX_HELIOS_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CPU_MACROS_S__
-#define __CPU_MACROS_S__
+#ifndef CPU_MACROS_S
+#define CPU_MACROS_S
#include <arch.h>
#include <errata_report.h>
.endm
#endif
-#endif /* __CPU_MACROS_S__ */
-
/*
* This macro is used on some CPUs to detect if they are vulnerable
* to CVE-2017-5715.
cmp w0, #((\_cpu_midr >> MIDR_PN_SHIFT) & MIDR_PN_MASK)
b.eq \_label
.endm
+
+#endif /* CPU_MACROS_S */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __DENVER_H__
-#define __DENVER_H__
+#ifndef DENVER_H
+#define DENVER_H
/* MIDR values for Denver */
#define DENVER_MIDR_PN0 U(0x4E0F0000)
/* Disable Dynamic Code Optimisation */
void denver_disable_dco(void);
-#endif
+#endif /* __ASSEMBLY__ */
-#endif /* __DENVER_H__ */
+#endif /* DENVER_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PUBSUB_H__
-#define __PUBSUB_H__
+#ifndef PUBSUB_H
+#define PUBSUB_H
#define __pubsub_start_sym(event) __pubsub_##event##_start
#define __pubsub_end_sym(event) __pubsub_##event##_end
typedef void* (*pubsub_cb_t)(const void *arg);
#endif /* __LINKER__ */
-#endif /* __PUBSUB_H__ */
+#endif /* PUBSUB_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef RAS_COMMON
-#define RAS_COMMON
+#ifndef RAS_H
+#define RAS_H
#define ERR_HANDLER_VERSION 1U
void ras_init(void);
#endif /* __ASSEMBLY__ */
-#endif /* RAS_COMMON */
+
+#endif /* RAS_H */
* All rights reserved.
*/
-#ifndef AARCH32_ENDIAN_H
-#define AARCH32_ENDIAN_H
+#ifndef ENDIAN__H
+#define ENDIAN__H
#include <stdint.h>
#define __bswap32(x) __bswap32_var(x)
#endif /* __OPTIMIZE__ */
-#endif /* AARCH32_ENDIAN_H */
+#endif /* ENDIAN__H */
* SPDX-License-Identifier: BSD-3-Clause
*/
+#ifndef STDDEF__H
+#define STDDEF__H
+
#ifndef SIZET_
typedef unsigned int size_t;
#define SIZET_
typedef long ptrdiff_t;
#define _PTRDIFF_T
#endif
+
+#endif /* STDDEF__H */
* SPDX-License-Identifier: BSD-3-Clause
*/
+#ifndef STDIO__H
+#define STDIO__H
+
#ifndef SIZET_
typedef unsigned int size_t;
#define SIZET_
typedef int ssize_t;
#define SSIZET_
#endif
+
+#endif /* STDIO__H */
* SPDX-License-Identifier: BSD-3-Clause
*/
+#ifndef STDLIB__H
+#define STDLIB__H
+
#ifndef SIZET_
typedef unsigned int size_t;
#define SIZET_
#define EXIT_FAILURE 1
#define EXIT_SUCCESS 0
+
+#endif /* STDLIB__H */
* SPDX-License-Identifier: BSD-3-Clause
*/
+#ifndef STRING__H
+#define STRING__H
+
#ifndef SIZET_
typedef unsigned int size_t;
#define SIZET_
#endif
+
+#endif /* STRING__H */
* SPDX-License-Identifier: BSD-3-Clause
*/
+#ifndef TIME__H
+#define TIME__H
+
#ifndef SIZET_
typedef unsigned int size_t;
#define SIZET_
#endif
typedef long int time_t;
+
+#endif /* TIME__H */
* All rights reserved.
*/
-#ifndef AARCH64_ENDIAN_H
-#define AARCH64_ENDIAN_H
+#ifndef ENDIAN__H
+#define ENDIAN__H
#include <stdint.h>
#define __bswap32(x) __bswap32_var(x)
#endif /* __OPTIMIZE__ */
-#endif /* AARCH64_ENDIAN_H */
+#endif /* ENDIAN__H */
* SPDX-License-Identifier: BSD-3-Clause
*/
+#ifndef STDDEF__H
+#define STDDEF__H
+
#ifndef SIZET_
typedef unsigned long size_t;
#define SIZET_
typedef long ptrdiff_t;
#define _PTRDIFF_T
#endif
+
+#endif /* STDDEF__H */
* SPDX-License-Identifier: BSD-3-Clause
*/
+#ifndef STDIO__H
+#define STDIO__H
+
#ifndef SIZET_
typedef unsigned long size_t;
#define SIZET_
typedef long ssize_t;
#define SSIZET_
#endif
+
+#endif /* STDIO__H */
* SPDX-License-Identifier: BSD-3-Clause
*/
+#ifndef STDLIB__H
+#define STDLIB__H
+
#ifndef SIZET_
typedef unsigned long size_t;
#define SIZET_
#define EXIT_FAILURE 1
#define EXIT_SUCCESS 0
+
+#endif /* STDLIB__H */
* SPDX-License-Identifier: BSD-3-Clause
*/
+#ifndef STRING__H
+#define STRING__H
+
#ifndef SIZET_
typedef unsigned long size_t;
#define SIZET_
#endif
+
+#endif /* STRING__H */
* SPDX-License-Identifier: BSD-3-Clause
*/
+#ifndef TIME__H
+#define TIME__H
+
#ifndef SIZET_
typedef unsigned long size_t;
#define SIZET_
#endif
typedef long int time_t;
+
+#endif /* TIME__H */
le32enc(p + 4, (uint32_t)(u >> 32));
}
-#endif /* SYS_ENDIAN_H */
+#endif /* ENDIAN_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __MMIO_H__
-#define __MMIO_H__
+#ifndef MMIO_H
+#define MMIO_H
#include <stdint.h>
mmio_write_32(addr, (mmio_read_32(addr) & ~clear) | set);
}
-#endif /* __MMIO_H__ */
+#endif /* MMIO_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __OPTEE_UTILS_H__
-#define __OPTEE_UTILS_H__
+#ifndef OPTEE_UTILS_H
+#define OPTEE_UTILS_H
#include <bl_common.h>
image_info_t *pager_image_info,
image_info_t *paged_image_info);
-#endif /* __OPTEE_UTILS_H__ */
+#endif /* OPTEE_UTILS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PMF_ASM_MACROS_S__
-#define __PMF_ASM_MACROS_S__
+#ifndef PMF_ASM_MACROS_S
+#define PMF_ASM_MACROS_S
#define PMF_TS_SIZE 8
add x0, x0, x1
.endm
-#endif /* __PMF_ASM_MACROS_S__ */
+#endif /* PMF_ASM_MACROS_S */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __RUNTIME_INSTR_H__
-#define __RUNTIME_INSTR_H__
+#ifndef RUNTIME_INSTR_H
+#define RUNTIME_INSTR_H
#include <utils_def.h>
PMF_DECLARE_GET_TIMESTAMP(rt_instr_svc)
#endif /* __ASSEMBLY__ */
-#endif /* __RUNTIME_INSTR_H__ */
+#endif /* RUNTIME_INSTR_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SEMIHOSTING_H__
-#define __SEMIHOSTING_H__
+#ifndef SEMIHOSTING_H
+#define SEMIHOSTING_H
#include <stdint.h>
#include <stdio.h> /* For ssize_t */
void semihosting_write_string(char *string);
char semihosting_read_char(void);
-#endif /* __SEMIHOSTING_H__ */
+#endif /* SEMIHOSTING_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SMCCC_H__
-#define __SMCCC_H__
+#ifndef SMCCC_H
+#define SMCCC_H
#include <utils_def.h>
(_uuid).node[4], (_uuid).node[5]))
#endif /*__ASSEMBLY__*/
-#endif /* __SMCCC_H__ */
+#endif /* SMCCC_H */
#ifndef SMCCC_V1_H
#define SMCCC_V1_H
-#ifndef __SMCCC_H__
+#ifndef SMCCC_H
#error "This file must only be included from smccc.h"
#endif
#ifndef SMCCC_V2_H
#define SMCCC_V2_H
-#ifndef __SMCCC_H__
+#ifndef SMCCC_H
#error "This file must only be included from smccc.h"
#endif
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __UTILS_H__
-#define __UTILS_H__
+#ifndef UTILS_H
+#define UTILS_H
/*
* C code should be put in this part of the header to avoid breaking ASM files
#endif /* !(defined(__LINKER__) || defined(__ASSEMBLY__)) */
-#endif /* __UTILS_H__ */
+#endif /* UTILS_H */
#define XN_SHIFT 54
#define UXN_SHIFT XN_SHIFT
-#endif /* __XLAT_TABLES_DEFS_H__ */
+#endif /* XLAT_TABLES_DEFS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __TF_GUNZIP_H__
-#define __TF_GUNZIP_H__
+#ifndef TF_GUNZIP_H
+#define TF_GUNZIP_H
#include <stddef.h>
#include <stdint.h>
int gunzip(uintptr_t *in_buf, size_t in_len, uintptr_t *out_buf,
size_t out_len, uintptr_t work_buf, size_t work_len);
-#endif /* __TF_GUNZIP_H___ */
+#endif /* TF_GUNZIP_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __BOARD_CSS_DEF_H__
-#define __BOARD_CSS_DEF_H__
+#ifndef BOARD_CSS_DEF_H
+#define BOARD_CSS_DEF_H
#include <common_def.h>
#include <soc_css_def.h>
#define PLAT_ARM_TSP_UART_BASE V2M_IOFPGA_UART0_BASE
#define PLAT_ARM_TSP_UART_CLK_IN_HZ V2M_IOFPGA_UART0_CLK_IN_HZ
-#endif /* __BOARD_CSS_DEF_H__ */
-
+#endif /* BOARD_CSS_DEF_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __ARM_MACROS_S__
-#define __ARM_MACROS_S__
+#ifndef ARM_MACROS_S
+#define ARM_MACROS_S
#include <gic_common.h>
#include <gicv2.h>
exit_print_gic_regs:
.endm
-#endif /* __ARM_MACROS_S__ */
+#endif /* ARM_MACROS_S */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CCI_MACROS_S__
-#define __CCI_MACROS_S__
+#ifndef CCI_MACROS_S
+#define CCI_MACROS_S
#include <cci.h>
#include <platform_def.h>
bl str_in_crash_buf_print
.endm
-#endif /* __CCI_MACROS_S__ */
+#endif /* CCI_MACROS_S */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __ARM_CONFIG_H__
-#define __ARM_CONFIG_H__
+#ifndef ARM_CONFIG_H
+#define ARM_CONFIG_H
#include <stdint.h>
#include <utils_def.h>
}
-#endif /* __ARM_CONFIG_H__ */
+#endif /* ARM_CONFIG_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __ARM_SPM_DEF_H__
-#define __ARM_SPM_DEF_H__
+#ifndef ARM_SPM_DEF_H
+#define ARM_SPM_DEF_H
#include <arm_def.h>
#include <utils_def.h>
#define PLAT_SPM_COOKIE_0 ULL(0)
#define PLAT_SPM_COOKIE_1 ULL(0)
-#endif /* __ARM_SPM_DEF_H__ */
+#endif /* ARM_SPM_DEF_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CSS_MACROS_S__
-#define __CSS_MACROS_S__
+#ifndef CSS_MACROS_S
+#define CSS_MACROS_S
#include <arm_macros.S>
#include <platform_def.h>
arm_print_gic_regs
.endm
-
-#endif /* __CSS_MACROS_S__ */
+#endif /* CSS_MACROS_S */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CSS_DEF_H__
-#define __CSS_DEF_H__
+#ifndef CSS_DEF_H
+#define CSS_DEF_H
#include <arm_def.h>
#include <gic_common.h>
#define CSS_CPU_PWR_STATE_OFF 0
#define CSS_CPU_PWR_STATE(state, n) (((state) >> (n)) & 1)
-#endif /* __CSS_DEF_H__ */
+#endif /* CSS_DEF_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CSS_PM_H__
-#define __CSS_PM_H__
+#ifndef CSS_PM_H
+#define CSS_PM_H
#include <cdefs.h>
#include <psci.h>
*/
extern const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[];
-#endif /* __CSS_PM_H__ */
+#endif /* CSS_PM_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SOC_CSS_H__
-#define __SOC_CSS_H__
+#ifndef SOC_CSS_H
+#define SOC_CSS_H
/*
* Utility functions for ARM CSS SoCs
soc_css_init_pcie();
}
-
-#endif /* __SOC_CSS_H__ */
+#endif /* SOC_CSS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SOC_CSS_DEF_H__
-#define __SOC_CSS_DEF_H__
+#ifndef SOC_CSS_DEF_H
+#define SOC_CSS_DEF_H
#include <common_def.h>
#include <utils_def.h>
#define PLAT_ARM_SCP_TZC_DRAM1_SIZE ULL(0x00200000)
#endif
-#endif /* __SOC_CSS_DEF_H__ */
+#endif /* SOC_CSS_DEF_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __COMMON_DEF_H__
-#define __COMMON_DEF_H__
+#ifndef COMMON_DEF_H
+#define COMMON_DEF_H
#include <bl_common.h>
#include <platform_def.h>
#define BL2_CODE_END round_up(BL2_ROM_END, PAGE_SIZE)
#endif /* BL2_IN_XIP_MEM */
#endif /* SEPARATE_CODE_AND_RODATA */
-#endif /* __COMMON_DEF_H__ */
+
+#endif /* COMMON_DEF_H */
* https://spdx.org/licenses
*/
-#ifndef __ARMADA_COMMON_H__
-#define __ARMADA_COMMON_H__
+#ifndef ARMADA_COMMON_H
+#define ARMADA_COMMON_H
#include <io_addr_dec.h>
#include <stdint.h>
int marvell_get_io_dec_win_conf(struct dec_win_config **win, uint32_t *size);
-#endif /* __ARMADA_COMMON_H__ */
+#endif /* ARMADA_COMMON_H */
* https://spdx.org/licenses
*/
-#ifndef __BOARD_MARVELL_DEF_H__
-#define __BOARD_MARVELL_DEF_H__
+#ifndef BOARD_MARVELL_DEF_H
+#define BOARD_MARVELL_DEF_H
/*
* Required platform porting definitions common to all ARM
#define PLAT_MARVELL_TRUSTED_SRAM_SIZE 0x80000 /* 512 KB */
-
-#endif /* __BOARD_MARVELL_DEF_H__ */
+#endif /* BOARD_MARVELL_DEF_H */
* https://spdx.org/licenses
*/
-#ifndef __MARVELL_DEF_H__
-#define __MARVELL_DEF_H__
+#ifndef MARVELL_DEF_H
+#define MARVELL_DEF_H
#include <arch.h>
#include <common_def.h>
MARVELL_BL_RAM_SIZE)
-#endif /* __MARVELL_DEF_H__ */
+#endif /* MARVELL_DEF_H */
* https://spdx.org/licenses
*/
-#ifndef __PLAT_MARVELL_H__
-#define __PLAT_MARVELL_H__
+#ifndef PLAT_MARVELL_H
+#define PLAT_MARVELL_H
#include <bl_common.h>
#include <cassert.h>
const mmap_region_t *plat_marvell_get_mmap(void);
-#endif /* __PLAT_MARVELL_H__ */
+#endif /* PLAT_MARVELL_H */
* https://spdx.org/licenses
*/
-#ifndef __ARMADA_COMMON_H__
-#define __ARMADA_COMMON_H__
+#ifndef ARMADA_COMMON_H
+#define ARMADA_COMMON_H
#include <amb_adec.h>
#include <io_win.h>
int marvell_get_ccu_memory_map(int ap_idx, struct addr_map_win **win,
uint32_t *size);
-#endif /* __A8K_COMMON_H__ */
+#endif /* ARMADA_COMMON_H */
* https://spdx.org/licenses
*/
-#ifndef __BOARD_MARVELL_DEF_H__
-#define __BOARD_MARVELL_DEF_H__
+#ifndef BOARD_MARVELL_DEF_H
+#define BOARD_MARVELL_DEF_H
/*
* Required platform porting definitions common to all ARM
#define PLAT_MARVELL_TRUSTED_SRAM_SIZE 0x80000 /* 512 KB */
-#endif /* __BOARD_MARVELL_DEF_H__ */
+#endif /* BOARD_MARVELL_DEF_H */
* https://spdx.org/licenses
*/
-#ifndef __MARVELL_DEF_H__
-#define __MARVELL_DEF_H__
+#ifndef MARVELL_DEF_H
+#define MARVELL_DEF_H
#include <arch.h>
#include <common_def.h>
MARVELL_BL_RAM_SIZE)
-#endif /* __MARVELL_DEF_H__ */
+#endif /* MARVELL_DEF_H */
* https://spdx.org/licenses
*/
-#ifndef __PLAT_MARVELL_H__
-#define __PLAT_MARVELL_H__
+#ifndef PLAT_MARVELL_H
+#define PLAT_MARVELL_H
#include <cassert.h>
#include <cpu_data.h>
int plat_marvell_early_cpu_powerdown(void);
int bl2_plat_handle_scp_bl2(image_info_t *scp_bl2_image_info);
-#endif /* __PLAT_MARVELL_H__ */
+#endif /* PLAT_MARVELL_H */
* https://spdx.org/licenses
*/
-#ifndef __PLAT_PM_TRACE_H
-#define __PLAT_PM_TRACE_H
-
+#ifndef PLAT_PM_TRACE_H
+#define PLAT_PM_TRACE_H
/*
* PM Trace is for Debug purpose only!!!
*/
void pm_trace_add(unsigned int trace, unsigned int core);
-#endif /* __PLAT_PM_TRACE_H */
+#endif /* PLAT_PM_TRACE_H */
* https://spdx.org/licenses
*/
-#ifndef __CCI_MACROS_S__
-#define __CCI_MACROS_S__
+#ifndef CCI_MACROS_S
+#define CCI_MACROS_S
#include <cci.h>
#include <platform_def.h>
bl str_in_crash_buf_print
.endm
-#endif /* __CCI_MACROS_S__ */
+#endif /* CCI_MACROS_S */
* https://spdx.org/licenses
*/
-#ifndef __MARVELL_MACROS_S__
-#define __MARVELL_MACROS_S__
+#ifndef MARVELL_MACROS_S
+#define MARVELL_MACROS_S
#include <cci.h>
#include <gic_common.h>
.endm
-#endif /* __MARVELL_MACROS_S__ */
+#endif /* MARVELL_MACROS_S */
* https://spdx.org/licenses
*/
-#ifndef __MARVELL_PLAT_PRIV_H__
-#define __MARVELL_PLAT_PRIV_H__
+#ifndef MARVELL_PLAT_PRIV_H
+#define MARVELL_PLAT_PRIV_H
#include <utils.h>
void plat_marvell_gic_irq_pcpu_save(void);
void plat_marvell_gic_irq_pcpu_restore(void);
-#endif /* __MARVELL_PLAT_PRIV_H__ */
+#endif /* MARVELL_PLAT_PRIV_H */
* https://spdx.org/licenses
*/
-#ifndef _MARVELL_PM_H_
-#define _MARVELL_PM_H_
+#ifndef MARVELL_PM_H
+#define MARVELL_PM_H
#define MVEBU_MAILBOX_MAGIC_NUM PLAT_MARVELL_MAILBOX_MAGIC_NUM
#define MVEBU_MAILBOX_SUSPEND_STATE 0xb007de7c
/* BLE execution start counter value */
#define MBOX_IDX_START_CNT 4
-#endif /* _MARVELL_PM_H_ */
+#endif /* MARVELL_PM_H */
* https://spdx.org/licenses
*/
-#ifndef _MVEBU_H_
-#define _MVEBU_H_
+#ifndef MVEBU_H
+#define MVEBU_H
/* Use this functions only when printf is allowed */
#define debug_enter() VERBOSE("----> Enter %s\n", __func__)
#define _1GB_ (_1MB_ * 1024ULL)
#define _2GB_ (2 * _1GB_)
-#endif /* MVEBU_H */
+#endif /* MVEBU_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __ARM_ARCH_SVC_H__
-#define __ARM_ARCH_SVC_H__
+#ifndef ARM_ARCH_SVC_H
+#define ARM_ARCH_SVC_H
#define SMCCC_VERSION U(0x80000000)
#define SMCCC_ARCH_FEATURES U(0x80000001)
#define SMCCC_ARCH_NOT_REQUIRED -2
-#endif /* __ARM_ARCH_SVC_H__ */
+#endif /* ARM_ARCH_SVC_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __MM_SVC_H__
-#define __MM_SVC_H__
+#ifndef MM_SVC_H
+#define MM_SVC_H
#include <utils_def.h>
#define MM_COMMUNICATE_AARCH64 U(0xC4000041)
#define MM_COMMUNICATE_AARCH32 U(0x84000041)
-#endif /* __MM_SVC_H__ */
+#endif /* MM_SVC_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SECURE_PARTITION_H__
-#define __SECURE_PARTITION_H__
+#ifndef SECURE_PARTITION_H
+#define SECURE_PARTITION_H
#include <stdint.h>
#include <utils_def.h>
secure_partition_mp_info_t *mp_info;
} secure_partition_boot_info_t;
-#endif /* __SECURE_PARTITION_H__ */
+#endif /* SECURE_PARTITION_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SPM_SVC_H__
-#define __SPM_SVC_H__
+#ifndef SPM_SVC_H
+#define SPM_SVC_H
#include <utils_def.h>
#endif /* __ASSEMBLY__ */
-#endif /* __SPM_SVC_H__ */
+#endif /* SPM_SVC_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __STD_SVC_H__
-#define __STD_SVC_H__
+#ifndef STD_SVC_H
+#define STD_SVC_H
/* SMC function IDs for Standard Service queries */
*/
uintptr_t get_arm_std_svc_args(unsigned int svc_mask);
-#endif /* __STD_SVC_H__ */
+#endif /* STD_SVC_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __FIRMWARE_IMAGE_PACKAGE_H__
-#define __FIRMWARE_IMAGE_PACKAGE_H__
+#ifndef FIRMWARE_IMAGE_PACKAGE_H
+#define FIRMWARE_IMAGE_PACKAGE_H
#include <stdint.h>
#include <uuid.h>
uint64_t flags;
} fip_toc_entry_t;
-#endif /* __FIRMWARE_IMAGE_PACKAGE_H__ */
+#endif /* FIRMWARE_IMAGE_PACKAGE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __TBBR_OID_H__
-#define __TBBR_OID_H__
+#ifndef TBBR_OID_H
+#define TBBR_OID_H
/*
* The following is a list of OID values defined and reserved by ARM, which
/* NonTrustedFirmwareConfigHash - NT_FW_CONFIG */
#define NON_TRUSTED_FW_CONFIG_HASH_OID "1.3.6.1.4.1.4128.2100.1202"
-#endif /* __TBBR_OID_H__ */
+#endif /* TBBR_OID_H */
* All rights reserved.
*/
-#ifndef _SYS_UUID_H_
-#define _SYS_UUID_H_
+#ifndef UUID_H
+#define UUID_H
/* Length of a node address (an IEEE 802 address). */
#define _UUID_NODE_LEN 6
/* XXX namespace pollution? */
typedef struct uuid uuid_t;
-#endif /* _SYS_UUID_H_ */
+#endif /* UUID_H */
*/
/* This driver provides I2C support for Allwinner sunXi SoCs */
-#ifndef SUNXI_I2C_H
-#define SUNXI_I2C_H
+#ifndef MENTOR_I2C_PLAT_H
+#define MENTOR_I2C_PLAT_H
#define CONFIG_SYS_TCLK 24000000
#define CONFIG_SYS_I2C_SPEED 100000
uint32_t soft_reset;
};
-#endif
+#endif /* MENTOR_I2C_PLAT_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_MACROS_S__
-#define __PLAT_MACROS_S__
+#ifndef PLAT_MACROS_S
+#define PLAT_MACROS_S
#include <arm_macros.S>
#include <sunxi_mmap.h>
arm_print_gic_regs
.endm
-#endif /* __PLAT_MACROS_S__ */
+#endif /* PLAT_MACROS_S */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SUNXI_DEF_H__
-#define __SUNXI_DEF_H__
+#ifndef SUNXI_DEF_H
+#define SUNXI_DEF_H
/* Clock configuration */
#define SUNXI_OSC24M_CLK_IN_HZ 24000000
#define SUNXI_SOC_H5 0x1718
#define SUNXI_SOC_H6 0x1728
-#endif /* __SUNXI_DEF_H__ */
+#endif /* SUNXI_DEF_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SUNXI_CPUCFG_H__
-#define __SUNXI_CPUCFG_H__
+#ifndef SUNXI_CPUCFG_H
+#define SUNXI_CPUCFG_H
#include <sunxi_mmap.h>
#define SUNXI_R_CPUCFG_SS_ENTRY_REG (SUNXI_R_CPUCFG_BASE + 0x01a8)
#define SUNXI_R_CPUCFG_HP_FLAG_REG (SUNXI_R_CPUCFG_BASE + 0x01ac)
-#endif /* __SUNXI_CPUCFG_H__ */
+#endif /* SUNXI_CPUCFG_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SUNXI_MMAP_H__
-#define __SUNXI_MMAP_H__
+#ifndef SUNXI_MMAP_H
+#define SUNXI_MMAP_H
/* Memory regions */
#define SUNXI_ROM_BASE 0x00000000
#define SUNXI_R_RSB_BASE 0x01f03400
#define SUNXI_R_PWM_BASE 0x01f03800
-#endif /* __SUNXI_MMAP_H__ */
+#endif /* SUNXI_MMAP_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SUNXI_CPUCFG_H__
-#define __SUNXI_CPUCFG_H__
+#ifndef SUNXI_CPUCFG_H
+#define SUNXI_CPUCFG_H
#include <sunxi_mmap.h>
#define SUNXI_CPU_POWER_CLAMP_REG(c, n) (SUNXI_R_CPUCFG_BASE + 0x0050 + \
(c) * 0x10 + (n) * 4)
-#endif /* __SUNXI_CPUCFG_H__ */
+#endif /* SUNXI_CPUCFG_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SUNXI_MMAP_H__
-#define __SUNXI_MMAP_H__
+#ifndef SUNXI_MMAP_H
+#define SUNXI_MMAP_H
/* Memory regions */
#define SUNXI_ROM_BASE 0x00000000
#define SUNXI_R_UART_BASE 0x07080000
#define SUNXI_R_PIO_BASE 0x07022000
-#endif /* __SUNXI_MMAP_H__ */
+#endif /* SUNXI_MMAP_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __FVP_PRIVATE_H__
-#define __FVP_PRIVATE_H__
+#ifndef FVP_PRIVATE_H
+#define FVP_PRIVATE_H
#include <plat_arm.h>
void tsp_early_platform_setup(void);
-#endif /* __FVP_PRIVATE_H__ */
+#endif /* FVP_PRIVATE_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_LD_S__
-#define __PLAT_LD_S__
+#ifndef PLAT_LD_S
+#define PLAT_LD_S
#include <arm_tzc_dram.ld.S>
#include <arm_reclaim_init.ld.S>
-#endif /* __PLAT_LD_S__ */
+#endif /* PLAT_LD_S */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_MACROS_S__
-#define __PLAT_MACROS_S__
+#ifndef PLAT_MACROS_S
+#define PLAT_MACROS_S
#include <arm_macros.S>
#include <v2m_def.h>
arm_print_gic_regs
.endm
-#endif /* __PLAT_MACROS_S__ */
+#endif /* PLAT_MACROS_S */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_MACROS_S__
-#define __PLAT_MACROS_S__
+#ifndef PLAT_MACROS_S
+#define PLAT_MACROS_S
#include <cci_macros.S>
#include <css_macros.S>
print_cci_regs
.endm
-#endif /* __PLAT_MACROS_S__ */
+#endif /* PLAT_MACROS_S */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __JUNO_DECL_H__
-#define __JUNO_DECL_H__
+#ifndef JUNO_DECL_H
+#define JUNO_DECL_H
int juno_getentropy(void *buf, size_t len);
-#endif /* __JUNO_DECL_H__ */
+#endif /* JUNO_DECL_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __JUNO_TZMP1_DEF_H__
-#define __JUNO_TZMP1_DEF_H__
+#ifndef JUNO_TZMP1_DEF_H
+#define JUNO_TZMP1_DEF_H
#include <plat_arm.h>
/* config to PROTCTRL register */
#define V550_PROTCTRL_CONFIG 0xa8700000
-#endif /* __JUNO_TZMP1_DEF_H__ */
+#endif /* JUNO_TZMP1_DEF_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_MACROS_S__
-#define __PLAT_MACROS_S__
+#ifndef PLAT_MACROS_S
+#define PLAT_MACROS_S
#include <css_macros.S>
*/
.macro plat_crash_print_regs
.endm
-#endif /* __PLAT_MACROS_S__ */
+
+#endif /* PLAT_MACROS_S */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLATFORM_DEF_H__
-#define __PLATFORM_DEF_H__
+#ifndef PLATFORM_DEF_H
+#define PLATFORM_DEF_H
#include <arm_def.h>
#include <board_css_def.h>
/* Platform ID address */
#define SSC_VERSION (SSC_REG_BASE + SSC_VERSION_OFFSET)
-#endif /* __PLATFORM_DEF_H__ */
+
+#endif /* PLATFORM_DEF_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLATFORM_DEF_H__
-#define __PLATFORM_DEF_H__
+#ifndef PLATFORM_DEF_H
+#define PLATFORM_DEF_H
#include <sgm_base_platform_def.h>
#define PLAT_MAX_CPUS_PER_CLUSTER 8
#define PLAT_MAX_PE_PER_CPU 1
-#endif /* __PLATFORM_DEF_H__ */
+#endif /* PLATFORM_DEF_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CSS_MHU_H__
-#define __CSS_MHU_H__
+#ifndef CSS_MHU_H
+#define CSS_MHU_H
#include <stdint.h>
void mhu_secure_init(void);
-#endif /* __CSS_MHU_H__ */
+#endif /* CSS_MHU_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CSS_SCMI_H__
-#define __CSS_SCMI_H__
+#ifndef SCMI_H
+#define SCMI_H
#include <bakery_lock.h>
#include <stddef.h>
/* API to get the platform specific SCMI channel information. */
scmi_channel_plat_info_t *plat_css_get_scmi_info();
-#endif /* __CSS_SCMI_H__ */
+#endif /* SCMI_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CSS_SCMI_PRIVATE_H__
-#define __CSS_SCMI_PRIVATE_H__
+#ifndef SCMI_PRIVATE_H
+#define SCMI_PRIVATE_H
/*
* SCMI power domain management protocol message and response lengths. It is
assert(ch->info && ch->info->scmi_mbx_mem);
}
-#endif /* __CSS_SCMI_PRIVATE_H__ */
+#endif /* SCMI_PRIVATE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CSS_SCP_H__
-#define __CSS_SCP_H__
+#ifndef CSS_SCP_H
+#define CSS_SCP_H
#include <cassert.h>
#include <platform_def.h>
CASSERT(SCP_BL2U_BASE >= ARM_TB_FW_CONFIG_LIMIT, assert_scp_bl2u_overflow);
#endif
-#endif /* __CSS_SCP_H__ */
+#endif /* CSS_SCP_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CSS_SCPI_H__
-#define __CSS_SCPI_H__
+#ifndef CSS_SCPI_H
+#define CSS_SCPI_H
#include <stddef.h>
#include <stdint.h>
unsigned int *cluster_state_p);
uint32_t scpi_sys_power_state(scpi_system_state_t system_state);
-
-#endif /* __CSS_SCPI_H__ */
+#endif /* CSS_SCPI_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SDS_H__
-#define __SDS_H__
+#ifndef SDS_H
+#define SDS_H
/* SDS Structure Identifier defines */
/* AP CPU INFO defines */
int sds_struct_write(uint32_t structure_id, unsigned int fld_off, void *data,
size_t size, sds_access_mode_t mode);
#endif /*__ASSEMBLY__ */
-#endif /* __SDS_H__ */
+
+#endif /* SDS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SDS_PRIVATE_H__
-#define __SDS_PRIVATE_H__
+#ifndef SDS_PRIVATE_H
+#define SDS_PRIVATE_H
/* SDS Header defines */
#define SDS_HEADER_ID_SHIFT 0
#define GET_SDS_REGION_SIZE(region) ((((region_desc_t *)(region))->reg[1]))
#endif /* __ASSEMBLY__ */
-#endif /* __SDS_PRIVATE_H__ */
+
+#endif /* SDS_PRIVATE_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_MACROS_S__
-#define __PLAT_MACROS_S__
+#ifndef PLAT_MACROS_S
+#define PLAT_MACROS_S
#include <css_macros.S>
*/
.macro plat_crash_print_regs
.endm
-#endif /* __PLAT_MACROS_S__ */
+
+#endif /* PLAT_MACROS_S */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SGI_RAS__
-#define __SGI_RAS__
+#ifndef SGI_RAS_H
+#define SGI_RAS_H
/*
* Mapping the RAS interrupt with SDEI event number and the event
int sgi_ras_intr_handler_setup(void);
-#endif /* __SGI_RAS__ */
+#endif /* SGI_RAS_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_MACROS_S__
-#define __PLAT_MACROS_S__
+#ifndef PLAT_MACROS_S
+#define PLAT_MACROS_S
#include <cci_macros.S>
#include <css_macros.S>
print_cci_regs
.endm
-#endif /* __PLAT_MACROS_S__ */
+#endif /* PLAT_MACROS_S */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SGM_BASE_PLATFORM_DEF_H__
-#define __SGM_BASE_PLATFORM_DEF_H__
+#ifndef SGM_BASE_PLATFORM_DEF_H
+#define SGM_BASE_PLATFORM_DEF_H
#include <arm_def.h>
#include <board_css_def.h>
*/
#define PLAT_ARM_MEM_PROT_ADDR (V2M_FLASH0_BASE + \
V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
-#endif /* __SGM_BASE_PLATFORM_DEF_H__ */
+#endif /* SGM_BASE_PLATFORM_DEF_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SGM_PLAT_CONFIG_H__
-#define __SGM_PLAT_CONFIG_H__
+#ifndef SGM_PLAT_CONFIG_H
+#define SGM_PLAT_CONFIG_H
#include <ccn.h>
#include <gicv3.h>
void plat_config_init(void);
css_plat_config_t *get_plat_config(void);
-#endif /* __SGM_PLAT_CONFIG_H__ */
+
+#endif /* SGM_PLAT_CONFIG_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SGM_VARIANT_H__
-#define __SGM_VARIANT_H__
+#ifndef SGM_VARIANT_H
+#define SGM_VARIANT_H
/* SSC_VERSION values for sgm */
#define SGM775_SSC_VER_PART_NUM 0x0790
#define SGM_DMC_SIZE 0x40000
#define SGM775_DMC_COUNT 4
-#endif /* __SGM_VARIANT_H__ */
+#endif /* SGM_VARIANT_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __HIKEY_PRIVATE_H__
-#define __HIKEY_PRIVATE_H__
+#ifndef HIKEY_PRIVATE_H
+#define HIKEY_PRIVATE_H
#include <bl_common.h>
void init_acpu_dvfs(void);
-#endif /* __HIKEY_PRIVATE_H__ */
+#endif /* HIKEY_PRIVATE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __HI6220_H__
-#define __HI6220_H__
+#ifndef HI6220_H
+#define HI6220_H
#include <hi6220_regs_acpu.h>
#include <hi6220_regs_ao.h>
#define GPIO18_BASE 0xF702E000
#define GPIO19_BASE 0xF702F000
-#endif /* __HI6220_H__ */
+#endif /* HI6220_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __HI6220_REGS_ACPU_H__
-#define __HI6220_REGS_ACPU_H__
+#ifndef HI6220_REGS_ACPU_H
+#define HI6220_REGS_ACPU_H
#define ACPU_CTRL_BASE 0xF6504000
(0x1 << ACPU_SC_VD_CTRL_TUNE_EN_INT_SHIFT) | \
(0x1 << ACPU_SC_VD_CTRL_TUNE_EN_DIF_SHIFT))
-#endif /* __HI6220_REGS_ACPU_H__ */
+#endif /* HI6220_REGS_ACPU_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __HI6220_AO_H__
-#define __HI6220_AO_H__
+#ifndef HI6220_REGS_AO_H
+#define HI6220_REGS_AO_H
#define AO_CTRL_BASE 0xF7800000
#define PCLK_TIMER1 (1 << 16)
#define PCLK_TIMER0 (1 << 15)
-#endif /* __HI6220_AO_H__ */
+#endif /* HI6220_REGS_AO_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __HI6220_PERI_H__
-#define __HI6220_PERI_H__
+#ifndef HI6220_REGS_PERI_H
+#define HI6220_REGS_PERI_H
#define PERI_BASE 0xF7030000
#define PERI_RST8_DDRPACK_APB (1 << 14)
#define PERI_RST8_DDRT (1 << 17)
-#endif /* __HI6220_PERI_H__ */
+#endif /* HI6220_REGS_PERI_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __HI6220_PIN_H__
-#define __HI6220_PIN_H__
+#ifndef HI6220_REGS_PIN_H
+#define HI6220_REGS_PIN_H
#define IOMG_BASE 0xF7010000
#define IOCG_PULLDOWN (1 << 1)
#define IOCG_PULLUP (1 << 0)
-#endif /* __HI6220_PIN_H__ */
+#endif /* HI6220_REGS_PIN_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __HI6220_REGS_PMCTRL_H__
-#define __HI6220_REGS_PMCTRL_H__
+#ifndef HI6220_REGS_PMCTRL_H
+#define HI6220_REGS_PMCTRL_H
#define PMCTRL_BASE 0xF7032000
#define SOC_PMCTRL_ACPUSYSPLLCFG_acpu_syspll_clken_stat_START (20)
#define SOC_PMCTRL_ACPUSYSPLLCFG_acpu_syspll_clken_stat_END (20)
-#endif /* __HI6220_REGS_PMCTRL_H__ */
+#endif /* HI6220_REGS_PMCTRL_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __HI6553_H__
-#define __HI6553_H__
+#ifndef HI6553_H
+#define HI6553_H
#include <hi6220.h>
#include <mmio.h>
#define PMU_HI6552_V300 0x30
#define PMU_HI6552_V310 0x31
-#endif /* __HI6553_H__ */
+#endif /* HI6553_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __HIKEY_DEF_H__
-#define __HIKEY_DEF_H__
+#ifndef HIKEY_DEF_H
+#define HIKEY_DEF_H
/* Always assume DDR is 1GB size. */
#define DDR_BASE 0x0
#define IRQ_SEC_SGI_7 15
#define IRQ_SEC_SGI_8 16
-#endif /* __HIKEY_DEF_H__ */
+#endif /* HIKEY_DEF_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __HIKEY_LAYOUT_H
-#define __HIKEY_LAYOUT_H
+#ifndef HIKEY_LAYOUT_H
+#define HIKEY_LAYOUT_H
/*
* Platform memory map related constants
#endif /* SPD_none */
#endif
-#endif /* !__HIKEY_LAYOUT_H */
+#endif /* HIKEY_LAYOUT_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __HISI_IPC_H__
-#define __HISI_IPC_H__
+#ifndef HISI_IPC_H
+#define HISI_IPC_H
#define HISI_IPC_CORE_ACPU 0x0
void hisi_ipc_psci_system_off(void);
int hisi_ipc_init(void);
-#endif /* __HISI_IPC_H__ */
+#endif /* HISI_IPC_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __HISI_MCU_H__
-#define __HISI_MCU_H__
+#ifndef HISI_MCU_H
+#define HISI_MCU_H
#include <stdint.h>
extern void hisi_mcu_start_run(void);
extern int hisi_mcu_load_image(uintptr_t image_base, uint32_t image_size);
-#endif /* __HISI_MCU_H__ */
+#endif /* HISI_MCU_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __HISI_PWRC_H__
-#define __HISI_PWRC_H__
+#ifndef HISI_PWRC_H
+#define HISI_PWRC_H
#ifndef __ASSEMBLY__
#endif /*__ASSEMBLY__*/
-#endif /* __HISI_PWRC_H__ */
+#endif /* HISI_PWRC_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __HISI_SIP_SVC_H__
-#define __HISI_SIP_SVC_H__
+#ifndef HISI_SIP_SVC_H
+#define HISI_SIP_SVC_H
/* SMC function IDs for SiP Service queries */
#define HISI_SIP_SVC_VERSION_MAJOR 0x0
#define HISI_SIP_SVC_VERSION_MINOR 0x1
-#endif /* __ARM_SIP_SVC_H__ */
+#endif /* HISI_SIP_SVC_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __HISI_SRAM_MAP_H__
-#define __HISI_SRAM_MAP_H__
+#ifndef HISI_SRAM_MAP_H
+#define HISI_SRAM_MAP_H
/*
* SRAM Memory Region Layout
#define PWRCTRL_AXI_RESERVED_ADDR (ACPU_MASTER_CORE_STATE_ADDR + ACPU_MASTER_CORE_STATE_SIZE)
-#endif /* __HISI_SRAM_MAP_H__ */
+#endif /* HISI_SRAM_MAP_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_MACROS_S__
-#define __PLAT_MACROS_S__
+#ifndef PLAT_MACROS_S
+#define PLAT_MACROS_S
#include <cci.h>
#include <gicv2.h>
bl str_in_crash_buf_print
.endm
-#endif /* __PLAT_MACROS_S__ */
+#endif /* PLAT_MACROS_S */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __HISI_PWRC_H__
-#define __HISI_PWRC_H__
+#ifndef HISI_PWRC_H
+#define HISI_PWRC_H
#include <hi3660.h>
#include <hi3660_crg.h>
void hisi_powerdn_cluster(unsigned int cluster, unsigned int core);
unsigned int hisi_test_cpu_down(unsigned int cluster, unsigned int core);
-#endif /* __HISI_PWRC_H__ */
+#endif /* HISI_PWRC_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __HIKEY960_DEF_H__
-#define __HIKEY960_DEF_H__
+#ifndef HIKEY960_DEF_H
+#define HIKEY960_DEF_H
#include <common_def.h>
#include <tbbr_img_def.h>
#define HIKEY960_UFS_DATA_BASE 0x10000000
#define HIKEY960_UFS_DATA_SIZE 0x0A000000 /* 160MB */
-#endif /* __HIKEY960_DEF_H__ */
+#endif /* HIKEY960_DEF_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __HIKEY960_PRIVATE_H__
-#define __HIKEY960_PRIVATE_H__
+#ifndef HIKEY960_PRIVATE_H
+#define HIKEY960_PRIVATE_H
#include <bl_common.h>
void clr_ex(void);
void nop(void);
-#endif /* __HIKEY960_PRIVATE_H__ */
+#endif /* HIKEY960_PRIVATE_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __HI3660_H__
-#define __HI3660_H__
+#ifndef HI3660_H
+#define HI3660_H
#include <hi3660_crg.h>
#include <hi3660_hkadc.h>
/* GPIO219: PD interrupt. pull up */
#define IOCG_AO_043_REG (IOCG_AO_REG_BASE + 0x030)
-#endif /* __HI3660_H__ */
+#endif /* HI3660_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __HI3660_CRG_H__
-#define __HI3660_CRG_H__
+#ifndef HI3660_CRG_H
+#define HI3660_CRG_H
#define CRG_REG_BASE 0xFFF35000
#define SC_DIV_AO_HISE_MASK 3
#define SC_DIV_AO_HISE(x) ((x) & 0x3)
-#endif /* __HI3660_CRG_H__ */
+#endif /* HI3660_CRG_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __HI3660_HKADC_H__
-#define __HI3660_HKADC_H__
+#ifndef HI3660_HKADC_H
+#define HI3660_HKADC_H
#define HKADC_SSI_REG_BASE 0xE82B8000
#define START_DELAY_TIMEOUT 2000
#define HKADC_WR_NUM_VALUE 4
-#endif /* __HI3660_HKADC_H__ */
+#endif /* HI3660_HKADC_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __HI3660_MEM_MAP__
-#define __HI3660_MEM_MAP__
+#ifndef HI3660_MEM_MAP_H
+#define HI3660_MEM_MAP_H
#define HISI_DATA_HEAD_BASE (0x89C44400)
#define HISI_DATA1_BASE (0x89C93480)
#define HISI_DATA1_SIZE (0x00002D00)
-#endif /* __HI3660_MEM_MAP__ */
+#endif /* HI3660_MEM_MAP_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __HISI_IPC_H__
-#define __HISI_IPC_H__
+#ifndef HISI_IPC_H
+#define HISI_IPC_H
enum pm_mode {
PM_ON = 0,
unsigned int cmd_id);
int hisi_ipc_init(void);
-#endif /* __HISI_IPC_H__ */
+#endif /* HISI_IPC_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_MACROS_S__
-#define __PLAT_MACROS_S__
+#ifndef PLAT_MACROS_S
+#define PLAT_MACROS_S
#include <cci.h>
#include <gicv2.h>
bl str_in_crash_buf_print
.endm
-#endif /* __PLAT_MACROS_S__ */
+#endif /* PLAT_MACROS_S */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __HI3798cv200_H__
-#define __HI3798cv200_H__
+#ifndef HI3798CV200_H
+#define HI3798CV200_H
#include <utils_def.h>
#define HISI_TZPC_BASE (0xF8A80000)
#define HISI_TZPC_SEC_ATTR_CTRL (HISI_TZPC_BASE + 0x10)
-#endif /* __HI3798cv200_H__ */
+#endif /* HI3798CV200_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_PRIVATE_H__
-#define __PLAT_PRIVATE_H__
+#ifndef PLAT_PRIVATE_H
+#define PLAT_PRIVATE_H
#include <bl_common.h>
#include "hi3798cv200.h"
void poplar_gic_cpuif_enable(void);
void poplar_gic_pcpu_init(void);
-#endif /* __PLAT_PRIVATE_H__ */
+#endif /* PLAT_PRIVATE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __POPLAR_LAYOUT_H
-#define __POPLAR_LAYOUT_H
+#ifndef POPLAR_LAYOUT_H
+#define POPLAR_LAYOUT_H
/*
* Boot memory layout definitions for the HiSilicon Poplar board
#define BL31_BASE (LLOADER_TEXT_BASE + BL31_OFFSET)
#define BL31_LIMIT (BL31_BASE + BL31_SIZE)
-#endif /* !__POPLAR_LAYOUT_H */
+#endif /* POPLAR_LAYOUT_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __IMX8_IOMUX_H__
-#define __IMX8_IOMUX_H__
+#ifndef IMX8_IOMUX_H
+#define IMX8_IOMUX_H
#define PADRING_IFMUX_EN_SHIFT 31
#define PADRING_IFMUX_EN_MASK (1 << PADRING_IFMUX_EN_SHIFT)
#define PADRING_DSE_SHIFT 0
#define PADRING_DSE_MASK (0x7 << PADRING_DSE_SHIFT)
-#endif /* __IMX8_IOMUX_H__ */
+#endif /* IMX8_IOMUX_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __IMX_LPUART_H__
-#define __IMX_LPUART_H__
+#ifndef IMX8_LPUART_H
+#define IMX8_LPUART_H
#include <console.h>
console_lpuart_t *console);
#endif /*__ASSEMBLY__*/
-#endif /* __IMX_LPUART_H__*/
+#endif /* IMX8_LPUART_H */
* Header file used to configure SoC pad list.
*/
-#ifndef SC_PADS_H
-#define SC_PADS_H
+#ifndef IMX8QM_PADS_H
+#define IMX8QM_PADS_H
/* Includes */
#define SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETA 268 /* */
/*@}*/
-#endif /* SC_PADS_H */
+#endif /* IMX8QM_PADS_H */
* Header file used to configure SoC pad list.
*/
-#ifndef SC_PADS_H
-#define SC_PADS_H
+#ifndef IMX8QX_PADS_H
+#define IMX8QX_PADS_H
/* Includes */
#define SC_P_COMP_CTL_GPIO_1V8_3V3_QSPI0B 173 /* */
/*@}*/
-#endif /* SC_PADS_H */
+#endif /* IMX8QX_PADS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __IMX_AIPS_H__
-#define __IMX_AIPS_H__
+#ifndef IMX_AIPS_H
+#define IMX_AIPS_H
#include <stdint.h>
void imx_aips_init(void);
-#endif /* __IMX_AIPS_H__ */
+#endif /* IMX_AIPS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __IMX_CAAM_H__
-#define __IMX_CAAM_H__
+#ifndef IMX_CAAM_H
+#define IMX_CAAM_H
#include <stdint.h>
#include <arch.h>
/* Declare CAAM API */
void imx_caam_init(void);
-#endif /* __IMX_CAAM_H__ */
+#endif /* IMX_CAAM_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __IMX_CLOCK_H__
-#define __IMX_CLOCK_H__
+#ifndef IMX_CLOCK_H
+#define IMX_CLOCK_H
#include <stdint.h>
#include <stdbool.h>
void imx_clock_disable_usb(unsigned int usb_id);
void imx_clock_set_usb_clk_root_bits(uint32_t usb_clk_root_en_bits);
-#endif /* __IMX_CLOCK_H__ */
+#endif /* IMX_CLOCK_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __IMX_CSU_H__
-#define __IMX_CSU_H__
+#ifndef IMX_CSU_H
+#define IMX_CSU_H
#include <arch.h>
CSU_CSL_SUR_S2)
void imx_csu_init(void);
-#endif /* __IMX_CSU_H__ */
+#endif /* IMX_CSU_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __IMX_HAB_H__
-#define __IMX_HAB_H__
+#ifndef IMX_HAB_H
+#define IMX_HAB_H
#include <imx_hab_arch.h>
#include <imx_regs.h>
#define HAB_ROM_VECTOR_TABLE_REPORT_STATUS (HAB_ROM_VECTOR_BASE + 0x24)
#define HAB_ROM_VECTOR_TABLE_FAILSAFE (HAB_ROM_VECTOR_BASE + 0x28)
-#endif /* __IMX_HAB_H__ */
+#endif /* IMX_HAB_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __IMX_IO_MUX_H__
-#define __IMX_IO_MUX_H__
+#ifndef IMX_IO_MUX_H
+#define IMX_IO_MUX_H
#include <stdint.h>
void imx_io_muxc_set_pad_alt_function(uint32_t pad_mux_offset, uint32_t alt_function);
void imx_io_muxc_set_pad_features(uint32_t pad_feature_offset, uint32_t pad_features);
-#endif /* __IMX_IO_MUX_H__ */
+#endif /* IMX_IO_MUX_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __IMX_SNVS_H__
-#define __IMX_SNVS_H__
+#ifndef IMX_SNVS_H
+#define IMX_SNVS_H
#include <stdint.h>
#include <arch.h>
void imx_snvs_init(void);
-#endif /* __IMX_SNVS_H__ */
+#endif /* IMX_SNVS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __IMX_WDOG_H__
-#define __IMX_WDOG_H__
+#ifndef IMX_WDOG_H
+#define IMX_WDOG_H
#include <arch.h>
#include <stdint.h>
/* External facing API */
void imx_wdog_init(void);
-#endif /* __IMX_WDOG_H__ */
+#endif /* IMX_WDOG_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_IMX8_H__
-#define __PLAT_IMX8_H__
+#ifndef PLAT_IMX8_H
+#define PLAT_IMX8_H
#include <gicv3.h>
#include <psci.h>
int imx_validate_power_state(unsigned int power_state,
psci_power_state_t *req_state);
void imx_get_sys_suspend_power_state(psci_power_state_t *req_state);
-#endif /*__PLAT_IMX8_H__ */
+
+#endif /* PLAT_IMX8_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef _SC_SCI_H
-#define _SC_SCI_H
+#ifndef SCI_H
+#define SCI_H
/* Defines */
#include <sci/svc/pm/sci_pm_api.h>
#include <sci/svc/rm/sci_rm_api.h>
-#endif /* _SC_SCI_H */
+#endif /* SCI_H */
* Header file for the IPC implementation.
*/
-#ifndef SC_IPC_H
-#define SC_IPC_H
+#ifndef SCI_IPC_H
+#define SCI_IPC_H
/* Includes */
sc_ipc_t ipc_handle;
-#endif /* SC_IPC_H */
+#endif /* SCI_IPC_H */
* Header file for the RPC implementation.
*/
-#ifndef SC_RPC_H
-#define SC_RPC_H
+#ifndef SCI_RPC_H
+#define SCI_RPC_H
/* Includes */
*/
void sc_rpc_xlate(sc_ipc_t ipc, sc_rpc_msg_t *msg);
-#endif /* SC_RPC_H */
+#endif /* SCI_RPC_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef _SC_SCFW_H
-#define _SC_SCFW_H
+#ifndef SCI_SCFW_H
+#define SCI_SCFW_H
/* Includes */
typedef uint64_t sc_ipc_id_t;
-#endif /* _SC_SCFW_H */
-
+#endif /* SCI_SCFW_H */
* Header file containing types used across multiple service APIs.
*/
-#ifndef SC_TYPES_H
-#define SC_TYPES_H
+#ifndef SCI_TYPES_H
+#define SCI_TYPES_H
/* Includes */
typedef __UINT64_TYPE__ uint64_t;
#endif
-#endif /* SC_TYPES_H */
+#endif /* SCI_TYPES_H */
* @{
*/
-#ifndef SC_PAD_API_H
-#define SC_PAD_API_H
+#ifndef SCI_PAD_API_H
+#define SCI_PAD_API_H
/* Includes */
/* @} */
-#endif /* SC_PAD_API_H */
+#endif /* SCI_PAD_API_H */
/**@}*/
* @{
*/
-#ifndef SC_PM_API_H
-#define SC_PM_API_H
+#ifndef SCI_PM_API_H
+#define SCI_PM_API_H
/* Includes */
/* @} */
-#endif /* SC_PM_API_H */
+#endif /* SCI_PM_API_H */
/**@}*/
* @{
*/
-#ifndef SC_RM_API_H
-#define SC_RM_API_H
+#ifndef SCI_RM_API_H
+#define SCI_RM_API_H
/* Includes */
/* @} */
-#endif /* SC_RM_API_H */
+#endif /* SCI_RM_API_H */
/**@}*/
* @{
*/
-#ifndef SC_PAD_RPC_H
-#define SC_PAD_RPC_H
+#ifndef SCI_PAD_RPC_H
+#define SCI_PAD_RPC_H
/* Includes */
*/
void pad_xlate(sc_ipc_t ipc, sc_rpc_msg_t *msg);
-#endif /* SC_PAD_RPC_H */
+#endif /* SCI_PAD_RPC_H */
/**@}*/
* @{
*/
-#ifndef SC_PM_RPC_H
-#define SC_PM_RPC_H
+#ifndef SCI_PM_RPC_H
+#define SCI_PM_RPC_H
/* Includes */
*/
void pm_xlate(sc_ipc_t ipc, sc_rpc_msg_t *msg);
-#endif /* SC_PM_RPC_H */
+#endif /* SCI_PM_RPC_H */
/**@}*/
* @{
*/
-#ifndef SC_RM_RPC_H
-#define SC_RM_RPC_H
+#ifndef SCI_RM_RPC_H
+#define SCI_RM_RPC_H
/* Includes */
*/
void rm_xlate(sc_ipc_t ipc, sc_rpc_msg_t *msg);
-#endif /* SC_RM_RPC_H */
+#endif /* SCI_RM_RPC_H */
/**@}*/
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __IMX_HAB_ARCH_H__
-#define __IMX_HAB_ARCH_H__
+#ifndef IMX_HAB_ARCH_H
+#define IMX_HAB_ARCH_H
/* Define the offset the High Assurance Boot callback table is at */
#define HAB_CALLBACK_OFFSET 0x100
-#endif /* __IMX_HAB_ARCH_H__ */
+#endif /* IMX_HAB_ARCH_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __IMX_REGS_H__
-#define __IMX_REGS_H__
+#ifndef IMX_REGS_H
+#define IMX_REGS_H
/* Define the processor memory map */
/* Define the maximum number of WDOG blocks on this SoC */
#define MXC_MAX_WDOG_NUM 0x04
-#endif /* __IMX_REGS_H__ */
+#endif /* IMX_REGS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLATFORM_DEF_H__
-#define __PLATFORM_DEF_H__
+#ifndef PLATFORM_DEF_H
+#define PLATFORM_DEF_H
#include <arch.h>
#include <common_def.h>
*/
#define SYS_COUNTER_FREQ_IN_TICKS 8000000 /* 8 MHz */
-#endif /* __PLATFORM_DEF_H__ */
+#endif /* PLATFORM_DEF_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __WARP7_PRIVATE_H__
-#define __WARP7_PRIVATE_H__
+#ifndef WARP7_PRIVATE_H
+#define WARP7_PRIVATE_H
/*******************************************************************************
* Function and variable prototypes
******************************************************************************/
void plat_warp7_io_setup(void);
-#endif /*__WARP7_PRIVATE_H__ */
+#endif /* WARP7_PRIVATE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __FSL_NS_ACCESS_H_
-#define __FSL_NS_ACCESS_H_
+#ifndef NS_ACCESS_H
+#define NS_ACCESS_H
#include "fsl_csu.h"
{CSU_CSLX_DSCR, CSU_ALL_RW},
};
-#endif
+#endif /* NS_ACCESS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_MACROS_S__
-#define __PLAT_MACROS_S__
+#ifndef PLAT_MACROS_S
+#define PLAT_MACROS_S
/* ---------------------------------------------
* The below required platform porting macro
.macro plat_crash_print_regs
.endm
-#endif /* __PLAT_MACROS_S__ */
+#endif /* PLAT_MACROS_S */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef _SOC_TZASC_H_
-#define _SOC_TZASC_H_
+#ifndef SOC_TZASC_H
+#define SOC_TZASC_H
#include "tzc380.h"
{}
};
-#endif /* _SOC_TZASC_H_ */
+#endif /* SOC_TZASC_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __FSL_CSU_H__
-#define __FSL_CSU_H__
+#ifndef FSL_CSU_H
+#define FSL_CSU_H
enum csu_cslx_access {
CSU_NS_SUP_R = 0x08,
void enable_layerscape_ns_access(void);
-#endif
+#endif /* FSL_CSU_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __LS_16550_H__
-#define __LS_16550_H__
+#ifndef LS_16550_H
+#define LS_16550_H
#include <console.h>
#endif /*__ASSEMBLY__*/
-#endif /* __LS_16550_H__ */
+#endif /* LS_16550_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_LS_H__
-#define __PLAT_LS_H__
+#ifndef PLAT_LS_H
+#define PLAT_LS_H
#include <cpu_data.h>
#include <stdint.h>
/* others */
unsigned int plat_ls_get_cluster_core_count(u_register_t mpidr);
-#endif /* __PLAT_LS_H__ */
+#endif /* PLAT_LS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __LAYERSCAPE_SOC_H__
-#define __LAYERSCAPE_SOC_H__
+#ifndef SOC_H
+#define SOC_H
#include <stdint.h>
void get_gic_offset(uint32_t *gicc_base, uint32_t *gicd_base);
-#endif /* __LAYERSCAPE_SOC_H__ */
+#endif /* SOC_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __TZC380_H__
-#define __TZC380_H__
+#ifndef TZC380_H
+#define TZC380_H
struct tzc380_reg {
unsigned int secure;
unsigned int sub_mask;
};
-#endif /* __TZC380_H__ */
+#endif /* TZC380_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLATFORM_TSP_H__
-#define __PLATFORM_TSP_H__
+#ifndef PLATFORM_TSP_H
+#define PLATFORM_TSP_H
/*******************************************************************************
* Mandatory TSP functions (only if platform contains a TSP)
void tsp_plat_arch_setup(void);
void tsp_platform_setup(void);
-#endif /* __PLATFORM_TSP_H__ */
+#endif /* PLATFORM_TSP_H */
* https://spdx.org/licenses
*/
-#ifndef __MVEBU_DEF_H__
-#define __MVEBU_DEF_H__
+#ifndef MVEBU_DEF_H
+#define MVEBU_DEF_H
#include <a3700_plat_def.h>
-#endif /* __MVEBU_DEF_H__ */
+#endif /* MVEBU_DEF_H */
* https://spdx.org/licenses
*/
-#ifndef __A3700_PLAT_DEF_H__
-#define __A3700_PLAT_DEF_H__
+#ifndef A3700_PLAT_DEF_H
+#define A3700_PLAT_DEF_H
#include <marvell_def.h>
*/
#define MVEBU_COMPHY_REG_BASE (MVEBU_REGS_BASE + 0x18300)
-#endif /* __A3700_PLAT_DEF_H__ */
+#endif /* A3700_PLAT_DEF_H */
* https://spdx.org/licenses
*/
-#ifndef __A3700_PM_H__
-#define __A3700_PM_H__
+#ifndef A3700_PM_H
+#define A3700_PM_H
#include <stdint.h>
struct pm_wake_up_src_config *mv_wake_up_src_config_get(void);
-
-#endif /* __A3700_PM_H__ */
+#endif /* A3700_PM_H */
* https://spdx.org/licenses
*/
-#ifndef _DDR_INFO_H_
-#define _DDR_INFO_H_
+#ifndef DDR_INFO_H
+#define DDR_INFO_H
#define DRAM_MAX_IFACE 1
#define DRAM_CH0_MMAP_LOW_OFFSET 0x200
-#endif /* _DDR_INFO_H_ */
+#endif /* DDR_INFO_H */
* https://spdx.org/licenses
*/
-#ifndef _DRAM_WIN_H_
-#define _DRAM_WIN_H_
+#ifndef DRAM_WIN_H
+#define DRAM_WIN_H
#include <bl_common.h>
#include <io_addr_dec.h>
void dram_win_map_build(struct dram_win_map *win_map);
void cpu_wins_init(void);
-#endif /* _DRAM_WIN_H_ */
-
+#endif /* DRAM_WIN_H */
* https://spdx.org/licenses
*/
-#ifndef _IO_ADDR_DEC_H_
-#define _IO_ADDR_DEC_H_
+#ifndef IO_ADDR_DEC_H
+#define IO_ADDR_DEC_H
#include <stdint.h>
struct dec_win_config *io_dec_config,
uint32_t io_unit_num);
-#endif /* _IO_ADDR_DEC_H_ */
-
+#endif /* IO_ADDR_DEC_H */
* https://spdx.org/licenses
*/
-#ifndef __PLAT_MACROS_S__
-#define __PLAT_MACROS_S__
+#ifndef PLAT_MACROS_S
+#define PLAT_MACROS_S
#include <marvell_macros.S>
print_cci_regs
.endm
-#endif /* __PLAT_MACROS_S__ */
+#endif /* PLAT_MACROS_S */
* https://spdx.org/licenses
*/
-#ifndef __PLATFORM_DEF_H__
-#define __PLATFORM_DEF_H__
+#ifndef PLATFORM_DEF_H
+#define PLATFORM_DEF_H
#include <board_marvell_def.h>
#include <mvebu_def.h>
#define BL32_LIMIT TRUSTED_DRAM_SIZE
#endif
-#endif /* __PLATFORM_DEF_H__ */
+#endif /* PLATFORM_DEF_H */
* https://spdx.org/licenses
*/
-#ifndef __MVEBU_DEF_H__
-#define __MVEBU_DEF_H__
+#ifndef MVEBU_DEF_H
+#define MVEBU_DEF_H
#include <a8k_plat_def.h>
#define CP_COUNT 1 /* A70x0 has single CP0 */
-#endif /* __MVEBU_DEF_H__ */
+#endif /* MVEBU_DEF_H */
* https://spdx.org/licenses
*/
-#ifndef __MVEBU_DEF_H__
-#define __MVEBU_DEF_H__
+#ifndef MVEBU_DEF_H
+#define MVEBU_DEF_H
#include <a8k_plat_def.h>
#endif
-#endif /* __MVEBU_DEF_H__ */
+#endif /* MVEBU_DEF_H */
* https://spdx.org/licenses
*/
-#ifndef __PHY_PORTING_LAYER_H
-#define __PHY_PORTING_LAYER_H
+#ifndef PHY_PORTING_LAYER_H
+#define PHY_PORTING_LAYER_H
#define MAX_LANE_NR 6
},
},
};
-#endif /* __PHY_PORTING_LAYER_H */
+#endif /* PHY_PORTING_LAYER_H */
* https://spdx.org/licenses
*/
-#ifndef __MVEBU_DEF_H__
-#define __MVEBU_DEF_H__
+#ifndef MVEBU_DEF_H
+#define MVEBU_DEF_H
#include <a8k_plat_def.h>
#define I2C_SPD_ADDR 0x53 /* Access SPD data */
#define I2C_SPD_P0_ADDR 0x36 /* Select SPD data page 0 */
-#endif /* __MVEBU_DEF_H__ */
+#endif /* MVEBU_DEF_H */
* https://spdx.org/licenses
*/
-#ifndef __MVEBU_DEF_H__
-#define __MVEBU_DEF_H__
+#ifndef MVEBU_DEF_H
+#define MVEBU_DEF_H
#include <a8k_plat_def.h>
#define I2C_SPD_ADDR 0x53 /* Access SPD data */
#define I2C_SPD_P0_ADDR 0x36 /* Select SPD data page 0 */
-#endif /* __MVEBU_DEF_H__ */
+#endif /* MVEBU_DEF_H */
* https://spdx.org/licenses
*/
-#ifndef __A8K_PLAT_DEF_H__
-#define __A8K_PLAT_DEF_H__
+#ifndef A8K_PLAT_DEF_H
+#define A8K_PLAT_DEF_H
#include <marvell_def.h>
};
#endif /* __ASSEMBLER__ */
-#endif /* __A8K_PLAT_DEF_H__ */
+#endif /* A8K_PLAT_DEF_H */
*/
/* This driver provides I2C support for Marvell A8K and compatible SoCs */
-#ifndef A8K_I2C_H
-#define A8K_I2C_H
+#ifndef MENTOR_I2C_PLAT_H
+#define MENTOR_I2C_PLAT_H
#define CONFIG_SYS_TCLK 250000000
#define CONFIG_SYS_I2C_SPEED 100000
uint32_t unstuck;
};
-#endif
+#endif /* MENTOR_I2C_PLAT_H */
* https://spdx.org/licenses
*/
-#ifndef __PLAT_MACROS_S__
-#define __PLAT_MACROS_S__
+#ifndef PLAT_MACROS_S
+#define PLAT_MACROS_S
#include <marvell_macros.S>
.macro plat_crash_print_regs
.endm
-#endif /* __PLAT_MACROS_S__ */
+#endif /* PLAT_MACROS_S */
* https://spdx.org/licenses
*/
-#ifndef __PLATFORM_DEF_H__
-#define __PLATFORM_DEF_H__
+#ifndef PLATFORM_DEF_H
+#define PLATFORM_DEF_H
#include <board_marvell_def.h>
#include <gic_common.h>
#define MVEBU_PMU_IRQ_WA
-#endif /* __PLATFORM_DEF_H__ */
+#endif /* PLATFORM_DEF_H */
* https://spdx.org/licenses
*/
-#ifndef __MSS_PM_IPC_H
-#define __MSS_PM_IPC_H
+#ifndef MSS_PM_IPC_H
+#define MSS_PM_IPC_H
#include <mss_ipc_drv.h>
int mss_pm_ipc_msg_trigger(void);
-#endif /* __MSS_PM_IPC_H */
+#endif /* MSS_PM_IPC_H */
* https://spdx.org/licenses
*/
-#ifndef __PM_IPC_DRV_H
-#define __PM_IPC_DRV_H
+#ifndef MSS_IPC_DRV_H
+#define MSS_IPC_DRV_H
#include <psci.h>
int mv_pm_ipc_msg_tx(unsigned int channel_id, unsigned int msg_id,
unsigned int cluster_power_state);
-#endif /* __PM_IPC_DRV_H */
+#endif /* MSS_IPC_DRV_H */
* https://spdx.org/licenses
*/
-#ifndef __MSS_PM_MEM_H
-#define __MSS_PM_MEM_H
+#ifndef MSS_MEM_H
+#define MSS_MEM_H
/* MSS SRAM Memory base */
#define MSS_SRAM_PM_CONTROL_BASE (MVEBU_REGS_BASE + 0x520000)
unsigned int ctrl_blk_size;
};
-#endif /* __MSS_PM_MEM_H */
+#endif /* MSS_MEM_H */
* https://spdx.org/licenses
*/
-#ifndef __MSS_SCP_BL2_FORMAT_H
-#define __MSS_SCP_BL2_FORMAT_H
+#ifndef MSS_SCP_BL2_FORMAT_H
+#define MSS_SCP_BL2_FORMAT_H
#define MAX_NR_OF_FILES 5
#define FILE_MAGIC 0xddd01ff
*/
} img_header_t;
-#endif /* __MSS_SCP_BL2_FORMAT_H */
+#endif /* MSS_SCP_BL2_FORMAT_H */
* https://spdx.org/licenses
*/
-#ifndef __MSS_SCP_BOOTLOADER_H__
-#define __MSS_SCP_BOOTLOADER_H__
+#ifndef MSS_SCP_BOOTLOADER_H
+#define MSS_SCP_BOOTLOADER_H
int scp_bootloader_transfer(void *image, unsigned int image_size);
uintptr_t bl2_plat_get_cp_mss_regs(int ap_idx, int cp_idx);
void bl2_plat_configure_mss_windows(uintptr_t mss_regs);
int bl2_plat_mss_check_image_ready(void);
-#endif /* __MSS_SCP_BOOTLOADER_H__ */
+#endif /* MSS_SCP_BOOTLOADER_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __OEM_SVC_H__
-#define __OEM_SVC_H__
+#ifndef OEM_SVC_H
+#define OEM_SVC_H
/*******************************************************************************
* Defines for runtime services func ids
#define OEM_SVC_E_NOT_SUPPORTED -1
#define OEM_SVC_E_INVALID_PARAMS -2
-#endif /* __OEM_SVC_H__ */
+#endif /* OEM_SVC_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __UART8250_H__
-#define __UART8250_H__
+#ifndef UART8250_H
+#define UART8250_H
/* UART register */
#define UART_RBR 0x00 /* Receive buffer register */
#define UART_LSR_DR 0x01 /* Data ready */
#define UART_LSR_THRE 0x20 /* Xmit holding register empty */
-#endif /* __UART8250_H__ */
+#endif /* UART8250_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __MTK_PLAT_COMMON_H__
-#define __MTK_PLAT_COMMON_H__
+#ifndef MTK_PLAT_COMMON_H
+#define MTK_PLAT_COMMON_H
#include <bl_common.h>
#include <param_header.h>
uint64_t get_kernel_info_r2(void);
extern struct atf_arg_t gteearg;
-#endif
+#endif /* MTK_PLAT_COMMON_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_SIP_SVC_H__
-#define __PLAT_SIP_SVC_H__
+#ifndef MTK_SIP_SVC_H
+#define MTK_SIP_SVC_H
#include <stdint.h>
*/
uint64_t mt_sip_set_authorized_sreg(uint32_t sreg, uint32_t val);
-#endif /* __PLAT_SIP_SVC_H__ */
+#endif /* MTK_SIP_SVC_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __MT_CPUXGPT_H__
-#define __MT_CPUXGPT_H__
+#ifndef MT_CPUXGPT_H
+#define MT_CPUXGPT_H
/* REG */
#define INDEX_CTL_REG 0x000
void sched_clock_init(uint64_t normal_base, uint64_t atf_base);
uint64_t sched_clock(void);
-#endif /* __MT_CPUXGPT_H__ */
+#endif /* MT_CPUXGPT_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __MCUCFG_H__
-#define __MCUCFG_H__
+#ifndef MCUCFG_H
+#define MCUCFG_H
#include <platform_def.h>
#include <stdint.h>
MP1_L2RSTDISABLE = 1 << MP1_L2RSTDISABLE_SHIFT
};
-#endif /* __MCUCFG_H__ */
+#endif /* MCUCFG_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_PRIVATE_H__
-#define __PLAT_PRIVATE_H__
+#ifndef PLAT_PRIVATE_H
+#define PLAT_PRIVATE_H
+
#include <stdint.h>
#include <xlat_tables.h>
void plat_mt_gic_cpuif_disable(void);
void plat_mt_gic_pcpu_init(void);
-#endif /* __PLAT_PRIVATE_H__ */
+#endif /* PLAT_PRIVATE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_SIP_CALLS_H__
-#define __PLAT_SIP_CALLS_H__
+#ifndef PLAT_SIP_CALLS_H
+#define PLAT_SIP_CALLS_H
/*******************************************************************************
* Plat SiP function constants
******************************************************************************/
#define MTK_PLAT_SIP_NUM_CALLS 0
-#endif /* __PLAT_SIP_CALLS_H__ */
+#endif /* PLAT_SIP_CALLS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __POWER_TRACER_H__
-#define __POWER_TRACER_H__
+#ifndef POWER_TRACER_H
+#define POWER_TRACER_H
#define CPU_UP 0
#define CPU_DOWN 1
void trace_power_flow(unsigned long mpidr, unsigned char mode);
-#endif
+#endif /* POWER_TRACER_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SCU_H__
-#define __SCU_H__
+#ifndef SCU_H
+#define SCU_H
void disable_scu(unsigned long mpidr);
void enable_scu(unsigned long mpidr);
-#endif
+#endif /* SCU_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SPM_H__
-#define __SPM_H__
+#ifndef SPM_H
+#define SPM_H
#define SPM_POWERON_CONFIG_SET (SPM_BASE + 0x000)
#define SPM_POWER_ON_VAL0 (SPM_BASE + 0x010)
#define WAKE_SRC_ALL_MD32 (1 << 28)
#define WAKE_SRC_CPU_IRQ (1 << 29)
-#endif /* __SPM_H__ */
+#endif /* SPM_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CRYPT_H__
-#define __CRYPT_H__
+#ifndef CRYPT_H
+#define CRYPT_H
#include <stdint.h>
uint64_t crypt_set_hdcp_key_num(uint32_t num);
uint64_t crypt_clear_hdcp_key(void);
-#endif /* __CRYPT_H__ */
+#endif /* CRYPT_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __MTCMOS_H__
-#define __MTCMOS_H__
+#ifndef MTCMOS_H
+#define MTCMOS_H
/*
* This function will turn off all the little core's power except cpu 0. The
void mtcmos_little_cpu_off(void);
uint32_t mtcmos_non_cpu_ctrl(uint32_t on, uint32_t mtcmos_num);
-#endif /* __MTCMOS_H__ */
+#endif /* MTCMOS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PMIC_WRAP_INIT_H__
-#define __PMIC_WRAP_INIT_H__
+#ifndef PMIC_WRAP_INIT_H
+#define PMIC_WRAP_INIT_H
/* external API */
int32_t pwrap_read(uint32_t adr, uint32_t *rdata);
E_PWR_SWITCH_DIO = 32
};
-#endif /* __PMIC_WRAP_INIT_H__ */
+#endif /* PMIC_WRAP_INIT_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_DRIVER_RTC_H__
-#define __PLAT_DRIVER_RTC_H__
+#ifndef RTC_H
+#define RTC_H
/* RTC registers */
enum {
void rtc_bbpu_power_down(void);
-#endif /* __PLAT_DRIVER_RTC_H__ */
+#endif /* RTC_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SPM_H__
-#define __SPM_H__
+#ifndef SPM_H
+#define SPM_H
#define SPM_POWERON_CONFIG_SET (SPM_BASE + 0x000)
#define SPM_POWER_ON_VAL0 (SPM_BASE + 0x010)
void spm_lock_release(void);
void spm_boot_init(void);
-#endif /* __SPM_H__ */
+#endif /* SPM_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SPM_HOTPLUG_H__
-#define __SPM_HOTPLUG_H__
+#ifndef SPM_HOTPLUG_H
+#define SPM_HOTPLUG_H
void spm_clear_hotplug(void);
void spm_hotplug_off(unsigned long mpidr);
void spm_hotplug_on(unsigned long mpidr);
-#endif /* __SPM_HOTPLUG_H__ */
+#endif /* SPM_HOTPLUG_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SPM_MCDI_H__
-#define __SPM_MCDI_H__
+#ifndef SPM_MCDI_H
+#define SPM_MCDI_H
void spm_mcdi_wakeup_all_cores(void);
void spm_mcdi_prepare_for_mtcmos(void);
void spm_mcdi_prepare_for_off_state(unsigned long mpidr, unsigned int afflvl);
void spm_mcdi_finish_for_on_state(unsigned long mpidr, unsigned int afflvl);
-#endif /* __SPM_MCDI_H__ */
+#endif /* SPM_MCDI_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SPM_SUSPEND_H__
-#define __SPM_SUSPEND_H__
+#ifndef SPM_SUSPEND_H
+#define SPM_SUSPEND_H
/* cpu dormant return code */
#define CPU_DORMANT_RESET 0
void spm_system_suspend(void);
void spm_system_suspend_finish(void);
-#endif /* __SPM_SUSPEND_H__*/
+#endif /* SPM_SUSPEND_H*/
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __MT_CPUXGPT_H__
-#define __MT_CPUXGPT_H__
+#ifndef MT_CPUXGPT_H
+#define MT_CPUXGPT_H
/* REG */
#define INDEX_CNT_L_INIT 0x008
void generic_timer_backup(void);
-#endif /* __MT_CPUXGPT_H__ */
+#endif /* MT_CPUXGPT_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __MCUCFG_H__
-#define __MCUCFG_H__
+#ifndef MCUCFG_H
+#define MCUCFG_H
#include <mt8173_def.h>
#include <stdint.h>
ACLK_EMI_DYNAMIC_CG_EN | ACLK_INFRA_DYNAMIC_CG_EN,
};
-#endif /* __MCUCFG_H__ */
+#endif /* MCUCFG_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __MT8173_DEF_H__
-#define __MT8173_DEF_H__
+#ifndef MT8173_DEF_H
+#define MT8173_DEF_H
#if RESET_TO_BL31
#error "MT8173 is incompatible with RESET_TO_BL31!"
mtk_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type))
-#endif /* __MT8173_DEF_H__ */
+#endif /* MT8173_DEF_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_PRIVATE_H__
-#define __PLAT_PRIVATE_H__
+#ifndef PLAT_PRIVATE_H
+#define PLAT_PRIVATE_H
/*******************************************************************************
* Function and variable prototypes
/* Declarations for plat_topology.c */
int mt_setup_topology(void);
-#endif /* __PLAT_PRIVATE_H__ */
+#endif /* PLAT_PRIVATE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_SIP_CALLS_H__
-#define __PLAT_SIP_CALLS_H__
+#ifndef PLAT_SIP_CALLS_H
+#define PLAT_SIP_CALLS_H
/*******************************************************************************
* Plat SiP function constants
#define MTK_SIP_CLR_HDCP_KEY 0x82000406
#define MTK_SIP_SET_HDCP_KEY_EX 0x82000407
-#endif /* __PLAT_SIP_CALLS_H__ */
+#endif /* PLAT_SIP_CALLS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __POWER_TRACER_H__
-#define __POWER_TRACER_H__
+#ifndef POWER_TRACER_H
+#define POWER_TRACER_H
#define CPU_UP 0
#define CPU_DOWN 1
void trace_power_flow(unsigned long mpidr, unsigned char mode);
-#endif
+#endif /* POWER_TRACER_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SCU_H__
-#define __SCU_H__
+#ifndef SCU_H
+#define SCU_H
void disable_scu(unsigned long mpidr);
void enable_scu(unsigned long mpidr);
-#endif
+#endif /* SCU_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __FLOWCTRL_H__
-#define __FLOWCTRL_H__
+#ifndef FLOWCTRL_H
+#define FLOWCTRL_H
#include <mmio.h>
#include <tegra_def.h>
void tegra_fc_lock_active_cluster(void);
void tegra_fc_reset_bpmp(void);
-#endif /* __FLOWCTRL_H__ */
+#endif /* FLOWCTRL_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __MCE_H__
-#define __MCE_H__
+#ifndef MCE_H
+#define MCE_H
#include <mmio.h>
#include <tegra_def.h>
void mce_update_cstate_info(const mce_cstate_info_t *cstate);
void mce_verify_firmware_version(void);
-#endif /* __MCE_H__ */
+#endif /* MCE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __MEMCTRL_H__
-#define __MEMCTRL_H__
+#ifndef MEMCTRL_H
+#define MEMCTRL_H
void tegra_memctrl_setup(void);
void tegra_memctrl_restore_settings(void);
void tegra_memctrl_videomem_setup(uint64_t phys_base, uint32_t size_in_bytes);
void tegra_memctrl_disable_ahb_redirection(void);
-#endif /* __MEMCTRL_H__ */
+#endif /* MEMCTRL_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __MEMCTRLV1_H__
-#define __MEMCTRLV1_H__
+#ifndef MEMCTRL_V1_H
+#define MEMCTRL_V1_H
#include <mmio.h>
#include <tegra_def.h>
mmio_write_32(TEGRA_MC_BASE + off, val);
}
-#endif /* __MEMCTRLV1_H__ */
+#endif /* MEMCTRL_V1_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __MEMCTRLV2_H__
-#define __MEMCTRLV2_H__
+#ifndef MEMCTRL_V2_H
+#define MEMCTRL_V2_H
#include <tegra_def.h>
#endif /* __ASSMEBLY__ */
-#endif /* __MEMCTRLV2_H__ */
+#endif /* MEMCTRL_V2_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PMC_H__
-#define __PMC_H__
+#ifndef PMC_H
+#define PMC_H
#include <mmio.h>
#include <tegra_def.h>
void tegra_pmc_cpu_on(int32_t cpu);
__dead2 void tegra_pmc_system_reset(void);
-#endif /* __PMC_H__ */
+#endif /* PMC_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SMMU_H
-#define __SMMU_H
+#ifndef SMMU_H
+#define SMMU_H
#include <memctrl_v2.h>
#include <mmio.h>
void tegra_smmu_save_context(uint64_t smmu_ctx_addr);
smmu_regs_t *plat_get_smmu_ctx(void);
-#endif /*__SMMU_H */
+#endif /* SMMU_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_MACROS_S__
-#define __PLAT_MACROS_S__
+#ifndef PLAT_MACROS_S
+#define PLAT_MACROS_S
#include <tegra_def.h>
1:
.endm
-#endif /* __PLAT_MACROS_S__ */
+#endif /* PLAT_MACROS_S */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLATFORM_DEF_H__
-#define __PLATFORM_DEF_H__
+#ifndef PLATFORM_DEF_H
+#define PLATFORM_DEF_H
#include <arch.h>
#include <common_def.h>
#define CACHE_WRITEBACK_SHIFT 6
#define CACHE_WRITEBACK_GRANULE (U(1) << CACHE_WRITEBACK_SHIFT)
-#endif /* __PLATFORM_DEF_H__ */
+#endif /* PLATFORM_DEF_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __TEGRA_DEF_H__
-#define __TEGRA_DEF_H__
+#ifndef TEGRA_DEF_H
+#define TEGRA_DEF_H
#include <utils_def.h>
#define TEGRA_TZRAM_BASE U(0x7C010000)
#define TEGRA_TZRAM_SIZE U(0x10000)
-#endif /* __TEGRA_DEF_H__ */
+#endif /* TEGRA_DEF_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __TEGRA_DEF_H__
-#define __TEGRA_DEF_H__
+#ifndef TEGRA_DEF_H
+#define TEGRA_DEF_H
#include <utils_def.h>
#define TEGRA_TZRAM_BASE U(0x30000000)
#define TEGRA_TZRAM_SIZE U(0x40000)
-#endif /* __TEGRA_DEF_H__ */
+#endif /* TEGRA_DEF_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __TEGRA_DEF_H__
-#define __TEGRA_DEF_H__
+#ifndef TEGRA_DEF_H
+#define TEGRA_DEF_H
#include <utils_def.h>
#define TEGRA_TZRAM_BASE U(0x7C010000)
#define TEGRA_TZRAM_SIZE U(0x10000)
-#endif /* __TEGRA_DEF_H__ */
+#endif /* TEGRA_DEF_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __TEGRA_PLATFORM_H__
-#define __TEGRA_PLATFORM_H__
+#ifndef TEGRA_PLATFORM_H
+#define TEGRA_PLATFORM_H
#include <cdefs.h>
uint8_t tegra_platform_is_emulation(void);
uint8_t tegra_platform_is_fpga(void);
-#endif /* __TEGRA_PLATFORM_H__ */
+#endif /* TEGRA_PLATFORM_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __TEGRA_PRIVATE_H__
-#define __TEGRA_PRIVATE_H__
+#ifndef TEGRA_PRIVATE_H
+#define TEGRA_PRIVATE_H
#include <arch.h>
#include <platform_def.h>
void tegra_secure_entrypoint(void);
void tegra186_cpu_reset_handler(void);
-#endif /* __TEGRA_PRIVATE_H__ */
+#endif /* TEGRA_PRIVATE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __MCE_PRIVATE_H__
-#define __MCE_PRIVATE_H__
+#ifndef MCE_PRIVATE_H
+#define MCE_PRIVATE_H
#include <mmio.h>
#include <tegra_def.h>
extern void nvg_set_request_data(uint64_t req, uint64_t data);
extern void nvg_set_request(uint64_t req);
extern uint64_t nvg_get_result(void);
-#endif /* __MCE_PRIVATE_H__ */
+#endif /* MCE_PRIVATE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef T18X_TEGRA_ARI_H
-#define T18X_TEGRA_ARI_H
+#ifndef T18X_ARI_H
+#define T18X_ARI_H
/*
* ----------------------------------------------------------------------------
TEGRA_NVG_CHANNEL_LAST_INDEX,
} tegra_nvg_channel_id_t;
-#endif /* T18X_TEGRA_ARI_H */
+#endif /* T18X_ARI_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_MACROS_S__
-#define __PLAT_MACROS_S__
+#ifndef PLAT_MACROS_S
+#define PLAT_MACROS_S
#include <arm_macros.S>
#include <platform_def.h>
arm_print_gic_regs
.endm
-#endif /* __PLAT_MACROS_S__ */
+#endif /* PLAT_MACROS_S */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __QEMU_PRIVATE_H
-#define __QEMU_PRIVATE_H
+#ifndef QEMU_PRIVATE_H
+#define QEMU_PRIVATE_H
#include <stdint.h>
void qemu_console_init(void);
-#endif /*__QEMU_PRIVATE_H*/
+#endif /* QEMU_PRIVATE_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __RCAR_PLAT_LD_S__
-#define __RCAR_PLAT_LD_S__
+#ifndef RCAR_PLAT_LD_S
+#define RCAR_PLAT_LD_S
#include <platform_def.h>
#include <xlat_tables_defs.h>
}
-#endif /* __RCAR_PLAT_LD_S__ */
+#endif /* RCAR_PLAT_LD_S */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef PLATFORM_DEF_H__
-#define PLATFORM_DEF_H__
+#ifndef PLATFORM_DEF_H
+#define PLATFORM_DEF_H
#include <arch.h>
#ifndef __ASSEMBLY__
#define PLAT_PCPU_DATA_SIZE (2)
#endif
-#endif
+#endif /* PLATFORM_DEF_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef RCAR_DEF_H__
-#define RCAR_DEF_H__
+#ifndef RCAR_DEF_H
+#define RCAR_DEF_H
#include <tbbr_img_def.h>
#include <utils_def.h>
#define LOSSY_FMT2 LOSSY_FMT_YUV422INTLV
#define LOSSY_ENA_DIS2 LOSSY_DISABLE
-#endif
+#endif /* RCAR_DEF_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef RCAR_PRIVATE_H__
-#define RCAR_PRIVATE_H__
+#ifndef RCAR_PRIVATE_H
+#define RCAR_PRIVATE_H
#include <bakery_lock.h>
#include <bl_common.h>
void mstpcr_write(uint32_t mstpcr, uint32_t mstpsr, uint32_t target_bit);
void cpg_write(uintptr_t regadr, uint32_t regval);
-#endif
+#endif /* RCAR_PRIVATE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef RCAR_VERSION_H__
-#define RCAR_VERSION_H__
+#ifndef RCAR_VERSION_H
+#define RCAR_VERSION_H
#include <arch_helpers.h>
extern const uint8_t version_of_renesas[VERSION_OF_RENESAS_MAXLEN];
-#endif
+#endif /* RCAR_VERSION_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef AXI_REGISTER_H__
-#define AXI_REGISTER_H__
+#ifndef AXI_REGISTERS_H
+#define AXI_REGISTERS_H
/* AXI registers */
/* EDC edc interrupt enable 1 */
#define EDC_EDCINTEN1 (EDC_BASE + 0x0044U)
-#endif
+#endif /* AXI_REGISTERS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef CPG_REGISTER_H__
-#define CPG_REGISTER_H__
+#ifndef CPG_REGISTERS_H
+#define CPG_REGISTERS_H
/* CPG base address */
#define CPG_BASE (0xE6150000U)
/* System Module Stop Control Register 11 */
#define SMSTPCR11 (CPG_BASE + 0x099CU)
-#endif
+#endif /* CPG_REGISTERS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef LIFEC_REGISTER_H__
-#define LIFEC_REGISTER_H__
+#ifndef LIFEC_REGISTERS_H
+#define LIFEC_REGISTERS_H
#define LIFEC_SEC_BASE (0xE6110000U)
#define SAFE_READONLY14 (LIFEC_SAFE_BASE + 0x0210U)
#define SAFE_READONLY15 (LIFEC_SAFE_BASE + 0x0214U)
-#endif
+#endif /* LIFEC_REGISTERS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PARAMETER_H__
-#define __PARAMETER_H__
+#ifndef DDR_PARAMETER_H
+#define DDR_PARAMETER_H
#include <arch_helpers.h>
#include <console.h>
struct param_ddr_usage ddr_region_usage_parse(uint64_t addr, uint64_t max_mb);
-#endif /* __PARAMETER_H__ */
+#endif /* DDR_PARAMETER_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PMU_COM_H__
-#define __PMU_COM_H__
+#ifndef PMU_COM_H
+#define PMU_COM_H
#ifndef CHECK_CPU_WFIE_BASE
#define CHECK_CPU_WFIE_BASE (PMU_BASE + PMU_CORE_PWR_ST)
return 0;
}
-#endif /* __PMU_COM_H__ */
+#endif /* PMU_COM_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __ROCKCHIP_PLAT_MACROS_S__
-#define __ROCKCHIP_PLAT_MACROS_S__
+#ifndef ROCKCHIP_PLAT_MACROS_S
+#define ROCKCHIP_PLAT_MACROS_S
#include <cci.h>
#include <gic_common.h>
#endif
.endm
-#endif /* __ROCKCHIP_PLAT_MACROS_S__ */
+#endif /* ROCKCHIP_PLAT_MACROS_S */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_PARAMS_H__
-#define __PLAT_PARAMS_H__
+#ifndef PLAT_PARAMS_H
+#define PLAT_PARAMS_H
#include <stdint.h>
uint64_t value;
};
-#endif /* __PLAT_PARAMS_H__ */
+#endif /* PLAT_PARAMS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_PRIVATE_H__
-#define __PLAT_PRIVATE_H__
+#ifndef PLAT_PRIVATE_H
+#define PLAT_PRIVATE_H
#ifndef __ASSEMBLY__
#include <mmio.h>
#define PMU_CPU_AUTO_PWRDN 0xf0
#define PMU_CLST_RET 0xa5
-#endif /* __PLAT_PRIVATE_H__ */
+#endif /* PLAT_PRIVATE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __ROCKCHIP_SIP_SVC_H__
-#define __ROCKCHIP_SIP_SVC_H__
+#ifndef ROCKCHIP_SIP_SVC_H
+#define ROCKCHIP_SIP_SVC_H
/* SMC function IDs for SiP Service queries */
#define SIP_SVC_CALL_COUNT 0x8200ff00
RK_SIP_E_INVALID_PARAM = -1
};
-#endif
+#endif /* ROCKCHIP_SIP_SVC_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PMU_H__
-#define __PMU_H__
+#ifndef PMU_H
+#define PMU_H
#include <soc.h>
#define UART_INT_DISABLE 0x00
#define UART_FIFO_RESET 0x07
-#endif /* __PMU_H__ */
+#endif /* PMU_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SOC_H__
-#define __SOC_H__
+#ifndef SOC_H
+#define SOC_H
/******************************* stimer ***************************************/
#define TIMER_LOADE_COUNT0 0x00
#define GPIO2_D2_GPIO_MODE 0x30
#define GRF_GPIO2D_IOMUX 0x34
-#endif /* __SOC_H__ */
+#endif /* SOC_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __ROCKCHIP_PLAT_LD_S__
-#define __ROCKCHIP_PLAT_LD_S__
+#ifndef ROCKCHIP_PLAT_LD_S
+#define ROCKCHIP_PLAT_LD_S
MEMORY {
PMUSRAM (rwx): ORIGIN = PMUSRAM_BASE, LENGTH = PMUSRAM_RSIZE
} >PMUSRAM
}
-#endif /* __ROCKCHIP_PLAT_LD_S__ */
+#endif /* ROCKCHIP_PLAT_LD_S */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_DEF_H__
-#define __PLAT_DEF_H__
+#ifndef RK3328_DEF_H
+#define RK3328_DEF_H
#define MAJOR_VERSION (1)
#define MINOR_VERSION (2)
#define SHARE_MEM_PAGE_NUM 15
#define SHARE_MEM_SIZE SIZE_K(SHARE_MEM_PAGE_NUM * 4)
-#endif /* __PLAT_DEF_H__ */
+#endif /* RK3328_DEF_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __DDR_RK3368_H__
-#define __DDR_RK3368_H__
+#ifndef DDR_RK3368_H
+#define DDR_RK3368_H
#define DDR_PCTL_SCFG 0x0
#define DDR_PCTL_SCTL 0x4
uint32_t *ddr_get_resume_code_base(void);
void ddr_reg_save(uint32_t pllpdstat, uint64_t base_addr);
-#endif
+#endif /* DDR_RK3368_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PMU_H__
-#define __PMU_H__
+#ifndef PMU_H
+#define PMU_H
/* Allocate sp reginon in pmusram */
#define PSRAM_SP_SIZE 0x80
#define MAX_WAIT_CONUT 1000
-#endif /* __PMU_H__ */
+#endif /* PMU_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SOC_H__
-#define __SOC_H__
+#ifndef SOC_H
+#define SOC_H
enum plls_id {
ABPLL_ID = 0,
void soc_sleep_config(void);
void pm_plls_resume(void);
-#endif /* __SOC_H__ */
+#endif /* SOC_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __ROCKCHIP_PLAT_LD_S__
-#define __ROCKCHIP_PLAT_LD_S__
+#ifndef ROCKCHIP_PLAT_LD_S
+#define ROCKCHIP_PLAT_LD_S
MEMORY {
PMUSRAM (rwx): ORIGIN = PMUSRAM_BASE, LENGTH = PMUSRAM_RSIZE
} >PMUSRAM
}
-#endif /* __ROCKCHIP_PLAT_LD_S__ */
+#endif /* ROCKCHIP_PLAT_LD_S */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_SIP_CALLS_H__
-#define __PLAT_SIP_CALLS_H__
+#ifndef PLAT_SIP_CALLS_H
+#define PLAT_SIP_CALLS_H
#define RK_PLAT_SIP_NUM_CALLS 0
-#endif /* __PLAT_SIP_CALLS_H__ */
+#endif /* PLAT_SIP_CALLS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_DEF_H__
-#define __PLAT_DEF_H__
+#ifndef RK3368_DEF_H
+#define RK3368_DEF_H
/* Special value used to verify platform parameters from BL2 to BL3-1 */
#define RK_BL31_PLAT_PARAM_VAL 0x0f1e2d3c4b5a6978ULL
INTR_PROP_DESC(RK_IRQ_SEC_PHY_TIMER, GIC_HIGHEST_SEC_PRIORITY, \
GICV2_INTR_GROUP1, GIC_INTR_CFG_LEVEL)
-#endif /* __PLAT_DEF_H__ */
+#endif /* RK3368_DEF_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SOC_ROCKCHIP_RK3399_DP_H__
-#define __SOC_ROCKCHIP_RK3399_DP_H__
+#ifndef CDN_DP_H
+#define CDN_DP_H
+
#include <plat_private.h>
enum {
uint64_t x4,
uint64_t x5,
uint64_t x6);
-#endif
+
+#endif /* CDN_DP_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SOC_ROCKCHIP_RK3399_DFS_H__
-#define __SOC_ROCKCHIP_RK3399_DFS_H__
+#ifndef DFS_H
+#define DFS_H
#include <stdint.h>
void ddr_prepare_for_sys_suspend(void);
void ddr_prepare_for_sys_resume(void);
-#endif
+#endif /* DFS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SOC_ROCKCHIP_RK3399_DRAM_H__
-#define __SOC_ROCKCHIP_RK3399_DRAM_H__
+#ifndef DRAM_H
+#define DRAM_H
#include <dram_regs.h>
#include <plat_private.h>
void dram_init(void);
-#endif
+#endif /* DRAM_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef _DRAM_SPEC_TIMING_HEAD_
-#define _DRAM_SPEC_TIMING_HEAD_
+#ifndef DRAM_SPEC_TIMING_H
+#define DRAM_SPEC_TIMING_H
+
#include <stdint.h>
enum ddr3_speed_rate {
void dram_get_parameter(struct timing_related_config *timing_config,
struct dram_timing_t *pdram_timing);
-#endif /* _DRAM_SPEC_TIMING_HEAD_ */
+#endif /* DRAM_SPEC_TIMING_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SOC_ROCKCHIP_RK3399_SUSPEND_H__
-#define __SOC_ROCKCHIP_RK3399_SUSPEND_H__
+#ifndef SUSPEND_H
+#define SUSPEND_H
+
#include <dram.h>
#define KHz (1000)
void dmc_suspend(void);
__pmusramfunc void dmc_resume(void);
-#endif /* __DRAM_H__ */
+#endif /* SUSPEND_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __ROCKCHIP_RK3399_M0_INCLUDE_SHARED_ADDRESSMAP_H__
-#define __ROCKCHIP_RK3399_M0_INCLUDE_SHARED_ADDRESSMAP_H__
+#ifndef ADDRESSMAP_H
+#define ADDRESSMAP_H
#include <addressmap_shared.h>
/* Registers base address for M0 */
#define MMIO_BASE 0x40000000
-#endif /* __ROCKCHIP_RK3399_M0_INCLUDE_SHARED_ADDRESSMAP_H__ */
+#endif /* ADDRESSMAP_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __RK3399_MCU_H__
-#define __RK3399_MCU_H__
+#ifndef RK3399_MCU_H
+#define RK3399_MCU_H
#include <addressmap.h>
int stopwatch_expired(void);
void stopwatch_reset(void);
-#endif /* __RK3399_MCU_H__ */
+#endif /* RK3399_MCU_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __M0_CTL_H__
-#define __M0_CTL_H__
+#ifndef M0_CTL_H
+#define M0_CTL_H
#include <m0_param.h>
extern void m0_stop(void);
extern void m0_wait_done(void);
extern void m0_configure_execute_addr(uintptr_t addr);
-#endif /* __M0_CTL_H__ */
+
+#endif /* M0_CTL_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PMU_H__
-#define __PMU_H__
+#ifndef PMU_H
+#define PMU_H
#include <pmu_bits.h>
#include <pmu_regs.h>
extern void sram_func_set_ddrctl_pll(uint32_t pll_src);
-#endif /* __PMU_H__ */
+#endif /* PMU_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PWM_H__
-#define __PWM_H__
+#ifndef PWM_H
+#define PWM_H
void disable_pwms(void);
void enable_pwms(void);
-#endif
+#endif /* PWM_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_ROCKCHIP_RK3399_DRIVER_SECURE_H__
-#define __PLAT_ROCKCHIP_RK3399_DRIVER_SECURE_H__
+#ifndef SECURE_H
+#define SECURE_H
/**************************************************
* sgrf reg, offset
void secure_sgrf_ddr_rgn_init(void);
__pmusramfunc void sram_secure_timer_init(void);
-#endif /* __PLAT_ROCKCHIP_RK3399_DRIVER_SECURE_H__ */
+#endif /* SECURE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SOC_H__
-#define __SOC_H__
+#ifndef SOC_H
+#define SOC_H
#include <utils.h>
void pmu_sgrf_rst_hld(void);
__pmusramfunc void pmu_sgrf_rst_hld_release(void);
__pmusramfunc void restore_pmu_rsthold(void);
-#endif /* __SOC_H__ */
+#endif /* SOC_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __ROCKCHIP_RK3399_INCLUDE_ADDRESSMAP_H__
-#define __ROCKCHIP_RK3399_INCLUDE_ADDRESSMAP_H__
+#ifndef ADDRESSMAP_H
+#define ADDRESSMAP_H
#include <addressmap_shared.h>
#define DEV_RNG0_BASE MMIO_BASE
#define DEV_RNG0_SIZE SIZE_M(125)
-#endif /* __ROCKCHIP_RK3399_INCLUDE_ADDRESSMAP_H__ */
+#endif /* ADDRESSMAP_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __ROCKCHIP_PLAT_LD_S__
-#define __ROCKCHIP_PLAT_LD_S__
+#ifndef ROCKCHIP_PLAT_LD_S
+#define ROCKCHIP_PLAT_LD_S
#include <xlat_tables_defs.h>
} >PMUSRAM
}
-#endif /* __ROCKCHIP_PLAT_LD_S__ */
+#endif /* ROCKCHIP_PLAT_LD_S */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_SIP_CALLS_H__
-#define __PLAT_SIP_CALLS_H__
+#ifndef PLAT_SIP_CALLS_H
+#define PLAT_SIP_CALLS_H
#define RK_PLAT_SIP_NUM_CALLS 0
-#endif /* __PLAT_SIP_CALLS_H__ */
+#endif /* PLAT_SIP_CALLS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __ROCKCHIP_RK3399_INCLUDE_SHARED_ADDRESSMAP_SHARED_H__
-#define __ROCKCHIP_RK3399_INCLUDE_SHARED_ADDRESSMAP_SHARED_H__
+#ifndef ADDRESSMAP_SHARED_H
+#define ADDRESSMAP_SHARED_H
#define SIZE_K(n) ((n) * 1024)
#define SIZE_M(n) ((n) * 1024 * 1024)
#define MSCH_BASE(ch) (SERVICE_NOC_1_BASE + (ch) * 0x8000)
-#endif /* __ROCKCHIP_RK3399_INCLUDE_SHARED_ADDRESSMAP_SHARED_H__ */
+#endif /* ADDRESSMAP_SHARED_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_ROCKCHIP_RK3399_INCLUDE_SHARED_BL31_PARAM_H__
-#define __PLAT_ROCKCHIP_RK3399_INCLUDE_SHARED_BL31_PARAM_H__
+#ifndef BL31_PARAM_H
+#define BL31_PARAM_H
/*******************************************************************************
* Platform memory map related constants
* BL31 specific defines.
******************************************************************************/
/*
- * Put BL3-1 at the top of the Trusted RAM
+ * Put BL31 at the top of the Trusted RAM
*/
#define BL31_BASE (TZRAM_BASE + 0x1000)
#define BL31_LIMIT (TZRAM_BASE + TZRAM_SIZE)
-#endif /*__PLAT_ROCKCHIP_RK3399_INCLUDE_SHARED_BL31_PARAM_H__*/
+#endif /* BL31_PARAM_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __DRAM_REGS_H__
-#define __DRAM_REGS_H__
+#ifndef DRAM_REGS_H
+#define DRAM_REGS_H
#define CTL_REG_NUM 332
#define PHY_REG_NUM 959
#define DDR_STRIDE(n) mmio_write_32(SGRF_BASE + SGRF_SOC_CON3_7(4), \
(0x1f<<(10+16))|((n)<<10))
-#endif /* __DRAM_REGS_H__ */
+#endif /* DRAM_REGS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __M0_PARAM_H__
-#define __M0_PARAM_H__
+#ifndef M0_PARAM_H
+#define M0_PARAM_H
#define PARAM_ADDR 0xc0
#define PARAM_M0_SIZE 0x28
#define M0_DONE_FLAG 0xf59ec39a
-#endif /*__M0_PARAM_H__*/
+#endif /* M0_PARAM_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __ROCKCHIP_RK3399_INCLUDE_SHARED_MISC_REGS_H__
-#define __ROCKCHIP_RK3399_INCLUDE_SHARED_MISC_REGS_H__
+#ifndef MISC_REGS_H
+#define MISC_REGS_H
/* CRU */
#define CRU_DPLL_CON0 0x40
/* PMU CRU */
#define PMU_CRU_GATEDIS_CON0 0x130
-#endif /* __ROCKCHIP_RK3399_INCLUDE_SHARED_MISC_REGS_H__ */
+#endif /* MISC_REGS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PMU_BITS_H__
-#define __PMU_BITS_H__
+#ifndef PMU_BITS_H
+#define PMU_BITS_H
enum pmu_powerdomain_id {
PD_CPUL0 = 0,
STANDBY_BY_WFIL2_CLUSTER_B,
};
-#endif /* __PMU_BITS_H__ */
+#endif /* PMU_BITS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PMU_REGS_H__
-#define __PMU_REGS_H__
+#ifndef PMU_REGS_H
+#define PMU_REGS_H
#define PMU_WKUP_CFG0 0x00
#define PMU_WKUP_CFG1 0x04
#define GRF_GPIO4C_P 0xe068
#define GRF_GPIO4D_P 0xe06C
-#endif /* __PMU_REGS_H__ */
+#endif /* PMU_REGS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_DEF_H__
-#define __PLAT_DEF_H__
+#ifndef RK3399_DEF_H
+#define RK3399_DEF_H
#include <addressmap.h>
INTR_PROP_DESC(ARM_IRQ_SEC_SGI_6, GIC_HIGHEST_SEC_PRIORITY, \
INTR_GROUP0, GIC_INTR_CFG_LEVEL)
-#endif /* __PLAT_DEF_H__ */
+#endif /* RK3399_DEF_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLATFORM_DEF_H__
-#define __PLATFORM_DEF_H__
+#ifndef PLATFORM_DEF_H
+#define PLATFORM_DEF_H
#include <arch.h>
#include <common_def.h>
*/
#define SYS_COUNTER_FREQ_IN_TICKS ULL(19200000)
-#endif /* __PLATFORM_DEF_H__ */
+#endif /* PLATFORM_DEF_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __RPI3_HW__
-#define __RPI3_HW__
+#ifndef RPI3_HW_H
+#define RPI3_HW_H
#include <utils_def.h>
#define RPI3_INTC_PENDING_FIQ_OFFSET ULL(0x00000070)
#define RPI3_INTC_PENDING_FIQ_MBOX3 ULL(0x00000080)
-#endif /* __RPI3_HW__ */
+#endif /* RPI3_HW_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __RPI3_PRIVATE_H__
-#define __RPI3_PRIVATE_H__
+#ifndef RPI3_PRIVATE_H
+#define RPI3_PRIVATE_H
#include <stdint.h>
/* VideoCore firmware commands */
int rpi3_vc_hardware_get_board_revision(uint32_t *revision);
-#endif /*__RPI3_PRIVATE_H__ */
+#endif /* RPI3_PRIVATE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SQ_MHU_H__
-#define __SQ_MHU_H__
+#ifndef SQ_MHU_H
+#define SQ_MHU_H
#include <stdint.h>
void mhu_secure_init(void);
-#endif /* __SQ_MHU_H__ */
+#endif /* SQ_MHU_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SQ_SCPI_H__
-#define __SQ_SCPI_H__
+#ifndef SQ_SCPI_H
+#define SQ_SCPI_H
#include <stddef.h>
#include <stdint.h>
scpi_power_state_t css_state);
uint32_t scpi_sys_power_state(scpi_system_state_t system_state);
-#endif /* __SQ_SCPI_H__ */
+#endif /* SQ_SCPI_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_MACROS_S__
-#define __PLAT_MACROS_S__
+#ifndef PLAT_MACROS_S
+#define PLAT_MACROS_S
/*
* Print CCN registers
*/
.macro plat_crash_print_regs
.endm
-#endif /* __PLAT_MACROS_S__ */
+
+#endif /* PLAT_MACROS_S */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SQ_COMMON_H__
-#define __SQ_COMMON_H__
+#ifndef SQ_COMMON_H
+#define SQ_COMMON_H
#include <stdint.h>
#include <xlat_tables_v2.h>
void sq_mmap_setup(uintptr_t total_base, size_t total_size,
const struct mmap_region *mmap);
-#endif /* __SQ_COMMON_H__ */
+#endif /* SQ_COMMON_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_MACROS_S__
-#define __PLAT_MACROS_S__
+#ifndef PLAT_MACROS_S
+#define PLAT_MACROS_S
.macro plat_crash_print_regs
.endm
-#endif /* __PLAT_MACROS_S__ */
+#endif /* PLAT_MACROS_S */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __UNIPHIER_H__
-#define __UNIPHIER_H__
+#ifndef UNIPHIER_H
+#define UNIPHIER_H
#include <stdint.h>
#include <string.h>
#define UNIPHIER_IMAGE_BUF_SIZE ((UNIPHIER_NS_DRAM_LIMIT) - \
(UNIPHIER_IMAGE_BUF_BASE))
-#endif /* __UNIPHIER_H__ */
+#endif /* UNIPHIER_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __BOOT_API_H
-#define __BOOT_API_H
+#ifndef BOOT_API_H
+#define BOOT_API_H
#include <stdint.h>
#include <stdio.h>
uint8_t binary_type;
} __packed boot_api_image_header_t;
-#endif /* __BOOT_API_H */
+#endif /* BOOT_API_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __STM32MP1_CONTEXT_H__
-#define __STM32MP1_CONTEXT_H__
+#ifndef STM32MP1_CONTEXT_H
+#define STM32MP1_CONTEXT_H
#include <stdint.h>
int stm32_save_boot_interface(uint32_t interface, uint32_t instance);
-#endif /* __STM32MP1_CONTEXT_H__ */
+#endif /* STM32MP1_CONTEXT_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __STM32MP1_DT_H__
-#define __STM32MP1_DT_H__
+#ifndef STM32MP1_DT_H
+#define STM32MP1_DT_H
#include <stdbool.h>
uint32_t dt_get_ddr_size(void);
const char *dt_get_board_model(void);
-#endif /* __STM32MP1_DT_H__ */
+#endif /* STM32MP1_DT_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __STM32MP1_PRIVATE_H__
-#define __STM32MP1_PRIVATE_H__
+#ifndef STM32MP1_PRIVATE_H
+#define STM32MP1_PRIVATE_H
+
+#include <stdint.h>
void stm32mp1_io_setup(void);
void configure_mmu(void);
void stm32mp1_gic_pcpu_init(void);
void stm32mp1_gic_init(void);
-#endif /* __STM32MP1_PRIVATE_H__ */
+#endif /* STM32MP1_PRIVATE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __STM32MP1_LD_S__
-#define __STM32MP1_LD_S__
+#ifndef STM32MP1_LD_S
+#define STM32MP1_LD_S
+
#include <platform_def.h>
#include <xlat_tables_defs.h>
__TF_END__ = .;
}
-#endif /*__STM32MP1_LD_S__*/
+#endif /* STM32MP1_LD_S */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef K3_SEC_PROXY_H
-#define K3_SEC_PROXY_H
+#ifndef SEC_PROXY_H
+#define SEC_PROXY_H
#include <stdint.h>
*/
int k3_sec_proxy_recv(enum k3_sec_proxy_chan_id id, struct k3_sec_proxy_msg *msg);
-#endif /* K3_SEC_PROXY_H */
+#endif /* SEC_PROXY_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __TI_SCI_H
-#define __TI_SCI_H
+#ifndef TI_SCI_H
+#define TI_SCI_H
#include <stdint.h>
#include <stdbool.h>
*/
int ti_sci_init(void);
-#endif /* __TI_SCI_H */
+#endif /* TI_SCI_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __TI_SCI_PROTOCOL_H
-#define __TI_SCI_PROTOCOL_H
+#ifndef TI_SCI_PROTOCOL_H
+#define TI_SCI_PROTOCOL_H
#include <stdint.h>
uint32_t status_flags;
} __packed;
-#endif /* __TI_SCI_PROTOCOL_H */
+#endif /* TI_SCI_PROTOCOL_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __K3_CONSOLE_H__
-#define __K3_CONSOLE_H__
+#ifndef K3_CONSOLE_H
+#define K3_CONSOLE_H
void bl31_console_setup(void);
-#endif /* __K3_CONSOLE_H__ */
+#endif /* K3_CONSOLE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __K3_GICV3_H__
-#define __K3_GICV3_H__
+#ifndef K3_GICV3_H
+#define K3_GICV3_H
+
+#include <stdint.h>
void k3_gic_driver_init(uintptr_t gicd_base, uintptr_t gicr_base);
void k3_gic_init(void);
void k3_gic_cpuif_disable(void);
void k3_gic_pcpu_init(void);
-#endif /* __K3_GICV3_H__ */
+#endif /* K3_GICV3_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_MACROS_S__
-#define __PLAT_MACROS_S__
+#ifndef PLAT_MACROS_S
+#define PLAT_MACROS_S
/* ---------------------------------------------
* The below required platform porting macro
/* STUB */
.endm
-#endif /* __PLAT_MACROS_S__ */
+#endif /* PLAT_MACROS_S */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLATFORM_DEF_H__
-#define __PLATFORM_DEF_H__
+#ifndef PLATFORM_DEF_H
+#define PLATFORM_DEF_H
#include <arch.h>
#include <board_def.h>
#define TI_SCI_HOST_ID 10
#define TI_SCI_MAX_MESSAGE_SIZE 52
-#endif /* __PLATFORM_DEF_H__ */
+#endif /* PLATFORM_DEF_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_MACROS_S__
-#define __PLAT_MACROS_S__
+#ifndef PLAT_MACROS_S
+#define PLAT_MACROS_S
#include <arm_macros.S>
#include <cci_macros.S>
print_cci_regs
.endm
-#endif /* __PLAT_MACROS_S__ */
+#endif /* PLAT_MACROS_S */
/* ZynqMP IPI mailbox doorbell service enums and defines */
-#ifndef _IPI_MAILBOX_SVC_H_
-#define _IPI_MAILBOX_SVC_H_
+#ifndef IPI_MAILBOX_SVC_H
+#define IPI_MAILBOX_SVC_H
#include <stdint.h>
uint64_t x3, uint64_t x4, void *cookie, void *handle,
uint64_t flags);
-#endif /* _IPI_MAILBOX_SVC_H_ */
+#endif /* IPI_MAILBOX_SVC_H */
* ZynqMP system level PM-API functions for clock control.
*/
-#ifndef _PM_API_CLOCK_H_
-#define _PM_API_CLOCK_H_
+#ifndef PM_API_CLOCK_H
+#define PM_API_CLOCK_H
#include <utils_def.h>
#include "pm_common.h"
enum pm_ret_status pm_api_clk_get_pll_frac_data(unsigned int pll,
unsigned int *data);
-#endif /* _PM_API_CLOCK_H_ */
+#endif /* PM_API_CLOCK_H */
* ZynqMP system level PM-API functions for pin control.
*/
-#ifndef _PM_API_IOCTL_H_
-#define _PM_API_IOCTL_H_
+#ifndef PM_API_IOCTL_H
+#define PM_API_IOCTL_H
#include "pm_common.h"
unsigned int arg1,
unsigned int arg2,
unsigned int *value);
-#endif /* _PM_API_IOCTL_H_ */
+#endif /* PM_API_IOCTL_H */
* ZynqMP system level PM-API functions for pin control.
*/
-#ifndef _PM_API_PINCTRL_H_
-#define _PM_API_PINCTRL_H_
+#ifndef PM_API_PINCTRL_H
+#define PM_API_PINCTRL_H
#include "pm_common.h"
enum pm_ret_status pm_api_pinctrl_get_num_functions(unsigned int *nfuncs);
enum pm_ret_status pm_api_pinctrl_get_num_func_groups(unsigned int fid,
unsigned int *ngroups);
-#endif /* _PM_API_PINCTRL_H_ */
+#endif /* PM_API_PINCTRL_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef _PM_API_SYS_H_
-#define _PM_API_SYS_H_
+#ifndef PM_API_SYS_H
+#define PM_API_SYS_H
#include <stdint.h>
#include "pm_defs.h"
uint32_t address_low,
uint32_t *value);
-#endif /* _PM_API_SYS_H_ */
+#endif /* PM_API_SYS_H */
* the execution environment.
*/
-#ifndef _PM_CLIENT_H_
-#define _PM_CLIENT_H_
+#ifndef PM_CLIENT_H
+#define PM_CLIENT_H
#include "pm_common.h"
#include "pm_defs.h"
/* Global variables to be set in pm_client.c */
extern const struct pm_proc *primary_proc;
-#endif /* _PM_CLIENT_H_ */
+#endif /* PM_CLIENT_H */
* for PU Power Management. This file should be common for all PU's.
*/
-#ifndef _PM_COMMON_H_
-#define _PM_COMMON_H_
+#ifndef PM_COMMON_H
+#define PM_COMMON_H
#include <debug.h>
#include <stdint.h>
const struct pm_proc *pm_get_proc(unsigned int cpuid);
const struct pm_proc *pm_get_proc_by_node(enum pm_node_id nid);
-#endif /* _PM_COMMON_H_ */
+#endif /* PM_COMMON_H */
/* ZynqMP power management enums and defines */
-#ifndef _PM_DEFS_H_
-#define _PM_DEFS_H_
+#ifndef PM_DEFS_H
+#define PM_DEFS_H
/*********************************************************************
* Macro definitions
PMF_SHUTDOWN_SUBTYPE_SYSTEM,
};
-#endif /* _PM_DEFS_H_ */
+#endif /* PM_DEFS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef _PM_IPI_H_
-#define _PM_IPI_H_
+#ifndef PM_IPI_H
+#define PM_IPI_H
#include "pm_common.h"
void pm_ipi_irq_enable(const struct pm_proc *proc);
void pm_ipi_irq_clear(const struct pm_proc *proc);
-#endif /* _PM_IPI_H_ */
+#endif /* PM_IPI_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef _PM_SVC_MAIN_H_
-#define _PM_SVC_MAIN_H_
+#ifndef PM_SVC_MAIN_H
+#define PM_SVC_MAIN_H
#include "pm_common.h"
uint64_t x4, void *cookie, void *handle,
uint64_t flags);
-#endif /* _PM_SVC_MAIN_H_ */
+#endif /* PM_SVC_MAIN_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __ZYNQMP_DEF_H__
-#define __ZYNQMP_DEF_H__
+#ifndef ZYNQMP_DEF_H
+#define ZYNQMP_DEF_H
#include <common_def.h>
#define AFIFM6_WRCTRL U(13)
#define FABRIC_WIDTH U(3)
-#endif /* __ZYNQMP_DEF_H__ */
+#endif /* ZYNQMP_DEF_H */
/* ZynqMP IPI management enums and defines */
-#ifndef _ZYNQMP_IPI_H_
-#define _ZYNQMP_IPI_H_
+#ifndef ZYNQMP_IPI_H
+#define ZYNQMP_IPI_H
#include <stdint.h>
/* Enable IPI mailbox notification interrupt */
void ipi_mb_enable_irq(uint32_t local, uint32_t remote);
-#endif /* _ZYNQMP_IPI_H_ */
+#endif /* ZYNQMP_IPI_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __ZYNQMP_PRIVATE_H__
-#define __ZYNQMP_PRIVATE_H__
+#ifndef ZYNQMP_PRIVATE_H
+#define ZYNQMP_PRIVATE_H
#include <bl_common.h>
#include <interrupt_mgmt.h>
enum fsbl_handoff fsbl_atf_handover(entry_point_info_t *bl32_image_ep_info,
entry_point_info_t *bl33_image_ep_info);
-#endif /* __ZYNQMP_PRIVATE_H__ */
+#endif /* ZYNQMP_PRIVATE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __OPTEED_PRIVATE_H__
-#define __OPTEED_PRIVATE_H__
+#ifndef OPTEED_PRIVATE_H
+#define OPTEED_PRIVATE_H
#include <arch.h>
#include <context.h>
extern struct optee_vectors *optee_vector_table;
#endif /*__ASSEMBLY__*/
-#endif /* __OPTEED_PRIVATE_H__ */
+#endif /* OPTEED_PRIVATE_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __TEESMC_OPTEED_MACROS_H__
-#define __TEESMC_OPTEED_MACROS_H__
+#ifndef TEESMC_OPTEED_MACROS_H
+#define TEESMC_OPTEED_MACROS_H
#include <runtime_svc.h>
(62 << FUNCID_OEN_SHIFT) | \
((func_num) & FUNCID_NUM_MASK))
-#endif /*__TEESMC_OPTEED_MACROS_H__*/
+#endif /* TEESMC_OPTEED_MACROS_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __TLKD_PRIVATE_H__
-#define __TLKD_PRIVATE_H__
+#ifndef TLKD_PRIVATE_H
+#define TLKD_PRIVATE_H
#include <arch.h>
#include <context.h>
#endif /*__ASSEMBLY__*/
-#endif /* __TLKD_PRIVATE_H__ */
+#endif /* TLKD_PRIVATE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __LIB_SM_SM_ERR_H
-#define __LIB_SM_SM_ERR_H
+#ifndef SM_ERR_H
+#define SM_ERR_H
/* Errors from the secure monitor */
#define SM_ERR_UNDEFINED_SMC 0xFFFFFFFF /* Unknown SMC (defined by ARM DEN 0028A(0.9.0) */
#define SM_ERR_NOT_ALLOWED -9 /* SMC call not allowed */
#define SM_ERR_END_OF_INPUT -10
-#endif
+#endif /* SM_ERR_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __LIB_SM_SMCALL_H
-#define __LIB_SM_SMCALL_H
+#ifndef SMCALL_H
+#define SMCALL_H
#define SMC_NUM_ENTITIES 64
#define SMC_NUM_ARGS 4
#define SMC_YC_VDEV_KICK_VQ SMC_YIELDCALL_NR(SMC_ENTITY_TRUSTED_OS, 24)
#define SMC_YC_SET_ROT_PARAMS SMC_YIELDCALL_NR(SMC_ENTITY_TRUSTED_OS, 65535)
-#endif /* __LIB_SM_SMCALL_H */
+#endif /* SMCALL_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __TSPD_PRIVATE_H__
-#define __TSPD_PRIVATE_H__
+#ifndef TSPD_PRIVATE_H
+#define TSPD_PRIVATE_H
#include <arch.h>
#include <context.h>
extern tsp_vectors_t *tsp_vectors;
#endif /*__ASSEMBLY__*/
-#endif /* __TSPD_PRIVATE_H__ */
+#endif /* TSPD_PRIVATE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SPM_PRIVATE_H__
-#define __SPM_PRIVATE_H__
+#ifndef SPM_PRIVATE_H
+#define SPM_PRIVATE_H
#include <context.h>
#endif /* __ASSEMBLY__ */
-#endif /* __SPM_PRIVATE_H__ */
+#endif /* SPM_PRIVATE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SPM_SHIM_PRIVATE__
-#define __SPM_SHIM_PRIVATE__
+#ifndef SPM_SHIM_PRIVATE_H
+#define SPM_SHIM_PRIVATE_H
#include <stdint.h>
#include <utils_def.h>
#define SPM_SHIM_EXCEPTIONS_SIZE \
(SPM_SHIM_EXCEPTIONS_END - SPM_SHIM_EXCEPTIONS_START)
-#endif /* __SPM_SHIM_PRIVATE__ */
+#endif /* SPM_SHIM_PRIVATE_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef CERT_H_
-#define CERT_H_
+#ifndef CERT_H
+#define CERT_H
#include <openssl/ossl_typ.h>
#include <openssl/x509.h>
extern cert_t *certs;
extern const unsigned int num_certs;
-#endif /* CERT_H_ */
+#endif /* CERT_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef CMD_OPT_H_
-#define CMD_OPT_H_
+#ifndef CMD_OPT_H
+#define CMD_OPT_H
#include <getopt.h>
const char *cmd_opt_get_name(int idx);
const char *cmd_opt_get_help_msg(int idx);
-#endif /* CMD_OPT_H_ */
+#endif /* CMD_OPT_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __DEBUG_H__
-#define __DEBUG_H__
+#ifndef DEBUG_H
+#define DEBUG_H
#include <stdio.h>
# define VERBOSE(...)
#endif
-#endif /* __DEBUG_H__ */
+#endif /* DEBUG_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef EXT_H_
-#define EXT_H_
+#ifndef EXT_H
+#define EXT_H
#include <openssl/x509v3.h>
#include "key.h"
extern ext_t *extensions;
extern const unsigned int num_extensions;
-#endif /* EXT_H_ */
+#endif /* EXT_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef KEY_H_
-#define KEY_H_
+#ifndef KEY_H
+#define KEY_H
#include <openssl/ossl_typ.h>
extern key_t *keys;
extern const unsigned int num_keys;
-#endif /* KEY_H_ */
+#endif /* KEY_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef SHA_H_
-#define SHA_H_
+#ifndef SHA_H
+#define SHA_H
int sha_file(int md_alg, const char *filename, unsigned char *md);
-#endif /* SHA_H_ */
+#endif /* SHA_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef TBB_CERT_H_
-#define TBB_CERT_H_
+#ifndef TBB_CERT_H
+#define TBB_CERT_H
#include "cert.h"
FWU_CERT
};
-#endif /* TBB_CERT_H_ */
+#endif /* TBB_CERT_H */
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef TBB_EXT_H_
-#define TBB_EXT_H_
+#ifndef TBB_EXT_H
+#define TBB_EXT_H
#include "ext.h"
FWU_HASH_EXT
};
-#endif /* TBB_EXT_H_ */
+#endif /* TBB_EXT_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef TBB_KEY_H_
-#define TBB_KEY_H_
+#ifndef TBB_KEY_H
+#define TBB_KEY_H
#include "key.h"
NON_TRUSTED_FW_CONTENT_CERT_KEY
};
-#endif /* TBB_KEY_H_ */
+#endif /* TBB_KEY_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __FIPTOOL_H__
-#define __FIPTOOL_H__
+#ifndef FIPTOOL_H
+#define FIPTOOL_H
#include <stddef.h>
#include <stdint.h>
void (*usage)(void);
} cmd_t;
-#endif /* __FIPTOOL_H__ */
+#endif /* FIPTOOL_H */
/*
- * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
- *
+ */
+/*
* Build platform specific handling.
* This allows for builds on non-Posix platforms
* e.g. Visual Studio on Windows
*/
-#ifndef __FIPTOOL_PLATFORM_H__
-# define __FIPTOOL_PLATFORM_H__
+#ifndef FIPTOOL_PLATFORM_H
+#define FIPTOOL_PLATFORM_H
-# ifndef _MSC_VER
+#ifndef _MSC_VER
- /* Not Visual Studio, so include Posix Headers. */
-# include <getopt.h>
-# include <openssl/sha.h>
-# include <unistd.h>
+/* Not Visual Studio, so include Posix Headers. */
+# include <getopt.h>
+# include <openssl/sha.h>
+# include <unistd.h>
-# define BLD_PLAT_STAT stat
+# define BLD_PLAT_STAT stat
-# else
+#else
- /* Visual Studio. */
-# include "win_posix.h"
+/* Visual Studio. */
+# include "win_posix.h"
-# endif
+#endif
-#endif /* __FIPTOOL_PLATFORM_H__ */
+#endif /* FIPTOOL_PLATFORM_H */
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __TBBR_CONFIG_H__
-#define __TBBR_CONFIG_H__
+#ifndef TBBR_CONFIG_H
+#define TBBR_CONFIG_H
#include <stdint.h>
extern toc_entry_t toc_entries[];
-#endif /* __TBBR_CONFIG_H__ */
+#endif /* TBBR_CONFIG_H */
/*
- * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __WINPOSIX_H__
-# define __WINPOSIX_H__
+#ifndef WIN_POSIX_H
+#define WIN_POSIX_H
-# define _CRT_SECURE_NO_WARNINGS
+#define _CRT_SECURE_NO_WARNINGS
-# include <direct.h>
-# include <io.h>
-# include <stdint.h>
-# include <stdlib.h>
-# include <string.h>
-# include <sys/stat.h>
-
-# include "uuid.h"
+#include <direct.h>
+#include <io.h>
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+#include <sys/stat.h>
+#include "uuid.h"
/* Derive or provide Windows equivalents of Posix/GCC/Unix stuff. */
-# ifndef PATH_MAX
-# ifdef MAX_PATH
-# define PATH_MAX MAX_PATH
-# else
-# ifdef _MAX_PATH
-# define MAX_PATH _MAX_PATH
-# define PATH_MAX _MAX_PATH
-# else
-# define PATH_MAX 260
-# endif
-# endif
-# endif
-
-# ifndef _CRT_SECURE_NO_WARNINGS
-# define _CRT_SECURE_NO_WARNINGS 1
-# endif
+#ifndef PATH_MAX
+# ifdef MAX_PATH
+# define PATH_MAX MAX_PATH
+# else
+# ifdef _MAX_PATH
+# define MAX_PATH _MAX_PATH
+# define PATH_MAX _MAX_PATH
+# else
+# define PATH_MAX 260
+# endif
+# endif
+#endif
+
+#ifndef _CRT_SECURE_NO_WARNINGS
+# define _CRT_SECURE_NO_WARNINGS 1
+#endif
/*
* Platform specific names.
*/
/* fileno cannot be an inline function, because _fileno is a macro. */
-# define fileno(fileptr) _fileno(fileptr)
+#define fileno(fileptr) _fileno(fileptr)
/* _fstat uses the _stat structure, not stat. */
-# define BLD_PLAT_STAT _stat
+#define BLD_PLAT_STAT _stat
/* Define flag values for _access. */
-# define F_OK 0
+#define F_OK 0
/* getopt implementation for Windows: Data. */
const struct option *longopts,
int *indexptr);
-#endif /* __WINPOSIX_H__ */
+#endif /* WIN_POSIX_H */
projects / project / bcm63xx / atf.git / commitdiff