diff options
| author | Shiji Yang | 2025-05-19 00:15:21 +0000 |
|---|---|---|
| committer | Shiji Yang | 2025-05-19 12:01:00 +0000 |
| commit | d1482e5e2d70e29c3752df97a1e2e98323b0f63f (patch) | |
| tree | fe1774b3e7edef67b24611be1e92ba6e6ec40487 | |
| parent | 96adba2768fe953f903e4ace1d20fef069ab8a89 (diff) | |
| download | openwrt-d1482e5e2d70e29c3752df97a1e2e98323b0f63f.tar.gz | |
mediatek: filogic: fix mxl phy node dtc warnings
Add missing #address-cells and #size-cells to fix the
following dtc warnings:
mt7981-rfb-mxl-2p5g-phy-eth1.dtso:26.5-15: Warning (reg_format): /fragment@1/__overlay__/ethernet-phy@5:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
mt7981-rfb-mxl-2p5g-phy-swp5.dtso:27.5-15: Warning (reg_format): /fragment@1/__overlay__/ethernet-phy@5:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
2 files changed, 4 insertions, 0 deletions
diff --git a/target/linux/mediatek/files-6.6/arch/arm64/boot/dts/mediatek/mt7981-rfb-mxl-2p5g-phy-eth1.dtso b/target/linux/mediatek/files-6.6/arch/arm64/boot/dts/mediatek/mt7981-rfb-mxl-2p5g-phy-eth1.dtso index 4d0e5c0406..51d5dc661a 100644 --- a/target/linux/mediatek/files-6.6/arch/arm64/boot/dts/mediatek/mt7981-rfb-mxl-2p5g-phy-eth1.dtso +++ b/target/linux/mediatek/files-6.6/arch/arm64/boot/dts/mediatek/mt7981-rfb-mxl-2p5g-phy-eth1.dtso @@ -18,6 +18,8 @@ fragment@1 { target = <&mdio_bus>; __overlay__ { + #address-cells = <1>; + #size-cells = <0>; reset-gpios = <&pio 14 GPIO_ACTIVE_LOW>; reset-delay-us = <600>; reset-post-delay-us = <20000>; diff --git a/target/linux/mediatek/files-6.6/arch/arm64/boot/dts/mediatek/mt7981-rfb-mxl-2p5g-phy-swp5.dtso b/target/linux/mediatek/files-6.6/arch/arm64/boot/dts/mediatek/mt7981-rfb-mxl-2p5g-phy-swp5.dtso index 710e6c0bcf..4cc3cf1df6 100644 --- a/target/linux/mediatek/files-6.6/arch/arm64/boot/dts/mediatek/mt7981-rfb-mxl-2p5g-phy-swp5.dtso +++ b/target/linux/mediatek/files-6.6/arch/arm64/boot/dts/mediatek/mt7981-rfb-mxl-2p5g-phy-swp5.dtso @@ -19,6 +19,8 @@ fragment@1 { target = <&mdio_bus>; __overlay__ { + #address-cells = <1>; + #size-cells = <0>; reset-gpios = <&pio 14 GPIO_ACTIVE_LOW>; reset-delay-us = <600>; reset-post-delay-us = <20000>; |