York Sun <yorksun@freescale.com>
York Sun <york.sun@nxp.com>
Łukasz Majewski <l.majewski@samsung.com>
+Mirza <Taimoor_Mirza@mentor.com>
+++ /dev/null
-NOP PHY driver
-
-This driver is used to stub PHY operations in a driver (USB, SATA).
-This is useful when the 'client' driver (USB, SATA, ...) uses the PHY framework
-and there is no actual PHY harwdare to drive.
-
-Required properties:
-- compatible : must contain "nop-phy"
-- #phy-cells : must contain <0>
-
-Example:
-
-nop_phy {
- compatible = "nop-phy";
- #phy-cells = <0>;
-};
+++ /dev/null
-STMicroelectronics STM32 USB HS PHY controller
-
-The STM32 USBPHYC block contains a dual port High Speed UTMI+ PHY and a UTMI
-switch. It controls PHY configuration and status, and the UTMI+ switch that
-selects either OTG or HOST controller for the second PHY port. It also sets
-PLL configuration.
-
-USBPHYC
- |_ PLL
- |
- |_ PHY port#1 _________________ HOST controller
- | _ |
- | / 1|________________|
- |_ PHY port#2 ----| |________________
- | \_0| |
- |_ UTMI switch_______| OTG controller
-
-
-Phy provider node
-=================
-
-Required properties:
-- compatible: must be "st,stm32mp1-usbphyc"
-- reg: address and length of the usb phy control register set
-- clocks: phandle + clock specifier for the PLL phy clock
-- #address-cells: number of address cells for phys sub-nodes, must be <1>
-- #size-cells: number of size cells for phys sub-nodes, must be <0>
-
-Optional properties:
-- assigned-clocks: phandle + clock specifier for the PLL phy clock
-- assigned-clock-parents: the PLL phy clock parent
-- resets: phandle + reset specifier
-
-Required nodes: one sub-node per port the controller provides.
-
-Phy sub-nodes
-==============
-
-Required properties:
-- reg: phy port index
-- phy-supply: phandle to the regulator providing 3V3 power to the PHY,
- see phy-bindings.txt in the same directory.
-- vdda1v1-supply: phandle to the regulator providing 1V1 power to the PHY
-- vdda1v8-supply: phandle to the regulator providing 1V8 power to the PHY
-- #phy-cells: see phy-bindings.txt in the same directory, must be <0> for PHY
- port#1 and must be <1> for PHY port#2, to select USB controller
-
-
-Example:
- usbphyc: usb-phy@5a006000 {
- compatible = "st,stm32mp1-usbphyc";
- reg = <0x5a006000 0x1000>;
- clocks = <&rcc_clk USBPHY_K>;
- resets = <&rcc_rst USBPHY_R>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- usbphyc_port0: usb-phy@0 {
- reg = <0>;
- phy-supply = <&vdd_usb>;
- vdda1v1-supply = <®11>;
- vdda1v8-supply = <®18>
- #phy-cells = <0>;
- };
-
- usbphyc_port1: usb-phy@1 {
- reg = <1>;
- phy-supply = <&vdd_usb>;
- vdda1v1-supply = <®11>;
- vdda1v8-supply = <®18>
- #phy-cells = <1>;
- };
- };
+++ /dev/null
-Broadcom STB wake-up Timer
-
-The Broadcom STB wake-up timer provides a 27Mhz resolution timer, with the
-ability to wake up the system from low-power suspend/standby modes.
-
-Required properties:
-- compatible : should contain "brcm,brcmstb-waketimer"
-- reg : the register start and length for the WKTMR block
-- interrupts : The TIMER interrupt
-- interrupt-parent: The phandle to the Always-On (AON) Power Management (PM) L2
- interrupt controller node
-- clocks : The phandle to the UPG fixed clock (27Mhz domain)
-
-Example:
-
-waketimer@f0411580 {
- compatible = "brcm,brcmstb-waketimer";
- reg = <0xf0411580 0x14>;
- interrupts = <0x3>;
- interrupt-parent = <&aon_pm_l2_intc>;
- clocks = <&upg_fixed>;
-};
clean-dirs := $(foreach f,$(u-boot-alldirs),$(if $(wildcard $(srctree)/$f/Makefile),$f))
-clean-dirs := $(addprefix _clean_, $(clean-dirs) doc/DocBook)
+clean-dirs := $(addprefix _clean_, $(clean-dirs))
PHONY += $(clean-dirs) clean archclean
$(clean-dirs):
@echo ' coccicheck - Execute static code analysis with Coccinelle'
@echo ''
@echo 'Documentation targets:'
- @$(MAKE) -f $(srctree)/doc/DocBook/Makefile dochelp
+ @$(MAKE) -f $(srctree)/Documentation/Makefile dochelp
@echo ''
@echo ' make V=0|1 [targets] 0 => quiet build (default), 1 => verbose build'
@echo ' make V=2 [targets] 2 => give reason for rebuild of target'
select DM_RESET
select DM_SERIAL
select DM_USB
+ select OF_BOARD_SETUP
select OF_CONTROL
select OF_LIBFDT
select PINCTRL
select SPL_OF_CONTROL if SPL
select SPL_PINCTRL if SPL
select SUPPORT_SPL
+ imply DISTRO_DEFAULTS
imply FAT_WRITE
help
Support for UniPhier SoC family developed by Socionext Inc.
config ARCH_UNIPHIER_LD20
bool "Enable UniPhier LD20 SoC support"
depends on ARCH_UNIPHIER_V8_MULTI
- select OF_BOARD_SETUP
default y
config ARCH_UNIPHIER_PXS3
obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc/ micro-support-card.o
obj-y += pinctrl-glue.o
obj-$(CONFIG_MMC) += mmc-first-dev.o
+obj-y += fdt-fixup.o
endif
switch (uniphier_boot_device_raw()) {
case BOOT_DEVICE_MMC1:
printf("eMMC Boot");
- env_set("bootmode", "emmcboot");
+ env_set("bootcmd", "run bootcmd_mmc0; run distro_bootcmd");
break;
case BOOT_DEVICE_NAND:
printf("NAND Boot");
- env_set("bootmode", "nandboot");
+ env_set("bootcmd", "run bootcmd_ubifs0; run distro_bootcmd");
nand_denali_wp_disable();
break;
case BOOT_DEVICE_NOR:
printf("NOR Boot");
- env_set("bootmode", "norboot");
+ env_set("bootcmd", "run tftpboot; run distro_bootcmd");
break;
case BOOT_DEVICE_USB:
printf("USB Boot");
- env_set("bootmode", "usbboot");
+ env_set("bootcmd", "run bootcmd_usb0; run distro_bootcmd");
break;
default:
printf("Unknown");
*/
#include <common.h>
-#include <fdt_support.h>
-#include <fdtdec.h>
#include <linux/errno.h>
#include <linux/kernel.h>
#include <linux/printk.h>
return 0;
}
-
-#ifdef CONFIG_OF_BOARD_SETUP
-/*
- * The DRAM PHY requires 64 byte scratch area in each DRAM channel
- * for its dynamic PHY training feature.
- */
-int ft_board_setup(void *fdt, bd_t *bd)
-{
- unsigned long rsv_addr;
- const unsigned long rsv_size = 64;
- int i, ret;
-
- if (uniphier_get_soc_id() != UNIPHIER_LD20_ID)
- return 0;
-
- for (i = 0; i < ARRAY_SIZE(gd->bd->bi_dram); i++) {
- if (!gd->bd->bi_dram[i].size)
- continue;
-
- rsv_addr = gd->bd->bi_dram[i].start + gd->bd->bi_dram[i].size;
- rsv_addr -= rsv_size;
-
- ret = fdt_add_mem_rsv(fdt, rsv_addr, rsv_size);
- if (ret)
- return -ENOSPC;
-
- pr_notice(" Reserved memory region for DRAM PHY training: addr=%lx size=%lx\n",
- rsv_addr, rsv_size);
- }
-
- return 0;
-}
-#endif
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2016-2018 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ */
+
+#include <common.h>
+#include <fdt_support.h>
+#include <fdtdec.h>
+#include <jffs2/load_kernel.h>
+#include <mtd_node.h>
+#include <linux/kernel.h>
+#include <linux/printk.h>
+
+#include "soc-info.h"
+
+/*
+ * The DRAM PHY requires 64 byte scratch area in each DRAM channel
+ * for its dynamic PHY training feature.
+ */
+static int uniphier_ld20_fdt_mem_rsv(void *fdt, bd_t *bd)
+{
+ unsigned long rsv_addr;
+ const unsigned long rsv_size = 64;
+ int i, ret;
+
+ if (!IS_ENABLED(CONFIG_ARCH_UNIPHIER_LD20) ||
+ uniphier_get_soc_id() != UNIPHIER_LD20_ID)
+ return 0;
+
+ for (i = 0; i < ARRAY_SIZE(bd->bi_dram); i++) {
+ if (!bd->bi_dram[i].size)
+ continue;
+
+ rsv_addr = bd->bi_dram[i].start + bd->bi_dram[i].size;
+ rsv_addr -= rsv_size;
+
+ ret = fdt_add_mem_rsv(fdt, rsv_addr, rsv_size);
+ if (ret)
+ return -ENOSPC;
+
+ pr_notice(" Reserved memory region for DRAM PHY training: addr=%lx size=%lx\n",
+ rsv_addr, rsv_size);
+ }
+
+ return 0;
+}
+
+int ft_board_setup(void *fdt, bd_t *bd)
+{
+ static const struct node_info nodes[] = {
+ { "socionext,uniphier-denali-nand-v5a", MTD_DEV_TYPE_NAND },
+ { "socionext,uniphier-denali-nand-v5b", MTD_DEV_TYPE_NAND },
+ };
+ int ret;
+
+ fdt_fixup_mtdparts(fdt, nodes, ARRAY_SIZE(nodes));
+
+ ret = uniphier_ld20_fdt_mem_rsv(fdt, bd);
+ if (ret)
+ return ret;
+
+ return 0;
+}
*/
int ft_board_setup(void *blob, bd_t *bd)
{
- struct node_info nodes[] = {
+ static const struct node_info nodes[] = {
{ "physmap-flash.0", MTD_DEV_TYPE_NOR, }, /* NOR flash */
{ "mxc_nand", MTD_DEV_TYPE_NAND, }, /* NAND flash */
};
#ifdef CONFIG_OF_BOARD_SETUP
#define USDHC3_PATH "/soc/aips-bus@02100000/usdhc@02198000/"
-struct node_info nodes[] = {
+static const struct node_info nodes[] = {
/*
* Both entries target the same flash chip. The st,m25p compatible
* is used in the vendor device trees, while upstream uses (the
#if defined(CONFIG_OF_BOARD_SETUP)
#ifdef CONFIG_FDT_FIXUP_PARTITIONS
-struct node_info nodes[] = {
+static const struct node_info nodes[] = {
{ "fsl,ifc-nand", MTD_DEV_TYPE_NAND, },
};
#endif
#if defined(CONFIG_OF_BOARD_SETUP)
#ifdef CONFIG_FDT_FIXUP_PARTITIONS
-struct node_info nodes[] = {
+static const struct node_info nodes[] = {
{ "cfi-flash", MTD_DEV_TYPE_NOR, },
{ "fsl,ifc-nand", MTD_DEV_TYPE_NAND, },
};
{
struct ventana_board_info *info = &ventana_info;
struct ventana_eeprom_config *cfg;
- struct node_info nodes[] = {
+ static const struct node_info nodes[] = {
{ "sst,w25q256", MTD_DEV_TYPE_NOR, }, /* SPI flash */
{ "fsl,imx6q-gpmi-nand", MTD_DEV_TYPE_NAND, }, /* NAND flash */
};
int ft_board_setup(void *blob, bd_t *bd)
{
#ifdef CONFIG_FDT_FIXUP_PARTITIONS
- static struct node_info nodes[] = {
+ static const struct node_info nodes[] = {
{ "ti,omap2-nand", MTD_DEV_TYPE_NAND, },
};
int ft_board_setup(void *blob, bd_t *bd)
{
#ifdef CONFIG_FDT_FIXUP_PARTITIONS
- static struct node_info nodes[] = {
+ static const struct node_info nodes[] = {
{ "ti,omap2-nand", MTD_DEV_TYPE_NAND, },
{ "ti,omap2-onenand", MTD_DEV_TYPE_ONENAND, },
};
AM3517EVM BOARD
-M: Vaibhav Hiremath <hvaibhav@ti.com>
+M: Adam Ford <aford173@gmail.com>
S: Maintained
F: board/logicpd/am3517evm/
F: include/configs/am3517_evm.h
int ft_board_setup(void *blob, bd_t *bd)
{
#if defined(CONFIG_FDT_FIXUP_PARTITIONS)
- static struct node_info nodes[] = {
+ static const struct node_info nodes[] = {
{ "fsl,imx7d-gpmi-nand", MTD_DEV_TYPE_NAND, }, /* NAND flash */
{ "fsl,imx6q-gpmi-nand", MTD_DEV_TYPE_NAND, },
};
{
int ret = 0;
#ifdef CONFIG_FDT_FIXUP_PARTITIONS
- static struct node_info nodes[] = {
+ static const struct node_info nodes[] = {
{ "fsl,vf610-nfc", MTD_DEV_TYPE_NAND, }, /* NAND flash */
};
config CMD_AVB
bool "avb - Android Verified Boot 2.0 operations"
- depends on LIBAVB
+ depends on AVB_VERIFY
default n
help
Enables a "avb" command to perform verification of partitions using
part->auto_name = 0;
} else {
/* auto generated name in form of size@offset */
- sprintf(part->name, "0x%08llx@0x%08llx", size, offset);
+ snprintf(part->name, name_len, "0x%08llx@0x%08llx", size, offset);
part->auto_name = 1;
}
and the algorithms it supports are defined in common/hash.c. See
also CMD_HASH for command-line access.
+config AVB_VERIFY
+ bool "Build Android Verified Boot operations"
+ depends on LIBAVB && FASTBOOT
+ help
+ This option enables compilation of bootloader-dependent operations,
+ used by Android Verified Boot 2.0 library (libavb). Includes:
+ * Helpers to process strings in order to build OS bootargs.
+ * Helpers to access MMC, similar to drivers/fastboot/fb_mmc.c.
+ * Helpers to alloc/init/free avb ops.
+
endmenu
menu "Update support"
obj-y += s_record.o
obj-y += xyzModem.o
-obj-$(CONFIG_LIBAVB) += avb_verify.o
+obj-$(CONFIG_AVB_VERIFY) += avb_verify.o
*/
#include <avb_verify.h>
+#include <blk.h>
#include <fastboot.h>
#include <image.h>
#include <malloc.h>
tmp_buf = buffer;
}
- blks = part->mmc->block_dev.block_read(part->mmc_blk,
- start, sectors, tmp_buf);
+ blks = blk_dread(part->mmc_blk,
+ start, sectors, tmp_buf);
/* flush cache after read */
flush_cache((ulong)tmp_buf, sectors * part->info.blksz);
tmp_buf = buffer;
}
- return part->mmc->block_dev.block_write(part->mmc_blk,
- start, sectors, tmp_buf);
+ return blk_dwrite(part->mmc_blk,
+ start, sectors, tmp_buf);
}
static struct mmc_part *get_partition(AvbOps *ops, const char *partition)
*
* fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
*/
-void fdt_fixup_mtdparts(void *blob, void *node_info, int node_info_size)
+void fdt_fixup_mtdparts(void *blob, const struct node_info *node_info,
+ int node_info_size)
{
- struct node_info *ni = node_info;
struct mtd_device *dev;
int i, idx;
int noff;
for (i = 0; i < node_info_size; i++) {
idx = 0;
- noff = fdt_node_offset_by_compatible(blob, -1, ni[i].compat);
+ noff = fdt_node_offset_by_compatible(blob, -1,
+ node_info[i].compat);
while (noff != -FDT_ERR_NOTFOUND) {
debug("%s: %s, mtd dev type %d\n",
fdt_get_name(blob, noff, 0),
- ni[i].compat, ni[i].type);
- dev = device_find(ni[i].type, idx++);
+ node_info[i].compat, node_info[i].type);
+ dev = device_find(node_info[i].type, idx++);
if (dev) {
if (fdt_node_set_part_info(blob, noff, dev))
return; /* return on error */
/* Jump to next flash node */
noff = fdt_node_offset_by_compatible(blob, noff,
- ni[i].compat);
+ node_info[i].compat);
}
}
}
#include <spl.h>
#include <xyzModem.h>
#include <asm/u-boot.h>
-#include <asm/utils.h>
#include <linux/libfdt.h>
#define BUF_SIZE 1024
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SYS_PROMPT="AM3517_EVM # "
# CONFIG_CMD_IMI is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_NAND_OFS=0xaa0000
+CONFIG_CMD_SPL_WRITE_SIZE=0x20000
# CONFIG_CMD_EEPROM is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_GPT is not set
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
+CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(spl),1920k(u-boot),128k(u-boot-env),128k(dtb),6m(kernel),-(rootfs)"
CONFIG_CMD_UBI=y
# CONFIG_ISO_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-CONFIG_SPL_PARTITION_UUIDS=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SPL_DM=y
CONFIG_FAT_WRITE=y
CONFIG_BCH=y
CONFIG_SPL_OF_LIBFDT=y
-# CONFIG_EFI_LOADER is not set
# CONFIG_CMD_MISC is not set
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_MTDIDS_DEFAULT="nand0=uniphier-nand.0"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=uniphier-nand.0:1m(firmware),-(UBI)"
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_I2C_EEPROM=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_MMC_UNIPHIER=y
-CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
CONFIG_NAND=y
CONFIG_NAND_DENALI_DT=y
CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_STORAGE=y
CONFIG_PANIC_HANG=y
+CONFIG_FDT_FIXUP_PARTITIONS=y
# CONFIG_CMD_MISC is not set
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_MTDIDS_DEFAULT="nand0=uniphier-nand.0"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=uniphier-nand.0:1m(firmware),-(UBI)"
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_I2C_EEPROM=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_MMC_UNIPHIER=y
-CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
CONFIG_NAND=y
CONFIG_NAND_DENALI_DT=y
CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
CONFIG_USB_DWC3_UNIPHIER=y
CONFIG_USB_STORAGE=y
CONFIG_PANIC_HANG=y
+CONFIG_FDT_FIXUP_PARTITIONS=y
# CONFIG_CMD_MISC is not set
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_MTDIDS_DEFAULT="nand0=uniphier-nand.0"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=uniphier-nand.0:1m(firmware),-(UBI)"
+CONFIG_CMD_UBI=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_GPIO_UNIPHIER=y
CONFIG_MISC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_CADENCE=y
-CONFIG_MTD_DEVICE=y
CONFIG_NAND=y
CONFIG_NAND_DENALI_DT=y
CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
CONFIG_USB_DWC3_UNIPHIER=y
CONFIG_USB_STORAGE=y
CONFIG_PANIC_HANG=y
+CONFIG_FDT_FIXUP_PARTITIONS=y
-----------------------------------
The following options must be enabled:
CONFIG_LIBAVB=y
+CONFIG_AVB_VERIFY=y
CONFIG_CMD_AVB=y
If they are not displayed, the Verified Boot is not working.
+Deployment for Distro Boot
+--------------------------
+
+UniPhier SoC family boot the kernel in a generic manner as described in
+doc/README.distro .
+
+To boot the kernel, you need to deploy necesssary components to a file
+system on one of your block devices (eMMC, NAND, USB drive, etc.).
+
+The components depend on the kernel image format.
+
+[1] Bare images
+
+ - kernel
+ - init ramdisk
+ - device tree blob
+ - boot configuration file (extlinux.conf)
+
+Here is an exmple of the configuration file.
+
+-------------------->8--------------------
+menu title UniPhier Boot Options.
+
+timeout 50
+default UniPhier
+
+label UniPhier
+ kernel ../Image
+ initrd ../rootfs.cpio.gz
+ fdtdir ..
+-------------------->8--------------------
+
+Then, write 'Image', 'rootfs.cpio.gz', 'uniphier-ld20-ref.dtb' (DTB depends on
+your board), and 'extlinux/extlinux.conf' to the file system.
+
+[2] FIT
+
+ - FIT blob
+ - boot configuration file (extlinux.conf)
+
+-------------------->8--------------------
+menu title UniPhier Boot Options.
+
+timeout 50
+default UniPhier
+
+label UniPhier
+ kernel ../fitImage
+-------------------->8--------------------
+
+Since the init ramdisk and DTB are contained in the FIT blob,
+you do not need to describe them in the configuration file.
+Write 'fitImage' and 'extlinux/extlinux.conf' to the file system.
+
+
UniPhier specific commands
--------------------------
--- /dev/null
+NOP PHY driver
+
+This driver is used to stub PHY operations in a driver (USB, SATA).
+This is useful when the 'client' driver (USB, SATA, ...) uses the PHY framework
+and there is no actual PHY harwdare to drive.
+
+Required properties:
+- compatible : must contain "nop-phy"
+- #phy-cells : must contain <0>
+
+Example:
+
+nop_phy {
+ compatible = "nop-phy";
+ #phy-cells = <0>;
+};
--- /dev/null
+STMicroelectronics STM32 USB HS PHY controller
+
+The STM32 USBPHYC block contains a dual port High Speed UTMI+ PHY and a UTMI
+switch. It controls PHY configuration and status, and the UTMI+ switch that
+selects either OTG or HOST controller for the second PHY port. It also sets
+PLL configuration.
+
+USBPHYC
+ |_ PLL
+ |
+ |_ PHY port#1 _________________ HOST controller
+ | _ |
+ | / 1|________________|
+ |_ PHY port#2 ----| |________________
+ | \_0| |
+ |_ UTMI switch_______| OTG controller
+
+
+Phy provider node
+=================
+
+Required properties:
+- compatible: must be "st,stm32mp1-usbphyc"
+- reg: address and length of the usb phy control register set
+- clocks: phandle + clock specifier for the PLL phy clock
+- #address-cells: number of address cells for phys sub-nodes, must be <1>
+- #size-cells: number of size cells for phys sub-nodes, must be <0>
+
+Optional properties:
+- assigned-clocks: phandle + clock specifier for the PLL phy clock
+- assigned-clock-parents: the PLL phy clock parent
+- resets: phandle + reset specifier
+
+Required nodes: one sub-node per port the controller provides.
+
+Phy sub-nodes
+==============
+
+Required properties:
+- reg: phy port index
+- phy-supply: phandle to the regulator providing 3V3 power to the PHY,
+ see phy-bindings.txt in the same directory.
+- vdda1v1-supply: phandle to the regulator providing 1V1 power to the PHY
+- vdda1v8-supply: phandle to the regulator providing 1V8 power to the PHY
+- #phy-cells: see phy-bindings.txt in the same directory, must be <0> for PHY
+ port#1 and must be <1> for PHY port#2, to select USB controller
+
+
+Example:
+ usbphyc: usb-phy@5a006000 {
+ compatible = "st,stm32mp1-usbphyc";
+ reg = <0x5a006000 0x1000>;
+ clocks = <&rcc_clk USBPHY_K>;
+ resets = <&rcc_rst USBPHY_R>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ usbphyc_port0: usb-phy@0 {
+ reg = <0>;
+ phy-supply = <&vdd_usb>;
+ vdda1v1-supply = <®11>;
+ vdda1v8-supply = <®18>
+ #phy-cells = <0>;
+ };
+
+ usbphyc_port1: usb-phy@1 {
+ reg = <1>;
+ phy-supply = <&vdd_usb>;
+ vdda1v1-supply = <®11>;
+ vdda1v8-supply = <®18>
+ #phy-cells = <1>;
+ };
+ };
--- /dev/null
+Broadcom STB wake-up Timer
+
+The Broadcom STB wake-up timer provides a 27Mhz resolution timer, with the
+ability to wake up the system from low-power suspend/standby modes.
+
+Required properties:
+- compatible : should contain "brcm,brcmstb-waketimer"
+- reg : the register start and length for the WKTMR block
+- interrupts : The TIMER interrupt
+- interrupt-parent: The phandle to the Always-On (AON) Power Management (PM) L2
+ interrupt controller node
+- clocks : The phandle to the UPG fixed clock (27Mhz domain)
+
+Example:
+
+waketimer@f0411580 {
+ compatible = "brcm,brcmstb-waketimer";
+ reg = <0xf0411580 0x14>;
+ interrupts = <0x3>;
+ interrupt-parent = <&aon_pm_l2_intc>;
+ clocks = <&upg_fixed>;
+};
denali->dma_avail = 1;
if (denali->dma_avail) {
- chip->buf_align = 16;
+ chip->buf_align = ARCH_DMA_MINALIGN;
if (denali->caps & DENALI_CAP_DMA_64BIT)
denali->setup_dma = denali_setup_dma64;
else
#include <errno.h>
#include <rtc.h>
-#if defined(CONFIG_CMD_DATE) || defined(CONFIG_TIMESTAMP)
+#if defined(CONFIG_CMD_DATE) || defined(CONFIG_DM_RTC) || \
+ defined(CONFIG_TIMESTAMP)
#define FEBRUARY 2
#define STARTOFTIME 1970
#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SPL_GD_ADDR + 12 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_SIZE (30 << 10)
#define CONFIG_SPL_RELOC_STACK (CONFIG_SPL_GD_ADDR + 64 * 1024)
-#define CONFIG_SPL_RELOC_STACK_SIZE (22 << 10)
#ifdef CONFIG_PHYS_64BIT
#define CONFIG_SYS_DCSRBAR 0xf0000000
#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
#define CONFIG_SPL_RELOC_TEXT_BASE 0xf8f81000
#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 128 * 1024)
-#define CONFIG_SPL_RELOC_STACK_SIZE (32 << 10)
#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 160 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_SIZE (96 << 10)
#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024)
#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
#define CONFIG_SPL_RELOC_TEXT_BASE 0xD0001000
#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024)
-#define CONFIG_SPL_RELOC_STACK_SIZE (16 << 10)
#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 128 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_SIZE (128 << 10)
#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 96 * 1024)
#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
#define CONFIG_SPL_RELOC_TEXT_BASE 0xf8f81000
#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 116 * 1024)
-#define CONFIG_SPL_RELOC_STACK_SIZE (32 << 10)
#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 148 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_SIZE (108 << 10)
#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SPL_GD_ADDR + 12 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_SIZE (30 << 10)
#define CONFIG_SPL_RELOC_STACK (CONFIG_SPL_GD_ADDR + 64 * 1024)
-#define CONFIG_SPL_RELOC_STACK_SIZE (22 << 10)
#ifdef CONFIG_PHYS_64BIT
#define CONFIG_SYS_DCSRBAR 0xf0000000
#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SPL_GD_ADDR + 12 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_SIZE (30 << 10)
#define CONFIG_SPL_RELOC_STACK (CONFIG_SPL_GD_ADDR + 64 * 1024)
-#define CONFIG_SPL_RELOC_STACK_SIZE (22 << 10)
#ifdef CONFIG_PHYS_64BIT
#define CONFIG_SYS_DCSRBAR 0xf0000000
#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SPL_GD_ADDR + 12 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_SIZE (30 << 10)
#define CONFIG_SPL_RELOC_STACK (CONFIG_SPL_GD_ADDR + 64 * 1024)
-#define CONFIG_SPL_RELOC_STACK_SIZE (22 << 10)
#define CONFIG_SYS_DCSRBAR 0xf0000000
#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull
#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SPL_GD_ADDR + 12 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_SIZE (50 << 10)
#define CONFIG_SPL_RELOC_STACK (CONFIG_SPL_GD_ADDR + 64 * 1024)
-#define CONFIG_SPL_RELOC_STACK_SIZE (22 << 10)
#define CONFIG_SYS_DCSRBAR 0xf0000000
#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull
#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SPL_GD_ADDR + 12 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_SIZE (50 << 10)
#define CONFIG_SPL_RELOC_STACK (CONFIG_SPL_GD_ADDR + 64 * 1024)
-#define CONFIG_SPL_RELOC_STACK_SIZE (22 << 10)
#define CONFIG_SYS_DCSRBAR 0xf0000000
#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull
#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SPL_GD_ADDR + 12 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_SIZE (50 << 10)
#define CONFIG_SPL_RELOC_STACK (CONFIG_SPL_GD_ADDR + 64 * 1024)
-#define CONFIG_SPL_RELOC_STACK_SIZE (22 << 10)
#define CONFIG_SYS_DCSRBAR 0xf0000000
#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull
#define CONFIG_SPL_RELOC_TEXT_BASE 0xf8f81000
#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024)
#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 116 * 1024)
-#define CONFIG_SPL_RELOC_STACK_SIZE (32 << 10)
#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 148 * 1024)
#if defined(CONFIG_TARGET_P2020RDB)
#define CONFIG_SPL_RELOC_MALLOC_SIZE (364 << 10)
#ifndef __CONFIG_H
#define __CONFIG_H
+#include <linux/sizes.h>
+
/* ram memory-related information */
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM_1 0x40000000
/* Environment */
#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
+#define CONFIG_SYS_BOOTM_LEN SZ_16M
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0) \
#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SPL_GD_ADDR + 12 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_SIZE (50 << 10)
#define CONFIG_SPL_RELOC_STACK (CONFIG_SPL_GD_ADDR + 64 * 1024)
-#define CONFIG_SPL_RELOC_STACK_SIZE (22 << 10)
#define CONFIG_SYS_DCSRBAR 0xf0000000
#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull
#ifndef __CONFIG_UNIPHIER_COMMON_H__
#define __CONFIG_UNIPHIER_COMMON_H__
+#ifndef CONFIG_SPL_BUILD
+#include <config_distro_bootcmd.h>
+
+#ifdef CONFIG_CMD_MMC
+#define BOOT_TARGET_DEVICE_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1)
+#else
+#define BOOT_TARGET_DEVICE_MMC(func)
+#endif
+
+#ifdef CONFIG_CMD_UBIFS
+#define BOOT_TARGET_DEVICE_UBIFS(func) func(UBIFS, ubifs, 0)
+#else
+#define BOOT_TARGET_DEVICE_UBIFS(func)
+#endif
+
+#ifdef CONFIG_CMD_USB
+#define BOOT_TARGET_DEVICE_USB(func) func(USB, usb, 0)
+#else
+#define BOOT_TARGET_DEVICE_USB(func)
+#endif
+
+#define BOOT_TARGET_DEVICES(func) \
+ BOOT_TARGET_DEVICE_MMC(func) \
+ BOOT_TARGET_DEVICE_UBIFS(func) \
+ BOOT_TARGET_DEVICE_USB(func)
+#else
+#define BOOTENV
+#endif
+
#define CONFIG_ARMV7_PSCI_1_0
/*-----------------------------------------------------------------------
"third_image=u-boot.bin\0"
#endif
-#define CONFIG_BOOTCOMMAND "run $bootmode"
-
#define CONFIG_ROOTPATH "/nfs/root/path"
#define CONFIG_NFSBOOTCOMMAND \
"setenv bootargs $bootargs root=/dev/nfs rw " \
#ifdef CONFIG_FIT
#define CONFIG_BOOTFILE "fitImage"
#define LINUXBOOT_ENV_SETTINGS \
- "fit_addr=0x00100000\0" \
- "fit_addr_r=0x85100000\0" \
- "fit_size=0x00f00000\0" \
- "norboot=setexpr fit_addr $nor_base + $fit_addr &&" \
- "bootm $fit_addr\0" \
- "nandboot=nand read $fit_addr_r $fit_addr $fit_size &&" \
- "bootm $fit_addr_r\0" \
- "tftpboot=tftpboot $fit_addr_r $bootfile &&" \
- "bootm $fit_addr_r\0" \
+ "kernel_addr_r=0x85100000\0" \
+ "tftpboot=tftpboot $kernel_addr_r $bootfile &&" \
+ "bootm $kernel_addr_r\0" \
"__nfsboot=run tftpboot\0"
#else
#ifdef CONFIG_ARM64
-#define CONFIG_BOOTFILE "Image.gz"
+#define CONFIG_BOOTFILE "Image"
#define LINUXBOOT_CMD "booti"
-#define KERNEL_ADDR_LOAD "kernel_addr_load=0x85200000\0"
#define KERNEL_ADDR_R "kernel_addr_r=0x82080000\0"
#else
#define CONFIG_BOOTFILE "zImage"
#define LINUXBOOT_CMD "bootz"
-#define KERNEL_ADDR_LOAD "kernel_addr_load=0x80208000\0"
#define KERNEL_ADDR_R "kernel_addr_r=0x80208000\0"
#endif
#define LINUXBOOT_ENV_SETTINGS \
- "fdt_addr=0x00100000\0" \
"fdt_addr_r=0x85100000\0" \
- "fdt_size=0x00008000\0" \
- "kernel_addr=0x00200000\0" \
- KERNEL_ADDR_LOAD \
KERNEL_ADDR_R \
- "kernel_size=0x00e00000\0" \
- "ramdisk_addr=0x01000000\0" \
"ramdisk_addr_r=0x86000000\0" \
- "ramdisk_size=0x00800000\0" \
- "ramdisk_file=rootfs.cpio.uboot\0" \
+ "ramdisk_file=rootfs.cpio.gz\0" \
"boot_common=setexpr bootm_low $kernel_addr_r '&' fe000000 && " \
- "if test $kernel_addr_load = $kernel_addr_r; then " \
- "true; " \
- "else " \
- "unzip $kernel_addr_load $kernel_addr_r; " \
- "fi && " \
LINUXBOOT_CMD " $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \
- "norboot=setexpr kernel_addr_nor $nor_base + $kernel_addr && " \
- "setexpr kernel_size_div4 $kernel_size / 4 && " \
- "cp $kernel_addr_nor $kernel_addr_load $kernel_size_div4 && " \
- "setexpr ramdisk_addr_nor $nor_base + $ramdisk_addr && " \
- "setexpr ramdisk_size_div4 $ramdisk_size / 4 && " \
- "cp $ramdisk_addr_nor $ramdisk_addr_r $ramdisk_size_div4 && " \
- "setexpr fdt_addr_nor $nor_base + $fdt_addr && " \
- "setexpr fdt_size_div4 $fdt_size / 4 && " \
- "cp $fdt_addr_nor $fdt_addr_r $fdt_size_div4 && " \
- "run boot_common\0" \
- "nandboot=nand read $kernel_addr_load $kernel_addr $kernel_size && " \
- "nand read $ramdisk_addr_r $ramdisk_addr $ramdisk_size &&" \
- "nand read $fdt_addr_r $fdt_addr $fdt_size &&" \
- "run boot_common\0" \
- "tftpboot=tftpboot $kernel_addr_load $bootfile && " \
- "tftpboot $ramdisk_addr_r $ramdisk_file &&" \
+ "tftpboot=tftpboot $kernel_addr_r $bootfile && " \
"tftpboot $fdt_addr_r $fdtfile &&" \
+ "tftpboot $ramdisk_addr_r $ramdisk_file &&" \
+ "setenv ramdisk_addr_r $ramdisk_addr_r:$filesize &&" \
"run boot_common\0" \
"__nfsboot=tftpboot $kernel_addr_load $bootfile && " \
"tftpboot $fdt_addr_r $fdtfile &&" \
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"initrd_high=0xffffffffffffffff\0" \
+ "scriptaddr=0x85000000\0" \
"nor_base=0x42000000\0" \
"sramupdate=setexpr tmp_addr $nor_base + 0x50000 &&" \
"tftpboot $tmp_addr $second_image && " \
"tftpboot $third_image && " \
"usb write $loadaddr 100 f00\0" \
BOOT_IMAGES \
- LINUXBOOT_ENV_SETTINGS
+ LINUXBOOT_ENV_SETTINGS \
+ BOOTENV
#define CONFIG_SYS_BOOTMAPSZ 0x20000000
int fdt_fixup_nor_flash_size(void *blob);
+struct node_info;
#if defined(CONFIG_FDT_FIXUP_PARTITIONS)
-void fdt_fixup_mtdparts(void *fdt, void *node_info, int node_info_size);
+void fdt_fixup_mtdparts(void *fdt, const struct node_info *node_info,
+ int node_info_size);
#else
-static inline void fdt_fixup_mtdparts(void *fdt, void *node_info,
- int node_info_size) {}
+static inline void fdt_fixup_mtdparts(void *fdt,
+ const struct node_info *node_info,
+ int node_info_size)
+{
+}
#endif
void fdt_del_node_and_alias(void *blob, const char *alias);
* mode = MTD_OPS_PLACE_OOB or MTD_OPS_RAW)
* @datbuf: data buffer - if NULL only oob data are read/written
* @oobbuf: oob data buffer
- *
- * Note, it is allowed to read more than one OOB area at one go, but not write.
- * The interface assumes that the OOB write requests program only one page's
- * OOB area.
*/
struct mtd_oob_ops {
unsigned int mode;
list[n++] = ep;
- totlen += strlen(ep->key) + 2;
+ totlen += strlen(ep->key);
if (sep == '\0') {
totlen += strlen(ep->data);
return (-1);
}
} else {
- size = totlen + 1;
+ size = totlen;
}
/* Check if the user provided a buffer */
CONFIG_SPL_RELOC_MALLOC_ADDR
CONFIG_SPL_RELOC_MALLOC_SIZE
CONFIG_SPL_RELOC_STACK
-CONFIG_SPL_RELOC_STACK_SIZE
CONFIG_SPL_RELOC_TEXT_BASE
CONFIG_SPL_SATA_BOOT_DEVICE
CONFIG_SPL_SIZE
struct menu *menu;
const char *basename;
const char *str;
- char dirname[PATH_MAX+1], tmpname[PATH_MAX+1], newname[PATH_MAX+1];
+ char dirname[PATH_MAX+1], tmpname[PATH_MAX+22], newname[PATH_MAX+8];
char *env;
dirname[0] = 0;
typename = genimg_get_type_short_name(params->fit_image_type);
snprintf(str, sizeof(str), "%s-1", typename);
fdt_begin_node(fdt, str);
- fdt_property_string(fdt, "description", params->imagename);
- fdt_property_string(fdt, "type", typename);
- fdt_property_string(fdt, "arch",
+ fdt_property_string(fdt, FIT_DESC_PROP, params->imagename);
+ fdt_property_string(fdt, FIT_TYPE_PROP, typename);
+ fdt_property_string(fdt, FIT_ARCH_PROP,
genimg_get_arch_short_name(params->arch));
- fdt_property_string(fdt, "os", genimg_get_os_short_name(params->os));
- fdt_property_string(fdt, "compression",
+ fdt_property_string(fdt, FIT_OS_PROP,
+ genimg_get_os_short_name(params->os));
+ fdt_property_string(fdt, FIT_COMP_PROP,
genimg_get_comp_short_name(params->comp));
- fdt_property_u32(fdt, "load", params->addr);
- fdt_property_u32(fdt, "entry", params->ep);
+ fdt_property_u32(fdt, FIT_LOAD_PROP, params->addr);
+ fdt_property_u32(fdt, FIT_ENTRY_PROP, params->ep);
/*
* Put data last since it is large. SPL may only load the first part
* of the DT, so this way it can access all the above fields.
*/
- ret = fdt_property_file(params, fdt, "data", params->datafile);
+ ret = fdt_property_file(params, fdt, FIT_DATA_PROP, params->datafile);
if (ret)
return ret;
fdt_end_node(fdt);
fdt_begin_node(fdt, str);
get_basename(str, sizeof(str), cont->fname);
- fdt_property_string(fdt, "description", str);
- ret = fdt_property_file(params, fdt, "data", cont->fname);
+ fdt_property_string(fdt, FIT_DESC_PROP, str);
+ ret = fdt_property_file(params, fdt, FIT_DATA_PROP,
+ cont->fname);
if (ret)
return ret;
- fdt_property_string(fdt, "type", typename);
- fdt_property_string(fdt, "arch",
+ fdt_property_string(fdt, FIT_TYPE_PROP, typename);
+ fdt_property_string(fdt, FIT_ARCH_PROP,
genimg_get_arch_short_name(params->arch));
- fdt_property_string(fdt, "compression",
+ fdt_property_string(fdt, FIT_COMP_PROP,
genimg_get_comp_short_name(IH_COMP_NONE));
fdt_end_node(fdt);
}
if (params->fit_ramdisk) {
fdt_begin_node(fdt, FIT_RAMDISK_PROP "-1");
- fdt_property_string(fdt, "type", FIT_RAMDISK_PROP);
- fdt_property_string(fdt, "os", genimg_get_os_short_name(params->os));
+ fdt_property_string(fdt, FIT_TYPE_PROP, FIT_RAMDISK_PROP);
+ fdt_property_string(fdt, FIT_OS_PROP,
+ genimg_get_os_short_name(params->os));
- ret = fdt_property_file(params, fdt, "data", params->fit_ramdisk);
+ ret = fdt_property_file(params, fdt, FIT_DATA_PROP,
+ params->fit_ramdisk);
if (ret)
return ret;
int upto;
fdt_begin_node(fdt, "configurations");
- fdt_property_string(fdt, "default", "conf-1");
+ fdt_property_string(fdt, FIT_DEFAULT_PROP, "conf-1");
upto = 0;
for (cont = params->content_head; cont; cont = cont->next) {
fdt_begin_node(fdt, str);
get_basename(str, sizeof(str), cont->fname);
- fdt_property_string(fdt, "description", str);
+ fdt_property_string(fdt, FIT_DESC_PROP, str);
typename = genimg_get_type_short_name(params->fit_image_type);
snprintf(str, sizeof(str), "%s-1", typename);
return ret;
fdt_finish_reservemap(fdt);
fdt_begin_node(fdt, "");
- fdt_property_strf(fdt, "description",
+ fdt_property_strf(fdt, FIT_DESC_PROP,
"%s image with one or more FDT blobs",
genimg_get_type_name(params->fit_image_type));
fdt_property_strf(fdt, "creator", "U-Boot mkimage %s", PLAIN_VERSION);
const char *data;
int len;
- data = fdt_getprop(fdt, node, "data", &len);
+ data = fdt_getprop(fdt, node, FIT_DATA_PROP, &len);
if (!data)
continue;
memcpy(buf + buf_ptr, data, len);
debug("Extracting data size %x\n", len);
- ret = fdt_delprop(fdt, node, "data");
+ ret = fdt_delprop(fdt, node, FIT_DATA_PROP);
if (ret) {
ret = -EPERM;
goto err_munmap;
}
if (params->external_offset > 0) {
/* An external offset positions the data absolutely. */
- fdt_setprop_u32(fdt, node, "data-position",
+ fdt_setprop_u32(fdt, node, FIT_DATA_POSITION_PROP,
params->external_offset + buf_ptr);
} else {
- fdt_setprop_u32(fdt, node, "data-offset", buf_ptr);
+ fdt_setprop_u32(fdt, node, FIT_DATA_OFFSET_PROP,
+ buf_ptr);
}
- fdt_setprop_u32(fdt, node, "data-size", len);
+ fdt_setprop_u32(fdt, node, FIT_DATA_SIZE_PROP, len);
buf_ptr += (len + 3) & ~3;
}
projects / project / bcm63xx / u-boot.git / commitdiff