arm: meson: Add supplementary ethernet registers definitions
authorNeil Armstrong <narmstrong@baylibre.com>
Wed, 18 Oct 2017 08:02:11 +0000 (10:02 +0200)
committerTom Rini <trini@konsulko.com>
Fri, 17 Nov 2017 12:44:13 +0000 (07:44 -0500)
On Amlogic Meson GXL/GXM, supplementary ethernet configuration registers
were added to configure the internal RMII PHY interface.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
arch/arm/include/asm/arch-meson/gxbb.h

index ce41349792bd1ea7bdbd8c94e895def0dceb715a..74d5290340632b8a8e1c6907398de6fae45b53a4 100644 (file)
 
 #define GXBB_ETH_REG_0         GXBB_PERIPHS_ADDR(0x50)
 #define GXBB_ETH_REG_1         GXBB_PERIPHS_ADDR(0x51)
+#define GXBB_ETH_REG_2         GXBB_PERIPHS_ADDR(0x56)
+#define GXBB_ETH_REG_3         GXBB_PERIPHS_ADDR(0x57)
 
 #define GXBB_ETH_REG_0_PHY_INTF                BIT(0)
 #define GXBB_ETH_REG_0_TX_PHASE(x)     (((x) & 3) << 5)
 #define GXBB_ETH_REG_0_TX_RATIO(x)     (((x) & 7) << 7)
 #define GXBB_ETH_REG_0_PHY_CLK_EN      BIT(10)
+#define GXBB_ETH_REG_0_INVERT_RMII_CLK BIT(11)
 #define GXBB_ETH_REG_0_CLK_EN          BIT(12)
 
 /* HIU registers */