--- /dev/null
+--- linux-6.1.81/arch/riscv/boot/dts/starfive/jh7110-visionfive2-mars-common.dtsi 2024-03-17 23:09:19.579452786 +0100
++++ linux-6.1.81/arch/riscv/boot/dts/starfive.new/jh7110-visionfive2-mars-common.dtsi 2024-03-16 19:00:10.382139562 +0100
+@@ -210,6 +210,21 @@
+ status = "okay";
+ };
+
++&pcie0 {
++ pinctrl-names = "default";
++ reset-gpios = <&sysgpio 26 GPIO_ACTIVE_LOW>;
++ phys = <&pciephy0>;
++ status = "okay";
++};
++
++&pcie1 {
++ pinctrl-names = "default";
++ reset-gpios = <&sysgpio 28 GPIO_ACTIVE_LOW>;
++ phys = <&pciephy1>;
++ status = "okay";
++};
++
++
+ &qspi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -401,6 +416,52 @@
+ slew-rate = <0>;
+ };
+ };
++
++ pcie0_wake_default: pcie0_wake_default {
++ wake-pins {
++ pinmux = <GPIOMUX(32, GPOUT_HIGH, GPOEN_ENABLE, GPI_NONE)>;
++ bias-disable;
++ drive-strength = <2>;
++ input-enable;
++ input-schmitt-disable;
++ slew-rate = <0>;
++ };
++ };
++
++ pcie0_clkreq_default: pcie0_clkreq_default {
++ clkreq-pins {
++ bias-disable;
++ pinmux = <GPIOMUX(27, GPOUT_HIGH, GPOEN_ENABLE, GPI_NONE)>;
++ drive-strength = <2>;
++ input-enable;
++ input-schmitt-disable;
++ slew-rate = <0>;
++ };
++ };
++
++ pcie1_wake_default: pcie1_wake_default {
++ wake-pins {
++ bias-disable;
++ pinmux = <GPIOMUX(21, GPOUT_HIGH, GPOEN_ENABLE, GPI_NONE)>;
++ drive-strength = <2>;
++ input-enable;
++ input-schmitt-disable;
++ slew-rate = <0>;
++ };
++ };
++
++ pcie1_clkreq_default: pcie1_clkreq_default {
++ clkreq-pins {
++ bias-disable;
++ pinmux = <GPIOMUX(29, GPOUT_HIGH, GPOEN_ENABLE, GPI_NONE)>;
++ drive-strength = <2>;
++ input-enable;
++ input-schmitt-disable;
++ slew-rate = <0>;
++ };
++ };
++
++
+ };
+
+ &uart0 {