From: Gabor Juhos Date: Mon, 7 Jan 2013 14:43:21 +0000 (+0000) Subject: AA: ar71xx: disable PHY_SWAP and PHY_ADDR_SWAP bits on TL-WR703N/MR3020/MR3040/MR11U... X-Git-Url: http://git.openwrt.org/?a=commitdiff_plain;h=2d7e5714027dbf6e9019fd70d1f0a5ed2815f3e5;p=openwrt%2Fsvn-archive%2Farchive.git AA: ar71xx: disable PHY_SWAP and PHY_ADDR_SWAP bits on TL-WR703N/MR3020/MR3040/MR11U boards Backport of r35037. The PHY_SWAP and PHY_ADDR_SWAP bits are initialized differently by different versions of the bootloader. This leads to broken ethernet connection with OpenWrt on some boards. Turn both SWAP bits OFF on these boards to make it consistent regardless of the bootloader used. Based on a patch by Michel Stempin . Signed-off-by: Gabor Juhos SVN-Revision: 35038 --- diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr11u.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr11u.c index e13d02e68b..b6bdf9bb61 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr11u.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr11u.c @@ -85,7 +85,8 @@ static void __init common_setup(void) u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - ath79_setup_ar933x_phy4_switch(false, true); + /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ + ath79_setup_ar933x_phy4_switch(false, false); ath79_register_m25p80(&tl_mr11u_flash_data); ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr11u_leds_gpio), @@ -97,7 +98,6 @@ static void __init common_setup(void) ath79_register_mdio(0, 0x0); ath79_register_eth(0); - ath79_eth0_data.phy_mask = BIT(0); ath79_register_wmac(ee, mac); } diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr3020.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr3020.c index e0edbf8d7e..0a9dfbc8a0 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr3020.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr3020.c @@ -100,7 +100,8 @@ static void __init tl_mr3020_setup(void) u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - ath79_setup_ar933x_phy4_switch(false, true); + /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ + ath79_setup_ar933x_phy4_switch(false, false); ath79_register_m25p80(&tl_mr3020_flash_data); ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr3020_leds_gpio), @@ -118,7 +119,6 @@ static void __init tl_mr3020_setup(void) ath79_register_mdio(0, 0x0); ath79_register_eth(0); - ath79_eth0_data.phy_mask = BIT(0); ath79_register_wmac(ee, mac); } diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr703n.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr703n.c index dcd6fec1c2..90342e0b65 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr703n.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr703n.c @@ -62,6 +62,9 @@ static void __init tl_wr703n_setup(void) u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); + /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ + ath79_setup_ar933x_phy4_switch(false, false); + ath79_register_m25p80(&tl_wr703n_flash_data); ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr703n_leds_gpio), tl_wr703n_leds_gpio);