openwrt/staging/wigyori.git
2 years agorealtek: add RTL8231 chip detection
Sander Vanheule [Sat, 20 Nov 2021 19:11:34 +0000 (20:11 +0100)]
realtek: add RTL8231 chip detection

When initialising the driver, check if the RTL8231 chip is actually
present at the specified address. If the READY_CODE value does not match
the expected value, return -ENXIO to fail probing.

This should help users to figure out which address an RTL8231 is
configured to use, if measuring pull-up/-down resistors is not an
option.

On an unsuccesful probe, the driver will log:
    [    0.795364] Probing RTL8231 GPIOs
    [    0.798978] rtl8231_init called, MDIO bus ID: 30
    [    0.804194] rtl8231-gpio rtl8231-gpio: no device found at bus address 30

When a device is found, only the first two lines will be logged:
    [    0.453698] Probing RTL8231 GPIOs
    [    0.457312] rtl8231_init called, MDIO bus ID: 31

Signed-off-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
2 years agorealtek: always require SMI bus ID for RTL8231
Sander Vanheule [Sat, 20 Nov 2021 19:11:33 +0000 (20:11 +0100)]
realtek: always require SMI bus ID for RTL8231

The SMI bus ID for RTL8231 currently defaults to 0, and can be
overridden from the devicetree. However, there is no value check on the
DT-provided value, aside from masking which would only cause value
wrap-around.

Change the driver to always require the "indirect-access-bus-id"
property, as there is no real reason to use 0 as default, and perform a
sanity check on the value when probing. This allows the other parts of
the driver to be simplified a bit.

Signed-off-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
2 years agorealtek: use automatic GPIO numbering for RTL8231
Sander Vanheule [Sat, 20 Nov 2021 19:11:32 +0000 (20:11 +0100)]
realtek: use automatic GPIO numbering for RTL8231

Set the gpio_chip.base to -1 to use automatic GPIO line indexing.
Setting base to 0 or a positive number is deprecated and should not be
used.

Signed-off-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
2 years agorealtek: fix RTL8231 gpio count
Sander Vanheule [Sat, 20 Nov 2021 19:11:31 +0000 (20:11 +0100)]
realtek: fix RTL8231 gpio count

The RTL8231's gpio_chip.ngpio was set to 36, which is the largest valid
GPIO index. Fix the allowed number of GPIOs by setting ngpio to 37, the
actual line count.

Reported-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
2 years agorealtek: rtl83xx-phy: abstract and document PHY features
Daniel Golle [Thu, 10 Feb 2022 20:17:58 +0000 (20:17 +0000)]
realtek: rtl83xx-phy: abstract and document PHY features

Replace magic values with more self-descriptive code now that I start
to understand more about the design of the PHY (and MDIO controller).

Remove one line before reading RTL8214FC internal PHY id which turned
out to be a no-op and can hence safely be removed (confirmed by
INAGAKI Hiroshi[1])

[1]: https://github.com/openwrt/openwrt/commit/df8e6be59a1fbce3f8c6878fe7440a129b1245d6#r66890713

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2 years agorealtek: fix locking issues
Birger Koblitz [Thu, 10 Feb 2022 15:50:31 +0000 (16:50 +0100)]
realtek: fix locking issues

Fixe a coupld of locking issues found by applying lock
debugging to the code.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: switch to use generic MDIO accessor functions
Daniel Golle [Fri, 4 Feb 2022 12:28:37 +0000 (12:28 +0000)]
realtek: switch to use generic MDIO accessor functions

Instead of directly calling SoC-specific functions in order to access
(paged) MII registers or MMD registers, create infrastructure to allow
using the generic phy_*, phy_*_paged and phy_*_mmd functions.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2 years agorealtek: implement Clause-45 MDIO write on rtl931x
Daniel Golle [Tue, 1 Feb 2022 01:49:45 +0000 (01:49 +0000)]
realtek: implement Clause-45 MDIO write on rtl931x

 * Add missing Clause-45 write support for rtl931x
 * Switch to use helper functions in all Clause-45 access functions to
   make the code more readable.
 * More meaningful/unified debugging output (dynamic kprintf)

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2 years agorealtek: backport Clause-45 MDIO helper functions
Daniel Golle [Tue, 1 Feb 2022 01:44:05 +0000 (01:44 +0000)]
realtek: backport Clause-45 MDIO helper functions

Import commit ("c6af53f038aa3 net: mdio: add helpers to extract clause
45 regad and devad fields") from Linux 5.17 to allow making the MDIO
code in the ethernet driver more readable.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2 years agorealtek: add support for port led configuration on RTL93XX
Birger Koblitz [Wed, 2 Feb 2022 06:29:25 +0000 (07:29 +0100)]
realtek: add support for port led configuration on RTL93XX

Using the led-set attribute of a port in the dts we allow configuration
of the port leds. Each led-set is being defined in the led-set configuration
of the .dts, giving a specific configuration to steer the port LEDs via a serial
connection.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Add support for the RTL8221B PHY
Birger Koblitz [Sun, 30 Jan 2022 06:22:21 +0000 (07:22 +0100)]
realtek: Add support for the RTL8221B PHY

The RTL8221B PHY is a newer version of the RTL8226, also supporting
2.5GBit Ethernet. It is found with RTL931X devices such as the
EdgeCore ECS4125-10P

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Add specific PHY polling options to support the Zyxel XGS1250/XGS1210
Birger Koblitz [Sun, 30 Jan 2022 05:20:25 +0000 (06:20 +0100)]
realtek: Add specific PHY polling options to support the Zyxel XGS1250/XGS1210

Both the Aquantia AQR113c and the RTL8226 PHYs in the Zyxel XGS1250 and the
Zyxel XGS1210 require special polling configuration settings in the
RTL930X_SMI_10GPHY_POLLING_REGxx_CFG configuration registers. Set them.
Additionally, for RTL 1GBit phys set the RTL930X_SMI_PRVTE_POLLING_CTRL bits
in the poll mask.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Fix link status detection on RTL9302 for SFP modules
Birger Koblitz [Sun, 23 Jan 2022 11:03:17 +0000 (12:03 +0100)]
realtek: Fix link status detection on RTL9302 for SFP modules

For SFP slots on the RTL9302, the link status is not correctly detected.
Use the link media status instead.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Add RTL931X sub-target
Birger Koblitz [Wed, 19 Jan 2022 17:14:02 +0000 (18:14 +0100)]
realtek: Add RTL931X sub-target

We add the RTL931X sub-target with kernel configuration for
a dual core MIPS InterAptive CPU.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Add HW support for RTL931X for PIE, L2 and STP aging
Birger Koblitz [Wed, 19 Jan 2022 17:08:03 +0000 (18:08 +0100)]
realtek: Add HW support for RTL931X for PIE, L2 and STP aging

We add HW support routines for the RTL931X SoC family for handling
the Packet Inspection Engine, L2 table handling and STP aging.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Store and Restore MC memberships for port enable/disable
Birger Koblitz [Wed, 19 Jan 2022 17:00:44 +0000 (18:00 +0100)]
realtek: Store and Restore MC memberships for port enable/disable

We need to store and restore MC memberships in HW when a port joins or
leaves a bridge as well as when it is enabled or disabled, as these
properties should not change in these situations.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Copy all BPDUs to the kernel
Birger Koblitz [Wed, 19 Jan 2022 14:38:32 +0000 (15:38 +0100)]
realtek: Copy all BPDUs to the kernel

In order to receive STP information at the kernel level, we make sure
that all Bridge Protocol Data Units are copied to the CPU-Port.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Add L2 aging configuration functions for all SoC families
Birger Koblitz [Tue, 18 Jan 2022 19:53:31 +0000 (20:53 +0100)]
realtek: Add L2 aging configuration functions for all SoC families

Instead of a generic L2 aging configuration function with complex
logic, we implement an individual function for all SoC types.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealted: Add DSA bridge offload configuration
Birger Koblitz [Tue, 18 Jan 2022 16:20:30 +0000 (17:20 +0100)]
realted: Add DSA bridge offload configuration

Add functionality to enable or disable L2 learning offload and port flooding
for RTL83XX.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Backport bridge configuration for DSA
Birger Koblitz [Tue, 18 Jan 2022 16:18:43 +0000 (17:18 +0100)]
realtek: Backport bridge configuration for DSA

Adds the DSA API for bridge configuration (flooding, L2 learning,
and aging) offload as found in Linux 5.12 so that we can implement
it in our drivver.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Add Link Aggregation (aka trunking) support
Birger Koblitz [Tue, 18 Jan 2022 13:20:40 +0000 (14:20 +0100)]
realtek: Add Link Aggregation (aka trunking) support

This adds LAG support for all 4 SoC families, including support
ofr the use of different distribution algorithm for the load-
balancing between individual links.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Backport LAG functionality for DSA
Birger Koblitz [Tue, 18 Jan 2022 16:16:48 +0000 (17:16 +0100)]
realtek: Backport LAG functionality for DSA

Add the LAG configuration API for DSA as found in Linux 5.12 so that we
can implement it in the dsa driver.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Cleanup setting inner/outer PVID and Ingress/Egres VLAN filtering
Birger Koblitz [Mon, 17 Jan 2022 20:48:51 +0000 (21:48 +0100)]
realtek: Cleanup setting inner/outer PVID and Ingress/Egres VLAN filtering

Use setting functions instead of register numbers in order to clean up the code.
Also use enums to define inner/outer VLAN types and the filter type.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Add support for ZxXEL XGS1250-12 Switch
Birger Koblitz [Mon, 17 Jan 2022 14:31:43 +0000 (15:31 +0100)]
realtek: Add support for ZxXEL XGS1250-12 Switch

The ZyXEL XGS1250-12 Switch is a 11 + 1 port multi-GBit switch with
8 x 1000BaseT, 3 x 1000/2500/5000/10000BaseT Ethernet ports and
1 SFP+ module slot.

Hardware:
 - RTL9302B SoC
 - Macronix MX25L12833F (16MB flash)
 - Nanja NT5CC64M16GP-1 (128MB DDR3 SDRAM)
 - RTL8231 GPIO extender to control the port LEDs
 - RTL8218D 8x Gigabit PHY
 - Aquantia AQR113c 1/2.5/5/10 Gigabit PHYs
 - SFP+ 10GBit slot

Power is supplied via a 12V 2A standard barrel connector. At the
right side behind the grid is UART serial connector. A Serial
header can be connected to from the outside of the switch trough
the airvents with a standard 2.54mm header.
Pins are from top to bottom Vcc(3.3V), TX, RX and GND. Serial
connection is via 115200 baud, 8N1.

A reset button is accessble through a hole in the front panel

At the time of this commit, all ethernet ports work under OpenWRT,
including the various NBaseT modes, however the 10GBit SFP+ slot is not
supported.

Installation
--------------
* Connect serial as per the layout above. Connection parameters: 115200 8N1.
* Navigate to 'Management' in the OEM web interface and click on 'Firmware upgrade'
  to the left.
* Upload the OpenWrt initramfs image, and wait till the switch reboots.
* Connect to the device through serial and change the U-boot boot command.
  > fw_setenv bootcmd 'rtk network on; boota'
* Reboot, scp the sysupgrade image to /tmp, verify the checksum and flash it:
  > sysupgrade /tmp/openwrt-realtek-rtl930x-zyxel_xgs1250-12-squashfs-sysupgrade.bin
* Upon reboot, you have a functional OpenWrt installation. Leave the bootcmd
  value as is - without 'rtk network on' the switch will fail to initialise
  the network.

Web recovery
------------
The XGS1250-12 has a handy web recovery that will load when U-boot does
not find a bootable kernel. In case you would like to trigger the web
recovery manually, partially overwrite the firmware partition with some
zeroes:

  # dd if=/dev/zero of=/dev/mtd5 bs=1M count=2

If you have serial connected you'll see U-boot will start the web recovery
and print it's listening on 192.168.1.1, but by default it seems to be on
the OEM default IP for the switch - 192.168.1.3. The web recovery only
listens on HTTP (80) and *not* on 443 (HTTPS) unlike the web UI.

Return to stock
---------------
You can flash the ZyXEL firmware images to return to stock:

  # sysupgrade -F -n XGS1250-12_Firmware_V1.00(ABWE.1)C0.bix

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Add RTL930X sub-target
Birger Koblitz [Mon, 17 Jan 2022 14:25:33 +0000 (15:25 +0100)]
realtek: Add RTL930X sub-target

Adds the sub-target for the RTL930X-based routers. Adds an
initial kernel configuration.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Add SDS configuration routines for the RTL93XX platforms
Birger Koblitz [Mon, 17 Jan 2022 12:21:09 +0000 (13:21 +0100)]
realtek: Add SDS configuration routines for the RTL93XX platforms

Adds configuration routines for the internal SerDes of the
RTL930X and RTL931X.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Improve MAC config handling for all SoCs
Birger Koblitz [Mon, 17 Jan 2022 12:19:13 +0000 (13:19 +0100)]
realtek: Improve MAC config handling for all SoCs

Adds a rtl931x_phylink_mac_config for the RTL931X and improve
the handling of the RTL930X phylink configuration. Add separate
handling of the RTL839x since some configurations are different
from the RTL838X.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Add support for detecting RTL9303 SoCs
Birger Koblitz [Sun, 16 Jan 2022 07:34:18 +0000 (08:34 +0100)]
realtek: Add support for detecting RTL9303 SoCs

Adds support for detecting RTL9303 SoCs as found e.g.
in the Ubiquiti USW switch.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Allow PHY-IDs to differ from Port numbers
Birger Koblitz [Sun, 16 Jan 2022 06:03:11 +0000 (07:03 +0100)]
realtek: Allow PHY-IDs to differ from Port numbers

We were using the PHY-ids (the reg entries in the PHY
sections of the .dts) as the port numbers. Now scan the
ports section in the .dts, and use the actual port numbers,
following the phy-handle to the PHY properties.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Use SerDes Information from .dts for phylink config
Birger Koblitz [Thu, 13 Jan 2022 17:48:06 +0000 (18:48 +0100)]
realtek: Use SerDes Information from .dts for phylink config

When a port is brought up, read the SDS-id via the phy_device
for a given port and use this to configure the SDS when it
is brought up.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Remove RTL838X PHY firmware from RTL839X kernel
Birger Koblitz [Wed, 12 Jan 2022 18:52:10 +0000 (19:52 +0100)]
realtek: Remove RTL838X PHY firmware from RTL839X kernel

The RTL839X does not have an internal phy and thus does not need to have any
firmware as part of the kernel, especially not firmware for the RTL838X.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Improve IRQ request in Ethernet driver
Birger Koblitz [Tue, 11 Jan 2022 13:23:23 +0000 (14:23 +0100)]
realtek: Improve IRQ request in Ethernet driver

Improves the IRQ request code by using platform_get_irq() which provides
better error handling.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Adding RTL930X sub-target
Birger Koblitz [Mon, 10 Jan 2022 10:30:47 +0000 (11:30 +0100)]
realtek: Adding RTL930X sub-target

This adds the RTL931X sub-target in the realtek target Makefile.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Use new CEVT timer
Birger Koblitz [Fri, 7 Jan 2022 16:21:29 +0000 (17:21 +0100)]
realtek: Use new CEVT timer

Selects the new CEVT timer for Realtek instead of the previous
timer driver. While we are at it, we explicitily state we do
not use the I2C driver of the RTL9300.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Replace the RTL9300 generic timer with a CEVT timer
Birger Koblitz [Thu, 6 Jan 2022 19:27:01 +0000 (20:27 +0100)]
realtek: Replace the RTL9300 generic timer with a CEVT timer

The RTL9300 has a broken R4K MIPS timer interrupt, however, the
R4K clocksource works. We replace the RTL9300 timer with a
Clock Event Timer (CEVT), which is VSMP aware and can be instantiated
as part of brining a VSMTP cpu up instead of the R4K CEVT source.
For this we place the RTL9300 CEVT timer in arch/mips/kernel
together with other MIPS CEVT timers, initialize the SoC IRQs
from a modified smp-mt.c and instantiate each timer as part
of the MIPS time setup in arch/mips/include/asm/time.h instead
of the R4K CEVT, similarly as is done by other MIPS CEVT timers.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Fix RTL931X Ethernet driver
Birger Koblitz [Sun, 2 Jan 2022 18:12:48 +0000 (19:12 +0100)]
realtek: Fix RTL931X Ethernet driver

Various fixes to enable Ethernet on the RTL931X:
 - Network start and stop sequence for RTL931X HW
 - MDIO access on RTL931X SoC
 - Chip initialization
 - SerDes setup

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Fix Ethernet driver IRQ service routine for SMP
Birger Koblitz [Sat, 1 Jan 2022 13:22:41 +0000 (14:22 +0100)]
realtek: Fix Ethernet driver IRQ service routine for SMP

Do not lock the register structure in IRQ context. It is not
necessary and leads to lockups under SMP load.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: fix RTL839X receive tag decoding
Birger Koblitz [Sat, 1 Jan 2022 13:12:21 +0000 (14:12 +0100)]
realtek: fix RTL839X receive tag decoding

Correct offset in RX tag structure. Correct offload decision flagging.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Add SerDes access functions for RTL931X
Birger Koblitz [Mon, 10 Jan 2022 17:55:24 +0000 (18:55 +0100)]
realtek: Add SerDes access functions for RTL931X

Adds RTL931X SerDes access functions as needed by the Ethernet driver.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Fix RTL931X-specific Ethernet driver functions
Birger Koblitz [Sat, 1 Jan 2022 13:10:20 +0000 (14:10 +0100)]
realtek: Fix RTL931X-specific Ethernet driver functions

Fix the update counter of the RX ring, add SDS access functions
for RTL931X.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: rename rtl838x_reg structure
Birger Koblitz [Sat, 1 Jan 2022 12:52:04 +0000 (13:52 +0100)]
realtek: rename rtl838x_reg structure

Rename the SoC-specific rtl838x_reg structure in the Ethernet
driver to avoid confusion with the structure of the same name
in the DSA driver. New name is: rtl838x_eth_reg

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Fix RTL839x TX CPU-Tag
Birger Koblitz [Fri, 31 Dec 2021 17:39:22 +0000 (18:39 +0100)]
realtek: Fix RTL839x TX CPU-Tag

Setting bits 20 and 23 in a u16 is obviously wrong.
According to https://www.svanheule.net/realtek/cypress/cputag
cpu_tag[2] starts at bit 48 in the cpu-tag structure, so
bit 43 is bit 5 in cpu_tag[2] and bit 40 is bit 8 in
cpu_tag[2].

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Increase zone size for Ethernet driver DMA
Birger Koblitz [Fri, 31 Dec 2021 16:53:40 +0000 (17:53 +0100)]
realtek: Increase zone size for Ethernet driver DMA

Set CONFIG_FORCE_MAX_ZONEORDER setting to 13 to allow larger
contiguous memory allocation for the DMA of the Ethernet
driver. Increase the number of entries in the RX ring
to 300 making use of the larger DMA region now possible for
receiveing packets.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Add support for ZyXEL GS1900-48 Switch
Birger Koblitz [Fri, 31 Dec 2021 11:51:45 +0000 (12:51 +0100)]
realtek: Add support for ZyXEL GS1900-48 Switch

The GS1900-48 is a 48 + 2 port Gigabit L2 switch with 48 gigabit ports.
Hardware:
    RTL8393M SoC
    Macronix MX25l12805D (16MB flash)
    128MB RAM
    6 * RTL8218B external PHY
    2 * RTL8231 GPIO extenders to control the port LEDs, system LED and
    Reset button

2 Uplink ports are SFP cages which support 1000 Base-X mini GBIC modules.

Power is supplied via a 230 volt mains connector.
The board has a hard reset switch SW1, which is is not reachable from the outside.
J4 provides a 12V RS232 serial connector which is connected through U8 to
the 3.3V UART of the RTL8393. Conversion is done by U8, a SIPEX 3232EC.
To connect to the UART, wires can be soldered to R603 (TX)  and R602 (RX).

Installation:
Install the squashfs image via Realtek's original Web-Interface.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Update rtl839x.dtsi for realtek,rtl-intc, new gpio controller remove RTL8231...
Birger Koblitz [Fri, 31 Dec 2021 11:18:05 +0000 (12:18 +0100)]
realtek: Update rtl839x.dtsi for realtek,rtl-intc, new gpio controller remove RTL8231 node

Update the IRQ configuration to work with the new rtl-intc controller.
Also change all KSEG1 addresses in reg = <> of the devics to physical
addresses.

Use the new gpio-otto controller instead of the legacy driver.
Also remove the memory node as this is better put into a device .dts.

Also remove the RTL8231 GPIO controller node from this base file
since the chip might not be found in all Realtek RTL839x devices.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Update RTL838X DTS to new Realtek IRQ controller notation
Birger Koblitz [Thu, 13 Jan 2022 06:23:13 +0000 (07:23 +0100)]
realtek: Update RTL838X DTS to new Realtek IRQ controller notation

Replace the interrupt controller node with the new realtek,rtl-intc
node and change all device interrupts to use the 2 field notation:
interrupts = <[SoC IRQ] [Index to MIPS IRQ]>

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Add VPE support for the IRQ driver
Birger Koblitz [Fri, 31 Dec 2021 10:56:49 +0000 (11:56 +0100)]
realtek: Add VPE support for the IRQ driver

In order to support VSMP, enable support for both VPEs
of the RTL839X and RTL930X SoCs in the irq-realtek-rtl
driver. Add support for IRQ affinity setting.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Add kernel config for RTL839x SoCs
Birger Koblitz [Fri, 31 Dec 2021 10:07:24 +0000 (11:07 +0100)]
realtek: Add kernel config for RTL839x SoCs

Adds a dedicated kernel configuration for RTL839X SoCs
enabling SMP.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Enable Multithreading support in prom.c
Birger Koblitz [Thu, 30 Dec 2021 21:53:55 +0000 (22:53 +0100)]
realtek: Enable Multithreading support in prom.c

Adds Multithreading support functions in prom.c.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Change Platform defines to depend on CONFIG_RTL83XX
Birger Koblitz [Thu, 30 Dec 2021 21:50:47 +0000 (22:50 +0100)]
realtek: Change Platform defines to depend on CONFIG_RTL83XX

In order for the Platform includes to be available on
all sub-targets, make them dependent on CONFIG_RTL83XX.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Optimize kernel configuration for RTL838X
Birger Koblitz [Wed, 29 Dec 2021 21:00:47 +0000 (22:00 +0100)]
realtek: Optimize kernel configuration for RTL838X

The RTL838X SoCs do not use Aquantia PHYs, remove this.
Also the RTL838X uses a high resolution R4K timer.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Create 4 different Realtek Platforms
Birger Koblitz [Wed, 29 Dec 2021 20:54:21 +0000 (21:54 +0100)]
realtek: Create 4 different Realtek Platforms

Creates RTL83XX as a basic kernel config parameter for the
RTL838X, RTL839x, RTL930X and RTL931X platforms with respective
configurations for the SoCs, which are introduced in addition.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Create rtl838x sub-target specific makefiles
Birger Koblitz [Wed, 29 Dec 2021 18:39:26 +0000 (19:39 +0100)]
realtek: Create rtl838x sub-target specific makefiles

Create the RTL838x specific Makefiles. Move CPU-type into
rtl838x.mk as this is specifc to that platform. Add
rtl838x subtarget into main Makefile.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Add initial kernel config for RTL838x sub-target
Birger Koblitz [Tue, 28 Dec 2021 19:06:08 +0000 (20:06 +0100)]
realtek: Add initial kernel config for RTL838x sub-target

Move the generic kernel configs to the rtl838x sub-target.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Add Makefile for RTL839x sub-architecture
Birger Koblitz [Tue, 28 Dec 2021 18:59:20 +0000 (19:59 +0100)]
realtek: Add Makefile for RTL839x sub-architecture

Adds the initial Makefile for the RTL839x sub-architecture.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Set RTL838X sub-target specific properties
Birger Koblitz [Tue, 28 Dec 2021 18:56:59 +0000 (19:56 +0100)]
realtek: Set RTL838X sub-target specific properties

This defines the sub-target specific properties for the RTL838X
sub-target.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Create rtl838x subtarget
Birger Koblitz [Tue, 28 Dec 2021 18:52:39 +0000 (19:52 +0100)]
realtek: Create rtl838x subtarget

mv generic/target.mk to rtl838x/target.mk in order to create
an initial makefile for the rtl838x sub-architecture

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Add support for SFP EEPROM-access over SMBus
Birger Koblitz [Sun, 16 Jan 2022 10:18:38 +0000 (11:18 +0100)]
realtek: Add support for SFP EEPROM-access over SMBus

The EEPROMs on SFP modules are compatible both to I2C as well
as SMBus. However, the kernel so far only supports I2C
access. We add SMBus access routines, because the I2C driver
for the RTL9300 HW only supports that protocol. At the same
time we disable I2C access to PHYs on SFP modules as otherwise
detection of any SFP module would fail. This is not in any
way problematic at this point in time since the RTL93XX
platform so far does not support PHYs on SFP modules.

The patches are copied and rebased version of:
https://bootlin.com/blog/sfp-modules-on-a-board-running-linux/

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Add support for RTL9300/RTL9310 I2C multiplexing
Birger Koblitz [Sat, 11 Dec 2021 19:25:37 +0000 (20:25 +0100)]
realtek: Add support for RTL9300/RTL9310 I2C multiplexing

The RTL9300/RTL9310 I2C controllers have support for 2 independent I2C
masters, each with a fixed SCL pin, that cannot be changed. Each of these
masters can use 8 (RTL9300) or 16 (RTL9310) different pins for SDA.
This multiplexer directly controls the two masters and their shared
IO configuration registers to allow multiplexing between any of these
busses. The two masters cannot be used in parallel as the multiplex
is protected by a standard multiplex lock.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Add support for RTL9300/RTL9310 I2C controller
Birger Koblitz [Sat, 11 Dec 2021 19:14:47 +0000 (20:14 +0100)]
realtek: Add support for RTL9300/RTL9310 I2C controller

This adds support for the RTL9300 and RTL9310 I2C controller.
The controller implements the SMBus protocol for SMBus transfers
over an I2C bus. The driver supports selecting one of the 2 possible
SCL pins and any of the 8 possible SDA pins. Bus speeds of
100kHz (standard speed) and 400kHz (high speed I2C) are supported.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: remove legacy GPIO driver support
Birger Koblitz [Fri, 11 Feb 2022 07:19:19 +0000 (08:19 +0100)]
realtek: remove legacy GPIO driver support

This patch removes support for the legacy GPIO driver, since now
the gpio-otto driver can be used on all platforms

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: Add GPIO support for RTL930X and RTL931X
Birger Koblitz [Mon, 17 Jan 2022 18:32:54 +0000 (19:32 +0100)]
realtek: Add GPIO support for RTL930X and RTL931X

We add support for the RTL930X and RTL931X architectures
in the gpio-realtek-otto.c driver.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2 years agorealtek: drop support for Linux 5.4
Daniel Golle [Sat, 5 Feb 2022 17:14:17 +0000 (17:14 +0000)]
realtek: drop support for Linux 5.4

Drop patches and files for Linux 5.4 now that we've been using 5.10
for a while and support for Linux 5.4 has gone out-of-sync.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2 years agobase-files: Make sure rootfs_data_max is considered
Daniel Golle [Thu, 17 Feb 2022 15:10:00 +0000 (15:10 +0000)]
base-files: Make sure rootfs_data_max is considered

For sysupgrade on NAND/UBI devices there is the U-Boot environment
variable rootfs_data_max which can be used to limit the size of the
rootfs_data volume created on sysupgrade.
This stopped working reliable with recent kernels, probably due to a
race condition when reading the number of free erase blocks from sysfs
just after removing a volume.
Change the script to just try creating rootfs_data with the desired
size and retry with maximum size in case that fails. Hence calculating
the available size in the script can be dropped which works around the
problem.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2 years agolibnetfilter-conntrack: bump to 1.0.9
Stijn Tintel [Wed, 16 Feb 2022 19:09:22 +0000 (21:09 +0200)]
libnetfilter-conntrack: bump to 1.0.9

Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
Acked-by: Jo-Philipp Wich <jo@mein.io>
2 years agoath25: drop Linux 5.4 support
Rui Salvaterra [Thu, 10 Feb 2022 13:35:32 +0000 (13:35 +0000)]
ath25: drop Linux 5.4 support

We've been bumped to 5.10, no need to carry this stuff anymore.

Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
2 years agoramips: fix NAND flash driver ECC bit position mask
Felix Fietkau [Wed, 16 Feb 2022 20:25:13 +0000 (21:25 +0100)]
ramips: fix NAND flash driver ECC bit position mask

The bit position mask was accidentally made too wide, overlapping with the LSB
from the byte position mask. This caused ECC calculation to fail for odd bytes

Signed-off-by: Chad Monroe <chad.monroe@smartrg.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
2 years agokernel: backport fix for initializing skb->cb in the bridge code to 5.4
Felix Fietkau [Wed, 16 Feb 2022 19:32:27 +0000 (20:32 +0100)]
kernel: backport fix for initializing skb->cb in the bridge code to 5.4

Fixes issues with proxyarp

Signed-off-by: Felix Fietkau <nbd@nbd.name>
2 years agobcm4908: backport watchdog and I2C changes
Rafał Miłecki [Wed, 16 Feb 2022 06:56:07 +0000 (07:56 +0100)]
bcm4908: backport watchdog and I2C changes

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
2 years agomt76: update to the latest version
Felix Fietkau [Mon, 14 Feb 2022 14:19:08 +0000 (15:19 +0100)]
mt76: update to the latest version

ddd3c2f38b30 mt76: redefine mt76_for_each_q_rx to adapt mt7986 changes
7fa5229a4228 mt76: improve signal strength reporting
025a72cd2d24 mt76: mt7915: fix injected MPDU transmission to not use HW A-MSDU
8c765fd92d97 mt76: mt7615: introduce SAR support
799a15bb68f9 mt76: fix endianness errors in reverse_frag0_hdr_trans
c114919f0c08 mt76: mt7915: Fix channel state update error issue
93191a37e59a mt76: mt7915: fix potential memory leak of fw monitor packets
cde589b2efb7 mt76: mt7921s: fix missing fc type/sub-type for 802.11 pkts
6ef22f4dc4e4 mt76: mt7915: add support for MT7986
7f1818cd8f2d mt76: mt7915: introduce band_idx in mt7915_phy
1d57a0d506db mt76: mt7915: initialize smps mode in mt7915_mcu_sta_rate_ctrl_tlv()
1f2a4816a3de mt76: mt7615: fix compiler warning on frame size
d60f335e785b mt76: mt7915: fix endianness warnings in mt7915_debugfs_rx_fw_monitor
d0ab636cb61c mt76: mt7915: fix endianness warnings in mt7915_mac_tx_free()
9d9bd7b3c48c mt76: connac: adjust wlan_idx size from u8 to u16
be1091f1172d mt76: mt7615: Fix assigning negative values to unsigned variable
d4fc42889a30 mt76: mt7915: check band idx for bcc event
98ee3e2889ea mt76: mt7915: fix logic error and remove the unused member of mt7915_dev
bbbbafb67bac mt76: mt7915: fix compiler warning
abd80cf68db1 mt76: mt7915: fix the muru tlv issue
a050c14b5631 mt76: mt7915: use min_t() to make code cleaner
9fee8f3736eb mt76: mt7915e: Fix degraded performance after temporary overheat
f2e1a62cf0d0 mt76: mt7915e: Add a hwmon attribute to get the actual throttle state.
c67df0d3130a mt76: mt7915e: Enable thermal management by default

Signed-off-by: Felix Fietkau <nbd@nbd.name>
2 years agomac80211: fix traffic stalls on forwarded mesh packets due to wrong AC selection
Felix Fietkau [Tue, 15 Feb 2022 14:16:31 +0000 (15:16 +0100)]
mac80211: fix traffic stalls on forwarded mesh packets due to wrong AC selection

Signed-off-by: Felix Fietkau <nbd@nbd.name>
2 years agofeeds: use git-src-full to allow Git versioning
Paul Spooren [Mon, 11 Oct 2021 20:47:00 +0000 (10:47 -1000)]
feeds: use git-src-full to allow Git versioning

Both $(AUTORELEASE) and $(PKG_SRC_VERSION) (from luci.git) use the Git
log to determine releases and package timestamps.

Feeds are shallow cloned by default, resulting in an incomplete Git log
and therefore different local package versions than offered upstream.

This commits sets the default feeds to use `src-git-full` to solve that.

Add fixes from "2b1d92f: scripts/feeds: silence git warning by selecting
pull style" to `src-git-full`

Signed-off-by: Paul Spooren <mail@aparcar.org>
2 years agobuild: store source_date_epoch as integer
Paul Spooren [Sun, 29 Aug 2021 03:10:57 +0000 (17:10 -1000)]
build: store source_date_epoch as integer

The value is retreived from a env variable which defaults to be read as
a string. However the SOURCE_DATE_EPOCH is a unix timestamp aka integer.

Fix this to allow downstream tools to parse the value directly.

Signed-off-by: Paul Spooren <mail@aparcar.org>
2 years agokernel: fix a race condition leading to a crash in hw flow offloading
Felix Fietkau [Mon, 14 Feb 2022 12:58:38 +0000 (13:58 +0100)]
kernel: fix a race condition leading to a crash in hw flow offloading

flowtable->net was initialized too late, and this could be triggered even
without hardware offload support on the device

Signed-off-by: Felix Fietkau <nbd@nbd.name>
2 years agokernel: fix copy&paste mistake in bridge offload code
Felix Fietkau [Mon, 14 Feb 2022 11:39:58 +0000 (12:39 +0100)]
kernel: fix copy&paste mistake in bridge offload code

Signed-off-by: Felix Fietkau <nbd@nbd.name>
2 years agoramips: mt7621: do memory detection on KSEG1
Chuanhong Guo [Thu, 10 Feb 2022 15:09:46 +0000 (23:09 +0800)]
ramips: mt7621: do memory detection on KSEG1

It's reported that current memory detection code occasionally detects
larger memory under some bootloaders.
Current memory detection code tests whether address space wraps around
on KSEG0, which is unreliable because it's cached.

Rewrite memory size detection to perform the same test on KSEG1 instead.
While at it, this patch also does the following two things:
1. use a fixed pattern instead of a random function pointer as the magic
   value.
2. add an additional memory write and a second comparison as part of the
   test to prevent possible smaller memory detection result due to
   leftover values in memory.

Fixes: 6d91ddf517 ("ramips: mt7621: add support for memory detection")
Reported-by: Rui Salvaterra <rsalvaterra@gmail.com>
Tested-by: Rui Salvaterra <rsalvaterra@gmail.com>
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2 years agoprocd: simplify uxc init script
Daniel Golle [Sun, 13 Feb 2022 23:26:45 +0000 (23:26 +0000)]
procd: simplify uxc init script

'uxc boot' is inteded to be called multiple times, so there is not need
to guard the first call on boot -- the actual code anyway didn't do
that, so just remove it.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2 years agokernel: remove 640-bridge-only-accept-EAP-locally.patch
Felix Fietkau [Sat, 12 Feb 2022 22:47:38 +0000 (23:47 +0100)]
kernel: remove 640-bridge-only-accept-EAP-locally.patch

The issue of EAP frames sent to group address (or the wrong address) has been
addressed in mac80211, so this hack is no longer needed

Signed-off-by: Felix Fietkau <nbd@nbd.name>
2 years agokernel: add a fast path for the bridge code
Felix Fietkau [Sat, 12 Feb 2022 22:18:51 +0000 (23:18 +0100)]
kernel: add a fast path for the bridge code

This caches flows between MAC addresses on separate ports, including their VLAN
in order to bypass the normal bridge forwarding code.
In my test on MT7622, this reduces LAN->WLAN bridging CPU usage by 6-10%,
potentially even more on weaker platforms

Signed-off-by: Felix Fietkau <nbd@nbd.name>
2 years agotcpdump: Fix CVE-2018-16301
Hauke Mehrtens [Sat, 12 Feb 2022 22:13:47 +0000 (23:13 +0100)]
tcpdump: Fix CVE-2018-16301

This fixes the following security problem:
The command-line argument parser in tcpdump before 4.99.0 has a buffer
overflow in tcpdump.c:read_infile(). To trigger this vulnerability the
attacker needs to create a 4GB file on the local filesystem and to
specify the file name as the value of the -F command-line argument of
tcpdump.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2 years agomac80211: fix rekey failure in drivers with 802.3 decap offload
Felix Fietkau [Sat, 12 Feb 2022 22:03:33 +0000 (23:03 +0100)]
mac80211: fix rekey failure in drivers with 802.3 decap offload

Signed-off-by: Felix Fietkau <nbd@nbd.name>
2 years agofirewall4: update to latest Git HEAD
Jo-Philipp Wich [Fri, 11 Feb 2022 19:41:23 +0000 (20:41 +0100)]
firewall4: update to latest Git HEAD

53caa1a fw4: resolve zone layer 2 devices for hw flow offloading
9fe58f5 fw4: rework and fix family inheritance logic
8795296 tests: mocklib: fix infinite recursion in wrapped print()
281b1bc tests: change mocked wan interface type to PPPoE
93b710d tests: mocklib: forward compatibility change
1a94915 fw4: only stage reflection rules if all required addrs are known
5c21714 fw4: add device iifname/oifname matches to DSCP and MARK rules
3eacc97 tests: adjust 01_ruleset test case to latest changes

Signed-off-by: Jo-Philipp Wich <jo@mein.io>
2 years agoucode: update to latest Git HEAD
Jo-Philipp Wich [Fri, 11 Feb 2022 19:38:35 +0000 (20:38 +0100)]
ucode: update to latest Git HEAD

a29bad9 compiler: fix patchlist corruption on switch statement syntax errors
86f0662 lib: change `ord()` to always return single byte value
116a8ce vallist: fix storing/retrieving short strings with 8bit byte value

Signed-off-by: Jo-Philipp Wich <jo@mein.io>
2 years agokernel: bump 5.10 to 5.10.100
John Audia [Fri, 11 Feb 2022 12:06:23 +0000 (07:06 -0500)]
kernel: bump 5.10 to 5.10.100

All patches automatically rebased.

Build system: x86_64
Build-tested: bcm2711/RPi4B, mt7622/RT3200
Run-tested: bcm2711/RPi4B, mt7622/RT3200

Signed-off-by: John Audia <graysky@archlinux.us>
2 years agokernel: bump 5.10 to 5.10.99
John Audia [Tue, 8 Feb 2022 19:25:03 +0000 (14:25 -0500)]
kernel: bump 5.10 to 5.10.99

Had to update generic defconfig (make kernel_menuconfig CONFIG_TARGET=generic)
for this bump, but since that only modifies the target defined in .config,
and since that target also needed to be updated for unrelated reasons, manually
propagated the newly added symbol to the generic config.

Removed upstreamed:
    pending-5.10/860-Revert-ASoC-mediatek-Check-for-error-clk-pointer.patch[1]

All other patches automatically rebased.

1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.10.99&id=080f371d984e8039c66db87f3c54804b0d172329

Build system: x86_64
Build-tested: bcm2711/RPi4B, mt7622/RT3200
Run-tested: bcm2711/RPi4B, mt7622/RT3200

Signed-off-by: John Audia <graysky@archlinux.us>
2 years agokernel: bump 5.10 to 5.10.98
John Audia [Sun, 6 Feb 2022 16:51:17 +0000 (11:51 -0500)]
kernel: bump 5.10 to 5.10.98

Manually rebased:
bcm27xx/patches-5.10/950-0675-drm-vc4-hdmi-Drop-devm-interrupt-handler-for-CEC-int.patch

All other patches automatically rebased.

Build system: x86_64
Build-tested: bcm2711/RPi4B, mt7622/RT3200
Run-tested: bcm2711/RPi4B, mt7622/RT3200

Signed-off-by: John Audia <graysky@archlinux.us>
2 years agoramips: add support for ELECOM WRC-2533GS2
INAGAKI Hiroshi [Sat, 5 Feb 2022 10:09:11 +0000 (19:09 +0900)]
ramips: add support for ELECOM WRC-2533GS2

ELECOM WRC-2533GS2 is a 2.4/5 GHz band 11ac (Wi-Fi 5) router, based on
MT7621A.

Specification:

- SoC : MediaTek MT7621A
- RAM : DDR3 128 MiB (NT5CC64M16GP-DI)
- Flash : SPI-NOR 16 MiB (MX25L12835FM2I-10G)
- WLAN : 2.4/5GHz 4T4R (2x MediaTek MT7615)
- Ethernet : 10/100/1000 Mbps x5
  - Switch : MediaTek MT7530 (SoC)
- LEDs/Keys : 4x/6x (2x buttons, 1x slide-switch)
- UART : through-hole on PCB
  - J4: 3.3V, GND, TX, RX from ethernet port side
  - 57600n8
- Power : 12 VDC, 1.5 A

Flash instruction using factory image:

1. Boot WRC-2533GS2 normally with "Router" mode
2. Access to "http://192.168.2.1/" and open firmware update page
   ("ファームウェア更新")
3. Select the OpenWrt factory image and click apply ("適用") button
4. Wait ~120 seconds to complete flashing

MAC Addresses:

LAN : 04:AB:18:xx:xx:FB (Factory, 0xFFF4 (hex))
WAN : 04:AB:18:xx:xx:FC (Factory, 0xFFFA (hex))
2.4 GHz : 04:AB:18:xx:xx:FD (Factory, 0x4    (hex))
5 GHz : 04:AB:18:xx:xx:FE (Factory, 0x8004 (hex))

Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
2 years agoramips: move MAC configs to device dts from wrc-gs-2pci.dtsi
INAGAKI Hiroshi [Sat, 5 Feb 2022 09:57:14 +0000 (18:57 +0900)]
ramips: move MAC configs to device dts from wrc-gs-2pci.dtsi

The locations of MAC addresses in mtd for LAN/WAN on ELECOM WRC-2533GS2
are changed from the other WRC-GS/GST devices with 2x PCIe. So move the
related configurations in mt7621_elecom_wrc-gs-2pci.dtsi to dts of each
model.

- WRC-1750GS
- WRC-1750GSV
- WRC-1750GST2
- WRC-1900GST
- WRC-2533GST
- WRC-2533GST2

  -> LAN: 0xE000, WAN: 0xE006

- WRC-2533GS2

  -> LAN: 0xFFF4, WAN: 0xFFFA

Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
2 years agoramips: update WLAN MAC address of ipTIME A3004T
Sungbo Eo [Sun, 30 Jan 2022 23:38:16 +0000 (08:38 +0900)]
ramips: update WLAN MAC address of ipTIME A3004T

Reported MAC addresses:

| interface |    MAC address    |     source     | comment
|-----------|-------------------|----------------|---------
|       LAN | 90:xx:xx:18:xx:1F |                | [1]
|       WAN | 90:xx:xx:18:xx:1D |                |
|   WLAN 2G | 92:xx:xx:48:xx:1C |                |
|   WLAN 5G | 90:xx:xx:18:xx:1C | factory 0x4    |
|           | 90:xx:xx:18:xx:1C | config ethaddr |

[1] Used in this patch as WLAN 2G MAC address with the local bit set

Signed-off-by: Sungbo Eo <mans0n@gorani.run>
2 years agoramips: add support for ipTIME AX2004M
Sungbo Eo [Sat, 29 Jan 2022 14:25:32 +0000 (23:25 +0900)]
ramips: add support for ipTIME AX2004M

ipTIME AX2004M is an 802.11ax (Wi-Fi 6) router, based on MediaTek
MT7621A.

Specifications:
* SoC: MT7621A
* RAM: 256 MiB
* Flash: NAND 128 MiB
* Wi-Fi:
  * MT7915D: 2.4/5 GHz (DBDC)
* Ethernet: 5x 1GbE
  * Switch: SoC built-in
* USB: 1x 3.0
* UART: J4 (115200 baud)
  * Pinout: [3V3] (TXD) (RXD) (GND)

MAC addresses:

| interface |    MAC address    |     source     | comment
|-----------|-------------------|----------------|---------
|       LAN | 58:xx:xx:00:xx:9B |                | [1]
|       WAN | 58:xx:xx:00:xx:99 |                |
|   WLAN 2G | 58:xx:xx:00:xx:98 | factory 0x4    |
|   WLAN 5G | 5A:xx:xx:40:xx:98 |                |
|           | 58:xx:xx:00:xx:98 | config ethaddr |

[1] Used in this patch as WLAN 5G MAC address with the local bit set

Load addresses:
* stock
  * 0x80010000: FIT image
  * 0x81001000: kernel image -> entry
* OpenWrt
  * 0x80010000: FIT image
  * 0x82000000: uncompressed kernel+relocate image
  * 0x80001000: relocated kernel image -> entry

Notes:
* This device has a dual-boot partition scheme, but this firmware works
  only on boot partition 1. The stock web interface will flash only on the
  inactive boot partition, but the recovery web page will always flash on
  boot partition 1.

Installation via recovery mode:
1.  Press reset button, power up the device, wait >10s for CPU LED
    to stop blinking.
2.  Upload recovery image through the recovery web page at 192.168.0.1.

Revert to stock firmware:
1.  Install stock image via recovery mode.

Signed-off-by: Sungbo Eo <mans0n@gorani.run>
2 years agoocteon: switch to Kernel 5.10
Paul Spooren [Thu, 30 Sep 2021 05:23:45 +0000 (19:23 -1000)]
octeon: switch to Kernel 5.10

Acked-by: Stijn Tintel <stijn@linux-ipv6.be>
Signed-off-by: Paul Spooren <mail@aparcar.org>
2 years agotarget/linux: add missing symbol
Rosen Penev [Sat, 29 Jan 2022 22:49:04 +0000 (14:49 -0800)]
target/linux: add missing symbol

Found when building the qoriq target.

Signed-off-by: Rosen Penev <rosenp@gmail.com>
2 years agotools/cmake: add MAKE config variable
Rosen Penev [Thu, 10 Feb 2022 01:15:14 +0000 (17:15 -0800)]
tools/cmake: add MAKE config variable

Makes sure that Ninja from staging_dir is used and nowhere else.

Reported by reproducible builds project. Builds have been failing ever
since tools/cmake started using Ninja.

Signed-off-by: Rosen Penev <rosenp@gmail.com>
2 years agoqosify: update to the latest version
Felix Fietkau [Thu, 10 Feb 2022 20:07:47 +0000 (21:07 +0100)]
qosify: update to the latest version

e230e71e0a12 map: fix copy-paste error in codepoints map
580d2ccf89f3 bpf: declare tcp_ports/udp_ports without typedef
8d6c19a81f3f ubus: fix a use-after-free bug

Signed-off-by: Felix Fietkau <nbd@nbd.name>
2 years agomt7622: linksys-e8450: enable using mt7531 switch irq
Daniel Golle [Thu, 10 Feb 2022 14:12:45 +0000 (14:12 +0000)]
mt7622: linksys-e8450: enable using mt7531 switch irq

Turns out the MT7531 switch IRQ line is connected to GPIO#53 just like
on the BPi-R64, so this seems to be part of the reference design and
will probably apply to most MT7622+MT7531 boards.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2 years agomt7622: bpi-r64: enable using mt7531 switch irq
Daniel Golle [Thu, 10 Feb 2022 13:48:10 +0000 (13:48 +0000)]
mt7622: bpi-r64: enable using mt7531 switch irq

Now that we support link-state-change interrupts, wire up MT7531 IRQ
line which is connected to GPIO#53 according to the schematics [1].

As a result, PHY state no longer needs to be polled on that board.

[1]: https://forum.banana-pi.org/t/bpi-r64-mt7622-schematic-diagram-public/10118
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2 years agokernel: backport MT7530 IRQ support
DENG Qingfang [Thu, 10 Feb 2022 05:59:46 +0000 (13:59 +0800)]
kernel: backport MT7530 IRQ support

Support MT7530 PHY link change interrupts, and enable for MT7621.

For external MT7530, a GPIO IRQ line is required, which is
board-specific, so it should be added to each DTS. In case the
interrupt-controller property is missing, it will fall back to
polling mode.

Signed-off-by: DENG Qingfang <dqfext@gmail.com>
2 years agoath25: switch to 5.10 Kernel
Paul Spooren [Mon, 27 Dec 2021 21:10:45 +0000 (22:10 +0100)]
ath25: switch to 5.10 Kernel

Tested-by: Chuanhong Guo <gch981213@gmail.com>
Signed-off-by: Paul Spooren <mail@aparcar.org>
2 years agokernel: backport MediaTek Ethernet PHY driver
DENG Qingfang [Thu, 3 Feb 2022 12:07:04 +0000 (20:07 +0800)]
kernel: backport MediaTek Ethernet PHY driver

Add support for MediaTek Gigabit Ethernet PHYs found in MT7530 and
MT7531. Fix some link up/down issues.
The errornous check for the PHY mode which broke things with MT7531
has been removed as suggested by patch
 net: phy: mediatek: remove PHY mode check on MT7531
As a result, things are working fine now on MT7622+MT7531 as well.

Signed-off-by: DENG Qingfang <dqfext@gmail.com>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Tested-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
2 years agometa: drop issue_template
Jo-Philipp Wich [Wed, 9 Feb 2022 16:26:58 +0000 (17:26 +0100)]
meta: drop issue_template

The contents do not apply anymore now that the switch to Github issue
has been decided.

Signed-off-by: Jo-Philipp Wich <jo@mein.io>