project/bcm63xx/u-boot.git
5 years agoMerge branch 'master' of git://git.denx.de/u-boot-socfpga
Tom Rini [Mon, 10 Dec 2018 12:15:41 +0000 (07:15 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga

5 years agoMerge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Mon, 10 Dec 2018 12:15:12 +0000 (07:15 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-usb

- DWC3 and UDC cleanup

5 years agoMerge git://git.denx.de/u-boot-x86
Tom Rini [Mon, 10 Dec 2018 12:14:48 +0000 (07:14 -0500)]
Merge git://git.denx.de/u-boot-x86

- Enable RTC for Intel Tangier
- Wrap the call to 8259 PIC with Kconfig options for old targets without
  8259
- Warp the call to USB init with Kconfg options for coreboot & EFI
  payload

5 years agoefi: payload: only init usb if necessary
Bin Meng [Fri, 30 Nov 2018 04:07:13 +0000 (20:07 -0800)]
efi: payload: only init usb if necessary

Up until now the call to initialize the USB subsystem was hardcoded
for U-Boot running as an EFI payload. This was used to enable the
use of a USB keyboard in the U-Boot shell. However not all boards
might need this functionality. As initializing the USB subsystem can
take a considerable amount of time (several seconds on some boards),
we now initialize the USB subsystem only if U-Boot is configured to
use USB keyboards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
5 years agocoreboot: only init usb if necessary
Thomas RIENOESSL [Fri, 30 Nov 2018 04:07:12 +0000 (20:07 -0800)]
coreboot: only init usb if necessary

Up until now the call to initialize the USB subsystem was hardcoded
for U-Boot running as a coreboot payload. This was used to enable
the use of a USB keyboard in the U-Boot shell. However not all boards
might need this functionality. As initializing the USB subsystem can
take a considerable amount of time (several seconds on some boards),
we now initialize the USB subsystem only if U-Boot is configured to
use USB keyboards.

Signed-off-by: Thomas RIENOESSL <thomas.rienoessl@bachmann.info>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
5 years agox86: kconfig: Allow board defconfig file to disable 8259 and APIC
Bin Meng [Fri, 30 Nov 2018 03:57:22 +0000 (19:57 -0800)]
x86: kconfig: Allow board defconfig file to disable 8259 and APIC

At present the Kconfig options (CONFIG_I8259_PIC and CONFIG_APIC)
do not include a prompt message, which makes it impossible to
be disabled from a board defconfig file.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agox86: Wrap calls to 8259 with CONFIG_I8259_PIC
Bin Meng [Fri, 30 Nov 2018 03:57:21 +0000 (19:57 -0800)]
x86: Wrap calls to 8259 with CONFIG_I8259_PIC

mask_irq(), unmask_irq() and specific_eoi() are provided by the
i8259 PIC driver and should be wrapped with CONFIG_I8259_PIC.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
5 years agox86: make the LAPIC / IOAPIC construct switchable with Kconfig
Hannes Schmelzer [Sun, 18 Nov 2018 22:19:43 +0000 (23:19 +0100)]
x86: make the LAPIC / IOAPIC construct switchable with Kconfig

There are still systems running which do not have any LAPIC or even
IOAPIC. Responsible MSRs for those do not exist and the systems are
crashing on trying to setup LAPIC.

This commit makes the APIC stuff able to switch off for those boards
which dont' have an LAPIC / IOAPIC.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agox86: acpi: Fix indentation in Intel Tangier ASL code
Andy Shevchenko [Sat, 10 Nov 2018 15:37:02 +0000 (17:37 +0200)]
x86: acpi: Fix indentation in Intel Tangier ASL code

Make the indentation aligned with what used elsewhere in U-Boot.

No functional change intended.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agox86: acpi: Enable RTC for Intel Tangier
Andy Shevchenko [Sat, 10 Nov 2018 15:37:01 +0000 (17:37 +0200)]
x86: acpi: Enable RTC for Intel Tangier

Intel Tangier SoC has RTC inside. So, enable it in ACPI.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agoARM: mvebu: restore license information in mv_ddr_plat.{c,h}
Chris Packham [Sun, 9 Dec 2018 21:41:15 +0000 (10:41 +1300)]
ARM: mvebu: restore license information in mv_ddr_plat.{c,h}

This was unintentionally removed when syncing with upstream.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
5 years agoMerge git://git.denx.de/u-boot-marvell
Tom Rini [Sun, 9 Dec 2018 13:40:49 +0000 (08:40 -0500)]
Merge git://git.denx.de/u-boot-marvell

- Sync DDR training with Marvell code for Armada 38x by Chris
- Misc updates to Armada 38x Helios4 board by Aditya

5 years agoRoll CRC16-CCITT into the hash infrastructure
Philipp Tomsich [Sun, 25 Nov 2018 18:22:19 +0000 (19:22 +0100)]
Roll CRC16-CCITT into the hash infrastructure

The CRC16-CCITT checksum function is useful for space-constrained
applications (such as obtaining a checksum across a 2KBit or 4KBit
EEPROM) in boot applications. It has not been accessible from boot
scripts until now (due to not having a dedicated command and not being
supported by the hash infrstructure) limiting its applicability
outside of custom commands.

This adds the CRC16-CCITT (poly 0x1021, init 0x0) algorithm to the
list of available hashes and adds a new crc16_ccitt_wd_buf() to make
this possible.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[trini: Fix building crc16.o for SPL/TPL]
Signed-off-by: Tom Rini <trini@konsulko.com>
5 years agolib: merge CRC16-CCITT into u-boot/crc.h
Philipp Tomsich [Sun, 25 Nov 2018 18:22:18 +0000 (19:22 +0100)]
lib: merge CRC16-CCITT into u-boot/crc.h

This merges the CRC16-CCITT headers into u-boot/crc.h to prepare for
rolling CRC16 into the hash infrastructure.  Given that CRC8, CRC32
and CRC32-C already have their prototypes in a single header file, it
seems a good idea to also include CRC16-CCITT in the same.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agoarm: mvebu: helios4: Reset uSOM onboard phy during board init
Aditya Prayoga [Tue, 4 Dec 2018 16:57:25 +0000 (00:57 +0800)]
arm: mvebu: helios4: Reset uSOM onboard phy during board init

Similar to Clearfog rev 2.1, GPIO 19 also used to reset onboard ethernet
PHY.

This patch depend on
net: mvneta: Add GPIO configuration support
[URL: https://patchwork.ozlabs.org/patch/1007736/]

Signed-off-by: Aditya Prayoga <aditya@kobol.io>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-By: Dennis Gilmore <dgilmore@redhat.com>
Reviewed-By: Dennis Gilmore <dgilmore@redhat.com>
Signed-off-by: Stefan Roese <sr@denx.de>
5 years agoarm: mvebu: helios4: Enable SPI flash support
Aditya Prayoga [Tue, 4 Dec 2018 16:57:24 +0000 (00:57 +0800)]
arm: mvebu: helios4: Enable SPI flash support

Enable SPI flash support under U-Boot and SPL. The ENV size and offset,
ported from U-Boot 2013.01 Marvell version: 2015_T1.0p16

To create U-Boot image for SPI flash, user would need to replace
* CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC with CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI
* CONFIG_ENV_IS_IN_MMC with CONFIG_ENV_IS_IN_SPI_FLASH

Signed-off-by: Aditya Prayoga <aditya@kobol.io>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-By: Dennis Gilmore <dgilmore@redhat.com>
Reviewed-By: Dennis Gilmore <dgilmore@redhat.com>
Signed-off-by: Stefan Roese <sr@denx.de>
5 years agoarm: mvebu: helios4: Reduce U-Boot image size
Aditya Prayoga [Tue, 4 Dec 2018 16:57:23 +0000 (00:57 +0800)]
arm: mvebu: helios4: Reduce U-Boot image size

Remove unused I2C support in SPL and use simple_malloc functions to
reduce SPL image size.
Since Helios4 does not have any PCIe allocated on SerDes, remove PCI
support. MTD layer on top of SPI flash is not needed, remove it also.

Signed-off-by: Aditya Prayoga <aditya@kobol.io>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-By: Dennis Gilmore <dgilmore@redhat.com>
Reviewed-By: Dennis Gilmore <dgilmore@redhat.com>
Signed-off-by: Stefan Roese <sr@denx.de>
5 years agoarm: mvebu: helios4: Enable mvebu GPIO
Aditya Prayoga [Tue, 4 Dec 2018 16:57:22 +0000 (00:57 +0800)]
arm: mvebu: helios4: Enable mvebu GPIO

Make use of U-Boot's GPIO DM to control native GPIO and I2C IO expander.

Signed-off-by: Aditya Prayoga <aditya@kobol.io>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-By: Dennis Gilmore <dgilmore@redhat.com>
Reviewed-By: Dennis Gilmore <dgilmore@redhat.com>
Signed-off-by: Stefan Roese <sr@denx.de>
5 years agoarm: mvebu: helios4: Enable I2C and IO Expander
Aditya Prayoga [Tue, 4 Dec 2018 16:57:21 +0000 (00:57 +0800)]
arm: mvebu: helios4: Enable I2C and IO Expander

Enable Marvell I2C driver and I2C IO expander. Set default bus to
external I2C bus. Define I2C aliases in device tree so it can be
recognized by the driver.

Signed-off-by: Aditya Prayoga <aditya@kobol.io>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-By: Dennis Gilmore <dgilmore@redhat.com>
Reviewed-By: Dennis Gilmore <dgilmore@redhat.com>
Signed-off-by: Stefan Roese <sr@denx.de>
5 years agoarm: mvebu: helios4: mmc: move environment before 1M
Aditya Prayoga [Tue, 4 Dec 2018 16:57:20 +0000 (00:57 +0800)]
arm: mvebu: helios4: mmc: move environment before 1M

Store the environment before 1M into the block device.
This constant is easier to remember, saves a little space,
and is in line with what SolidRun's 2018.01-based fork does for the
clearfog.

Signed-off-by: Josua Mayer <josua.mayer97@gmail.com>
[ Aditya Prayoga:
* Port forward]
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-By: Dennis Gilmore <dgilmore@redhat.com>
Reviewed-By: Dennis Gilmore <dgilmore@redhat.com>
Signed-off-by: Stefan Roese <sr@denx.de>
5 years agoARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02
Chris Packham [Mon, 3 Dec 2018 01:26:49 +0000 (14:26 +1300)]
ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02

This syncs drivers/ddr/marvell/a38x/ with the mv_ddr-armada-18.09 branch
of https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git.
Specifically this syncs with commit 99d772547314 ("Bump mv_ddr to
release armada-18.09.2").

The complete log of changes is best obtained from the mv-ddr-marvell.git
repository but some relevant highlights are:

  ddr3: add missing txsdll parameter
  ddr3: fix tfaw timimg parameter
  ddr3: fix trrd timimg parameter
  merge ddr3 topology header file with mv_ddr_topology one
  mv_ddr: a38x: fix zero memory size scrubbing issue

The upstream code is incorporated omitting the portions not relevant to
Armada-38x and DDR3. After that a semi-automated step is used to drop
unused features with unifdef

    find drivers/ddr/marvell/a38x/ -name '*.[ch]' | \
        xargs unifdef -m -UMV_DDR -UMV_DDR_ATF -UCONFIG_DDR4 \
                 -UCONFIG_APN806 -UCONFIG_MC_STATIC \
                 -UCONFIG_MC_STATIC_PRINT -UCONFIG_PHY_STATIC \
                 -UCONFIG_64BIT -UCONFIG_A3700 -UA3900 -UA80X0 \
                 -UA70X0

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
5 years agoMerge branch 'master' of git://git.denx.de/u-boot-sunxi
Tom Rini [Sat, 8 Dec 2018 00:02:01 +0000 (19:02 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-sunxi

- Various axp209 fixes
- Fixes for OLinuXino-A20-Lime2 / OLinuXino-A20-Lime2-eMMC

5 years agoMerge tag 'u-boot-amlogic-20181207' of git://git.denx.de/u-boot-amlogic
Tom Rini [Sat, 8 Dec 2018 00:01:09 +0000 (19:01 -0500)]
Merge tag 'u-boot-amlogic-20181207' of git://git.denx.de/u-boot-amlogic

Two fixes for the Amlogic Pinctrl driver :
- bad usage of clrsetbits_le32
- bad pin definition for AXG Family

5 years agosunxi: update README.sunxi64
Andre Przywara [Thu, 6 Dec 2018 01:25:57 +0000 (01:25 +0000)]
sunxi: update README.sunxi64

Now that the Allwinner port in the official mainline ARM Trusted
Firmware repository has reached feature parity with the "legacy" ATF
port, let's use the opportunity to update the Allwinner 64-bit build
instructions. This changes:
- Update ATF build instructions to use the mainline repo.
- Add quick command lines for TL;DR people.
- Mention Allwinner H6 build target.
- Mention pre-built FEL binaries.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
5 years agoarm: sunxi: Reduce inrush current on Olimex OLinuXino-A20-Lime2-eMMC
Priit Laes [Wed, 21 Nov 2018 18:05:33 +0000 (20:05 +0200)]
arm: sunxi: Reduce inrush current on Olimex OLinuXino-A20-Lime2-eMMC

The lime2 features a too large capacitor on the LDO3 output, which
causes the PMIC to shutdown when enabling power. To be able to still
boot up however, we must gradually enable power on LDO3 for this board.

We do this by enabling both the inrush quirk and the maximum slope the
AXP209 supports.

Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
5 years agoarm: sunxi: Reduce inrush current on Olimex OLinuXino-A20-Lime2
Olliver Schinagl [Wed, 21 Nov 2018 18:05:32 +0000 (20:05 +0200)]
arm: sunxi: Reduce inrush current on Olimex OLinuXino-A20-Lime2

The lime2 features a too large capacitor on the LDO3 output, which
causes the PMIC to shutdown when enabling power. To be able to still
boot up however, we must gradually enable power on LDO3 for this board.

We do this by enabling both the inrush quirk and the maximum slope the
AXP209 supports.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
5 years agopower: axp209: Limit inrush current for broken boards
Olliver Schinagl [Wed, 21 Nov 2018 18:05:31 +0000 (20:05 +0200)]
power: axp209: Limit inrush current for broken boards

Some boards feature a capacitance on LDO3's output that is too large,
causing inrush currents which as a result, shut down the AXP209. This
has been reported before, without knowing the actual cause.

A fix appeared to be done with
commit 0e6e34ac8dbb ("sunxi: Olimex A20 boards: Enable LDO3 and LDO4 regulators").

The description there is a bit misleading, the kernel does not hang
during AXP209 initialization, the PMIC shuts down, causing voltages to
drop and thus the whole system freezes.

While the AXP209 does have the ability to ramp up the voltage slowly, to
reduce these inrush currents, the voltage rate control (VRC) however is
not applicable when switching on the LDO3 output. Only when going from
an enabled lower voltage setting, to a higher voltage setting is the VRC
in effect.

To work around this problem, we set LDO3 to the lowest possible setting
of 0.7 V if it was not yet enabled, and then let the VRC (if enabled) do
its thing. It should be noted, that for some undocumented reason, there
is a short delay needed between setting the LDO3 voltage register and
enabling the power. One would expect that this delay ought to be just
after enabling the output power at 0.7 V, but this did not work.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
5 years agopower: axp209: Add support for voltage rate control on LDO3
Olliver Schinagl [Wed, 21 Nov 2018 18:05:30 +0000 (20:05 +0200)]
power: axp209: Add support for voltage rate control on LDO3

The AXP209 LDO3 regulator supports voltage rate control, or can set a
slew rate.

This allows for the power to gradually rise up to the desired voltage,
instead of spiking up as fast as possible. Reason to have this can be
to reduce the inrush currents for example.

There are 3 slopes to choose from, the default, 'none' is a voltage rise
of 0.0167 V/uS, a 1.6 mV/uS and a 0.8 mV/uS voltage rise.

In ideal world (where vendors follow the recommended design guidelines)
this setting should not be enabled by default. Unless of course AXP209
crashes instead of reporting overcurrent condition as it normally should
do in this case.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
5 years agopower: axp209: Reduce magic values by adding defines for LDO[234]
Olliver Schinagl [Wed, 21 Nov 2018 18:05:29 +0000 (20:05 +0200)]
power: axp209: Reduce magic values by adding defines for LDO[234]

The AXP209 has a few 'magisc-ish' values that are better served with
clear defines.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
5 years agopower: axp209: Define the chip version mask
Olliver Schinagl [Wed, 21 Nov 2018 18:05:28 +0000 (20:05 +0200)]
power: axp209: Define the chip version mask

Use a define for the chip version mask on the axp209.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
5 years agopower: axp209: Use BIT() macro
Olliver Schinagl [Wed, 21 Nov 2018 18:05:27 +0000 (20:05 +0200)]
power: axp209: Use BIT() macro

Use the standard BIT() macro for bitfield definitions in headers.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
5 years agosunxi: pmic_bus: Decrease boot time by not writing duplicate data
Olliver Schinagl [Wed, 21 Nov 2018 18:05:26 +0000 (20:05 +0200)]
sunxi: pmic_bus: Decrease boot time by not writing duplicate data

When we clear a pmic_bus bit, we do a read-modify-write operation.
We waste some time however, by writing back the exact samea value
that was already set in the chip. Let us thus only do the write
in case data was changed.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
5 years agosunxi: board: Print error after power initialization fails
Olliver Schinagl [Wed, 21 Nov 2018 18:05:25 +0000 (20:05 +0200)]
sunxi: board: Print error after power initialization fails

Currently during init, we enable all power, then enable the dram and
after that check whether there was an error during power-up.

This makes little sense, we should enable power and then check if power
was brought up properly before we continue to initialize other things.

This patch moves the DRAM init after the power failure check.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
5 years agoMerge branch '2018-12-06-master-imports'
Tom Rini [Fri, 7 Dec 2018 15:55:12 +0000 (10:55 -0500)]
Merge branch '2018-12-06-master-imports'

- Various FAT fixes
- Hardware spinlock uclass
- DMA uclass
- Various am335x fixes
- DT resyncs for a number of TI platforms
- stm32 updates

5 years agoarm: socfpga: imply SPL options instead of select
Simon Goldschmidt [Thu, 29 Nov 2018 20:17:08 +0000 (21:17 +0100)]
arm: socfpga: imply SPL options instead of select

For a small SPL, it should be possible to build without SPI(-flash) drivers
or wihout MMC drivers.

For this to work, we have to change from 'select'ing options to 'imply'ing
them.

With this change, I can have SPL trimmed to my hard-wired starting method
(SPI-NOR or MMC) while still including all drivers in U-Boot.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
5 years agoboard: ti: am57xx: remove USB platform code
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:57:47 +0000 (10:57 +0100)]
board: ti: am57xx: remove USB platform code

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 years agoboard: ti: dra7-evm: remove USB platform code
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:57:46 +0000 (10:57 +0100)]
board: ti: dra7-evm: remove USB platform code

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 years agoconfigs: am57xx_evm: Enable DM_USB and DM_USB_DEV
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:57:45 +0000 (10:57 +0100)]
configs: am57xx_evm: Enable DM_USB and DM_USB_DEV

Enable DM_USB and DM_USB_DEV for AM57xx based boards.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 years agoconfigs: enable DM_USB and DM_USB_DEV for all DRA7 platforms
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:57:44 +0000 (10:57 +0100)]
configs: enable DM_USB and DM_USB_DEV for all DRA7 platforms

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 years agodts: dra7x: make ocp2scp@4a080000 compatible with simple-bus
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:57:43 +0000 (10:57 +0100)]
dts: dra7x: make ocp2scp@4a080000 compatible with simple-bus

This is required when DM_USB is used, to bind the USB phys.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 years agoboard; ti: am57xx: turn on USB clocks
Vignesh R [Thu, 29 Nov 2018 09:57:42 +0000 (10:57 +0100)]
board; ti: am57xx: turn on USB clocks

Enable USB clocks in late init stage to support ports under DM_USB.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 years agoboard: ti: dra7xx-evm: turn on USB clocks in late init stage
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:57:41 +0000 (10:57 +0100)]
board: ti: dra7xx-evm: turn on USB clocks in late init stage

For USB ports that use the Driver Model, turn on the clocks during the
late init stage.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 years agodwc3-generic: Add support for the TI DWC3 glue
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:57:40 +0000 (10:57 +0100)]
dwc3-generic: Add support for the TI DWC3 glue

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
5 years agophy: Add a new driver for OMAP's USB2 PHYs
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:57:39 +0000 (10:57 +0100)]
phy: Add a new driver for OMAP's USB2 PHYs

This drivers supports the USB2 PHY found on omap5 and dra7 SOCs.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
5 years agophy: ti-pip3-phy: Add support for USB3 PHY
Vignesh R [Thu, 29 Nov 2018 09:57:38 +0000 (10:57 +0100)]
phy: ti-pip3-phy: Add support for USB3 PHY

Add support to handle USB3 PHYs present on AM57xx/DRA7xx SoCs. This is
needed to move AM57xx to DM_USB.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
5 years agosyscon: dm: Add a new method to get a regmap from DTS
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:57:37 +0000 (10:57 +0100)]
syscon: dm: Add a new method to get a regmap from DTS

syscon_regmap_lookup_by_phandle() can be used to get the regmap of a syscon
device from a reference in the DTS. It operates similarly to the linux
version of the namesake function.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agousb: dwc3: Fix a compilation error with the edison defconfig
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:52:50 +0000 (10:52 +0100)]
usb: dwc3: Fix a compilation error with the edison defconfig

The error is:
In file included from include/part.h:10:0,
                 from include/usb.h:18,
                 from include/linux/usb/gadget.h:22,
                 from drivers/usb/dwc3/ep0.c:20:
include/ide.h:62:14: error: unknown type name ‘uchar’
 void ide_led(uchar led, uchar status);

Fixing it by including common.h that defines the uchar type.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
5 years agodwc3-generic: Add select_dr_mode operation
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:52:49 +0000 (10:52 +0100)]
dwc3-generic: Add select_dr_mode operation

The select_dr_mode operation is executed when the glue driver is probed.
The role of this optional function is to configure the operating mode
of the controller at the glue level.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
5 years agodwc3-generic: Handle the PHYs, the clocks and the reset lines
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:52:48 +0000 (10:52 +0100)]
dwc3-generic: Handle the PHYs, the clocks and the reset lines

This make the driver more generic. At this point this driver can replace
the dwc3-of-simple implementation.
Make the description in the Kconfig more generic too.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
5 years agoconfigs: evb-rk3328: Enable CONFIG_USB_DWC3
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:52:47 +0000 (10:52 +0100)]
configs: evb-rk3328: Enable CONFIG_USB_DWC3

This is now required because the PHY operations used by xhci-dwc3 are part
of the dwc3 core.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
5 years agodm: usb: create a new UCLASS ID for USB gadget devices
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:52:46 +0000 (10:52 +0100)]
dm: usb: create a new UCLASS ID for USB gadget devices

UCLASS_USB_DEV_GENERIC was meant for USB devices connected to host
controllers, not gadget devices.
Adding a new UCLASS for gadget devices alone.

Also move the generic DM code for USB gadgets in a separate file for
clarity.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
5 years agodwc3: move phy operation to core.c
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:52:45 +0000 (10:52 +0100)]
dwc3: move phy operation to core.c

Those operations can be used for peripheral operation as well as host
operation.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
# Conflicts:
# drivers/usb/dwc3/core.c
# drivers/usb/host/xhci-dwc3.c

5 years agodwc3_generic: do not probe the USB device driver when it's bound
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:52:44 +0000 (10:52 +0100)]
dwc3_generic: do not probe the USB device driver when it's bound

The driver will be probed when usb_gadget_initialize() is called.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
5 years agousb: udc: implement DM versions of usb_gadget_initialize()/_release()/_handle_interrupt()
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:52:43 +0000 (10:52 +0100)]
usb: udc: implement DM versions of usb_gadget_initialize()/_release()/_handle_interrupt()

When DM_USB_GADGET the platform code for the USB device must be replaced by
calls to a USB device driver.

usb_gadget_initialize() probes the USB device driver.
usb_gadget_release() removes the USB device driver.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
5 years agousb: introduce a separate config option for DM USB device
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:52:42 +0000 (10:52 +0100)]
usb: introduce a separate config option for DM USB device

Using CONFIG_DM_USB for this purpose prevents using DM_USB for host and not
for device.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
5 years agousb: gadget: Do not call board_usb_xxx() directly in USB gadget drivers
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:52:41 +0000 (10:52 +0100)]
usb: gadget: Do not call board_usb_xxx() directly in USB gadget drivers

Add 2 functions to wrap the calls to board_usb_init() and
board_usb_cleanup().
This is a preparatory work for DM support for UDC drivers (DM_USB_GADGET).

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
5 years agoarm: dts: am33xx: Sync dts with Linux 4.20.0
Felix Brack [Wed, 5 Dec 2018 13:53:42 +0000 (14:53 +0100)]
arm: dts: am33xx: Sync dts with Linux 4.20.0

This patch synchronizes the am33xx SoC specific files with those from
Linux 4.20.0. Hence all board maintainers of am33xx based boards are
on the cc list.
The main purpose of this patch is to prevent further diverging of the
dts files from U-Boot and those from Linux. It aims to set the stage
for the synchronization of board specific dts files. Example: I'm the
maintainer of the PDU001 board: once this patch is applied successfully
I will make changes to the board specific dts file in Linux only and
then post a patch with a copy of this exact dts file to U-Boot. This
will make U-Boot and Linux remain in sync.
The stumbling block of https://patchwork.ozlabs.org/patch/943627 was
removed by the patch https://patchwork.ozlabs.org/patch/962428 from
Lokesh Vutla (many thanks!). This omap-serial driver allows using the
Linux am33xx.dtsi file in U-Boot.
Other changes to dts and dtsi files made by this patch are mainly to
prevent _new_ warnings during the build process. Especially the warning
at pinmux@800 stating 'unnecessary #address-cells/#size-cells without
"ranges" or child "reg"' was not removed. This warning is a good example
showing the benefit of the synchronization: if it needs to be fixed it
will be fixed in Linux and ported back to U-Boot.
Buildman reports all 46 am33xx SoC based boards to build fine, with
warnings of course. Nevertheless this patch should be tested thoroughly
on as many boards as possible to prevent any collateral damage.

Signed-off-by: Felix Brack <fb@ltec.ch>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 years agospl/tpl: change banner into upper case
Heiko Schocher [Wed, 5 Dec 2018 10:29:54 +0000 (11:29 +0100)]
spl/tpl: change banner into upper case

commit d6330064634a ("spl: Add a define for SPL_TPL_PROMPT")

changes the SPL/TPL banner from upper case into lower
case. As SPL and TPL are three-letter acronyms and they
are written in upper case, change it back to upper case.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agoARM: DTS: da850-evm: Re-sync da850-evm.dts from Linux 4.20
Adam Ford [Mon, 3 Dec 2018 14:29:44 +0000 (08:29 -0600)]
ARM: DTS: da850-evm: Re-sync da850-evm.dts from Linux 4.20

There has been some natural evolution of the device tree, so
resync with 4.20

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoARM: dts: da850-lcdk: Sync from Linux 4.20
Adam Ford [Mon, 3 Dec 2018 14:29:43 +0000 (08:29 -0600)]
ARM: dts: da850-lcdk: Sync from Linux 4.20

Re-synce the device tree files from Linux 4.20

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoARM: DTS: da850: Sync from Linux 4.20
Adam Ford [Mon, 3 Dec 2018 14:29:42 +0000 (08:29 -0600)]
ARM: DTS: da850: Sync from Linux 4.20

Re-sync with 4.20 due some some natural evolution.

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoARM: DTS: Resync LogicPD-Torpedo-37xx-devkit with Linux 4.20
Adam Ford [Mon, 3 Dec 2018 14:17:29 +0000 (08:17 -0600)]
ARM: DTS: Resync LogicPD-Torpedo-37xx-devkit with Linux 4.20

Migrate some small device tree fixes from Linux 4.20.

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoARM: DTS: Resync LogicPD SOM-LV with Linux 4.20
Adam Ford [Mon, 3 Dec 2018 14:15:59 +0000 (08:15 -0600)]
ARM: DTS: Resync LogicPD SOM-LV with Linux 4.20

There have been a few fixes to the device trees, so this
re-syncs the dts/dtsi files with Linux

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoserial: omap: Add code for early debugging
Felix Brack [Mon, 3 Dec 2018 14:12:25 +0000 (15:12 +0100)]
serial: omap: Add code for early debugging

This patch adds code missing when CONFIG_DEBUG_UART_OMAP is enabled as
early debugging UART. The code is basically copied from the ns16550
driver.

Signed-off-by: Felix Brack <fb@ltec.ch>
5 years agotravis: Bump ARC tools to arc-2018.09
Alexey Brodkin [Mon, 3 Dec 2018 14:09:13 +0000 (17:09 +0300)]
travis: Bump ARC tools to arc-2018.09

Build tested in Travis, see:
https://travis-ci.org/abrodkin/u-boot/jobs/462808237

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
5 years agoARM: DTS: Resync am3517-evm.dts with Linux 4.20
Adam Ford [Mon, 3 Dec 2018 14:06:28 +0000 (08:06 -0600)]
ARM: DTS: Resync am3517-evm.dts with Linux 4.20

The DTS file for the AM3517 had the incorrect CD polarity.  Resync with
the fixed DTS file from Linux.

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoensure active menuitem is inside menu
Frank Wunderlich [Mon, 3 Dec 2018 10:23:41 +0000 (11:23 +0100)]
ensure active menuitem is inside menu

Hi,

setting active menuitem currently can be outside of menu which results in invisible selection

attached Patch fixes this

regards Frank

>From 1d9c4cb8b3e2dd9b0a7a6a2d4a21684d0a099dbf Mon Sep 17 00:00:00 2001
From: Frank Wunderlich <frank-w@public-files.de>
Date: Sun, 2 Dec 2018 11:23:53 +0100
Subject: [PATCH] ensure active menuitem is inside menu

if active menuitem is defined via environment var it can be outside the menu (>=menuitem-count)

this patch resets this definition back to 0

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
5 years agopinctrl: stm32: Update stm32_pinctrl_get_gpio_dev()
Patrice Chotard [Mon, 3 Dec 2018 09:52:54 +0000 (10:52 +0100)]
pinctrl: stm32: Update stm32_pinctrl_get_gpio_dev()

Due to gpio holes management, stm32_pinctrl_get_gpio_dev() must
be updated.

stm32_pinctrl_get_gpio_dev() returns from a given pin selectors
the corresponding bank gpio device and the gpio_offset inside this
gpio bank.

Update also all functions which makes usage of stm32_pinctrl_get_gpio_dev.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
5 years agogpio: stm32f7: Remove CONFIG_CLK flag.
Patrice Chotard [Mon, 3 Dec 2018 09:52:53 +0000 (10:52 +0100)]
gpio: stm32f7: Remove CONFIG_CLK flag.

As all STM32 SoCs supports CONFIG_CLK flag,
it becomes useless in this driver, remove it.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
5 years agogpio: stm32f7: Move STM32_GPIOS_PER_BANK into gpio.h
Patrice Chotard [Mon, 3 Dec 2018 09:52:52 +0000 (10:52 +0100)]
gpio: stm32f7: Move STM32_GPIOS_PER_BANK into gpio.h

To allow access to this define by other driver, move
it into gpio.h

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
5 years agogpio: stm32f7: Add gpio bank holes management
Patrice Chotard [Mon, 3 Dec 2018 09:52:51 +0000 (10:52 +0100)]
gpio: stm32f7: Add gpio bank holes management

In some STM32 SoC packages, GPIO bank has not always 16 gpios.
Several cases can occur, gpio hole can be located at the beginning,
middle or end of the gpio bank or a combination of these 3
configurations.

For that, gpio bindings offer the gpio-ranges DT property which
described the gpio bank mapping.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
5 years agopinctrl: stm32: Move gpio_dev list filling outside probe()
Patrice Chotard [Mon, 3 Dec 2018 09:52:50 +0000 (10:52 +0100)]
pinctrl: stm32: Move gpio_dev list filling outside probe()

Move gpio_dev list filling outside probe() to speed-up U-boot
boot sequence execution. This list is populated only when needed.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
5 years agoserial: bcm6858: remove driver and switch to bcm6345
Álvaro Fernández Rojas [Sat, 1 Dec 2018 17:42:09 +0000 (18:42 +0100)]
serial: bcm6858: remove driver and switch to bcm6345

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
5 years agoarm: implement {in, out}_{16, 32} and {clr, set, clrset}bits_{16, 32}
Álvaro Fernández Rojas [Sat, 1 Dec 2018 17:42:08 +0000 (18:42 +0100)]
arm: implement {in, out}_{16, 32} and {clr, set, clrset}bits_{16, 32}

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
5 years agoserial: bcm6345: switch to raw I/O functions
Álvaro Fernández Rojas [Sat, 1 Dec 2018 17:42:07 +0000 (18:42 +0100)]
serial: bcm6345: switch to raw I/O functions

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
5 years agoarm: am335x-pdu001: Enable CONFIG_BLK and CONFIG_DM_MMC
Felix Brack [Fri, 30 Nov 2018 09:23:36 +0000 (10:23 +0100)]
arm: am335x-pdu001: Enable CONFIG_BLK and CONFIG_DM_MMC

This patch enables CONFIG_BLK as well as CONFIG_DM_MMC for the PDU001
board. It depends on Patrice Chotard's patch 'power: regulator: denied
disable on always-on regulator' which prevents power cycling the vmmc
supply. Without this patch the board will not boot as vmmc is
unfortunately used by other board components, not just eMMC and micro SD
card. Furthermore my patch 'dts: am335x-pdu001: Fix polarity of card
detection input' is required to boot from external micro SD card. Without
this patch no SD card will be detected and hence booting will fail.

Signed-off-by: Felix Brack <fb@ltec.ch>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 years agodts: am335x-pdu001: Fix polarity of card detection input
Felix Brack [Thu, 29 Nov 2018 12:45:06 +0000 (13:45 +0100)]
dts: am335x-pdu001: Fix polarity of card detection input

When a micro SD card is inserted in the PDU001 card cage, the card
detection switch is opened and the corresponding GPIO input is driven
by a pull-up. Hence change the active level of the card detection
input from low to high.

Signed-off-by: Felix Brack <fb@ltec.ch>
5 years agotest: dma: add dma-uclass test
Grygorii Strashko [Wed, 28 Nov 2018 18:17:51 +0000 (19:17 +0100)]
test: dma: add dma-uclass test

Add a sandbox DMA driver implementation (provider) and corresponding DM
test.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Álvaro Fernández Rojas <noltari@gmail.com>
5 years agodma: add channels support
Álvaro Fernández Rojas [Wed, 28 Nov 2018 18:17:50 +0000 (19:17 +0100)]
dma: add channels support

This adds channels support for dma controllers that have multiple channels
which can transfer data to/from different devices (enet, usb...).

DMA channle API:
 dma_get_by_index()
 dma_get_by_name()
 dma_request()
 dma_free()
 dma_enable()
 dma_disable()
 dma_prepare_rcv_buf()
 dma_receive()
 dma_send()

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
[grygorii.strashko@ti.com: drop unused dma_get_by_index_platdata(),
 add metadata to send/receive ops, add dma_prepare_rcv_buf(),
 minor clean up]
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agodma: move dma_ops to dma-uclass.h
Álvaro Fernández Rojas [Wed, 28 Nov 2018 18:17:49 +0000 (19:17 +0100)]
dma: move dma_ops to dma-uclass.h

Move dma_ops to a separate header file, following other uclass
implementations. While doing so, this patch also improves dma_ops
documentation.

Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
5 years agoconfigs: am335x_hs_evm_uart: Add YMODEM SPL support for UART boot
Andrew F. Davis [Wed, 28 Nov 2018 16:56:06 +0000 (10:56 -0600)]
configs: am335x_hs_evm_uart: Add YMODEM SPL support for UART boot

UART booting requires YMODEM support. Add this here.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 years agoARM: at91: lds: add test for SPL binary size and bss size
Eugen.Hristev@microchip.com [Wed, 28 Nov 2018 09:33:43 +0000 (09:33 +0000)]
ARM: at91: lds: add test for SPL binary size and bss size

Add test for the SPL binary size and the bss section size.
This will throw an error at build time if the SPL sections
do not fit in the designated RAM area, thus avoiding oversizing the SPL.

Based on original work by Wenyou Yang.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
5 years agopinctrl: meson: axg: Fix GPIO pin offsets
Carlo Caione [Thu, 6 Dec 2018 08:08:11 +0000 (08:08 +0000)]
pinctrl: meson: axg: Fix GPIO pin offsets

The pin number (first and last) in the bank definition is missing the
pin base offset shifting. This is causing a miscalculation when
retrieving the register and pin offsets in the GPIO driver causing the
'gpio' command to drive the wrong pins / GPIOs in the second GPIO chip
(the AO bank is driven correctly because the shifting is already 0).

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
5 years agopinctrl: stm32: make pinctrl use hwspinlock
Benjamin Gaignard [Tue, 27 Nov 2018 12:49:53 +0000 (13:49 +0100)]
pinctrl: stm32: make pinctrl use hwspinlock

Protect configuration registers with a hardware spinlock.

If a hwspinlock is defined in the device-tree node used it
to be sure that none of the others processors on the SoC could
change the configuration at the same time.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
5 years agohwspinlock: add stm32 hardware spinlock support
Benjamin Gaignard [Tue, 27 Nov 2018 12:49:52 +0000 (13:49 +0100)]
hwspinlock: add stm32 hardware spinlock support

Implement hardware spinlock support for STM32MP1.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
5 years agoclk: stm32: add hardware spinlock clock
Benjamin Gaignard [Tue, 27 Nov 2018 12:49:51 +0000 (13:49 +0100)]
clk: stm32: add hardware spinlock clock

Add hardware spinlock in the list of the clocks.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
5 years agodm: Add Hardware Spinlock class
Benjamin Gaignard [Tue, 27 Nov 2018 12:49:50 +0000 (13:49 +0100)]
dm: Add Hardware Spinlock class

This is uclass for Hardware Spinlocks.
It implements two mandatory operations: lock and unlock
and one optional relax operation.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
5 years agoboard: ti: ks2_evm: Over ride spl_get_load_buffer function
Keerthy [Tue, 27 Nov 2018 12:22:41 +0000 (17:52 +0530)]
board: ti: ks2_evm: Over ride spl_get_load_buffer function

Currently k2 spi boot is broken as the image header
is getting copied to an invalid memory location

CONFIG_SYS_TEXT_BASE - sizeof (struct image_size)
which maps to 0xc000000 - 0x40 = 0xbffffc0 being a reserved
location.

We cannot change the CONFIG_SYS_TEXT_BASE address as the single
stage boots like UART boot will need the address to be 0xc000000
hence override the spl_get_load_buffer to have image_header
address as CONFIG_SYS_TEXT_BASE aka 0xc000000

Signed-off-by: Keerthy <j-keerthy@ti.com>
5 years agoclk: Allow clock defaults to be set during re-reloc state for SPL only
Philipp Tomsich [Mon, 26 Nov 2018 19:20:19 +0000 (20:20 +0100)]
clk: Allow clock defaults to be set during re-reloc state for SPL only

In commit e5e06b65ad65 ("clk: Allow clock defaults to be set also
during re-reloc state") the earlier guard against setting clock
defaults in pre-reloc state was removed.  While it is easy to filter
'assigned-clocks' properties for SPL using CONFIG_OF_SPL_REMOVE_PROPS,
no such mechanism exists for the pre-reloc stage of the full U-Boot.

With the default defconfig for the RK3399-Q7 (which filter the
'assigned-clocks' property for the DTS used by SPL anyway), this
caused a pause during startup of the full U-Boot stage that lasted for
almost 10s (due to the CPU not having been clocked up yet).

This reintroduces the guard from commit f4fcba5c5baa ("clk: Allow
clock defaults to be set also during re-reloc state") and extends it
to only apply outside of a TPL/SPL build: i.e. clk_set_defaults will
now run in pre-reloc state for SPL, but only after reloc for the full
U-Boot.

References: commit f4fcba5c5baa ("clk: implement clk_set_defaults()")
References: commit e5e06b65ad65 ("clk: Allow clock defaults to be set
also during re-reloc state")
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agofs: fix FAT name extraction
Patrick Wildt [Mon, 26 Nov 2018 14:58:13 +0000 (15:58 +0100)]
fs: fix FAT name extraction

The long name apparently can be accumulated using multiple
13-byte slots.  Unfortunately we never checked how many we
can actually fit in the buffer we are reading to.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
5 years agofs: check FAT cluster size
Patrick Wildt [Mon, 26 Nov 2018 14:56:57 +0000 (15:56 +0100)]
fs: check FAT cluster size

The cluster size specifies how many sectors make up a cluster.  A
cluster size of zero makes no sense, as it would mean that the
cluster is made up of no sectors.  This will later lead into a
division by zero in sect_to_clust(), so better take care of that
early.

The MAX_CLUSTSIZE define can reduced using a define to make some
room in low-memory system.  Unfortunately if the code reads a
filesystem with a bigger cluster size it will overflow the buffer.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
5 years agoconfigs: stm32f746-disco: Fix stm32f746-disco boot
Patrice Chotard [Mon, 26 Nov 2018 12:42:32 +0000 (13:42 +0100)]
configs: stm32f746-disco: Fix stm32f746-disco boot

Since commit 8f651ca60ba1 ("pinctrl: stm32: Add get_pins_count() ops")
stm32f746-disco can't boot.

This is due to new memory allocation into STM32 pinctrl driver,
increase SYS_MALLOC_F_LEN from 0xC00 to 0xE00.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
5 years agomain: Drop more #ifdefs
Simon Glass [Mon, 26 Nov 2018 03:05:54 +0000 (20:05 -0700)]
main: Drop more #ifdefs

Now that many things are converted to Kconfig we can drop most of the

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agow1: fix occasional enumeration failure
Martin Fuzzey [Fri, 23 Nov 2018 09:53:06 +0000 (10:53 +0100)]
w1: fix occasional enumeration failure

Sometimes enumeration fails (about 1 in 50 times on my custom board).

The underlying reason is probably electrical but Linux does not have
the problem.

Comparing the Linux / u-boot implementations shows that Linux
retries the error case whereas u-boot aborts early.

Removing the early abort in u-boot fixes the problem.

Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
5 years agorockchip: rk3399: Add MAINTAINERS entry
Tom Rini [Thu, 6 Dec 2018 15:24:12 +0000 (10:24 -0500)]
rockchip: rk3399: Add MAINTAINERS entry

Add an entry for the Ficus EE board to the existing rock960 MAINTAINERS
file.

Signed-off-by: Tom Rini <trini@konsulko.com>
5 years agoMerge tag 'for-master-20181206' of git://git.denx.de/u-boot-rockchip
Tom Rini [Thu, 6 Dec 2018 15:15:08 +0000 (10:15 -0500)]
Merge tag 'for-master-20181206' of git://git.denx.de/u-boot-rockchip

- Changes the declaration of regs_phy in dwc2-otg to uintptr_t
  to ensure it can be cast to void* for use with writel().
- Add the Rock960 and Ficus boards.

5 years agorockchip: rk3399: Add Ficus EE board support
Manivannan Sadhasivam [Thu, 27 Sep 2018 19:03:01 +0000 (00:33 +0530)]
rockchip: rk3399: Add Ficus EE board support

Add board support for Ficus EE board from Vamrs. This board utilizes
common Rock960 family support.

Following peripherals are tested and known to work:
* Gigabit Ethernet
* USB 2.0
* MMC

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
[Reworked based on common Rock960 family support]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: rk3399: Add Rock960 CE board support
Manivannan Sadhasivam [Thu, 27 Sep 2018 19:03:00 +0000 (00:33 +0530)]
rockchip: rk3399: Add Rock960 CE board support

Add board support for Rock960 CE board from Vamrs. This board utilizes
common Rock960 family support.

Following peripherals are tested and known to work:
* USB 2.0
* MMC

This commit also adds DDR configuration for LPDDR3-2GiB-1600MHz which
is being used on the board.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: rk3399: Add common Rock960 family from Vamrs
Manivannan Sadhasivam [Thu, 27 Sep 2018 19:02:59 +0000 (00:32 +0530)]
rockchip: rk3399: Add common Rock960 family from Vamrs

Rock960 is a family of boards based on Rockchip RK3399 SoC from Vamrs.
It consists of Rock960 (Consumer Edition) and Ficus (Enterprise Edition)
96Boards.

Below are some of the key differences between both Rock960 and Ficus
boards:

1. Different host enable GPIO for USB
2. Different power and reset GPIO for PCI-E
3. No Ethernet port on Rock960

The common board support will be utilized by both boards. The device
tree has been organized in such a way that only the properties which
differ between both boards are placed in the board specific dts and
the reset of the nodes are placed in common dtsi file.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
[Added instructions for SD card boot]
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
5 years agoarm: dts: rockchip: add some common pin-settings to rk3399
Randy Li [Thu, 27 Sep 2018 19:02:58 +0000 (00:32 +0530)]
arm: dts: rockchip: add some common pin-settings to rk3399

Those pins would be used by many boards.

Commit grabbed from Linux:

commit b41023282d07b61a53e2c9b9508912b1e7ce7b4f
Author: Randy Li <ayaka@soulik.info>
Date:   Thu Jun 21 21:32:10 2018 +0800

    arm64: dts: rockchip: add some common pin-settings to rk3399

    Those pins would be used by many boards.

Signed-off-by: Randy Li <ayaka@soulik.info>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Randy Li <ayaka@soulik.info>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>