From d512657195de2f8062fc2354af1c3d96bf378d9b Mon Sep 17 00:00:00 2001 From: =?utf8?q?Bj=C3=B8rn=20Mork?= Date: Sun, 5 Apr 2020 16:17:11 +0200 Subject: [PATCH] mt7621-qtn-rgmii: enable RGMII connected Quantenna QV840 MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Write a magic value to a magic destination. This might be specific to the Mitrastar designed ZyXEL WAP6805. Signed-off-by: Bjørn Mork --- package/kernel/mt7621-qtn-rgmii/Makefile | 45 +++++++++++++++++ package/kernel/mt7621-qtn-rgmii/src/Makefile | 1 + .../mt7621-qtn-rgmii/src/mt7621-qtn-rgmii.c | 48 +++++++++++++++++++ 3 files changed, 94 insertions(+) create mode 100644 package/kernel/mt7621-qtn-rgmii/Makefile create mode 100644 package/kernel/mt7621-qtn-rgmii/src/Makefile create mode 100644 package/kernel/mt7621-qtn-rgmii/src/mt7621-qtn-rgmii.c diff --git a/package/kernel/mt7621-qtn-rgmii/Makefile b/package/kernel/mt7621-qtn-rgmii/Makefile new file mode 100644 index 0000000000..f5587f5363 --- /dev/null +++ b/package/kernel/mt7621-qtn-rgmii/Makefile @@ -0,0 +1,45 @@ +# +# Copyright (C) 2020 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +include $(TOPDIR)/rules.mk +include $(INCLUDE_DIR)/kernel.mk + +PKG_NAME:=mt7621-qtn-rgmii +PKG_RELEASE:=1 +PKG_LICENSE:=GPL-2.0 + +PKG_MAINTAINER:=Bjørn Mork + +include $(INCLUDE_DIR)/package.mk + +define KernelPackage/mt7621-qtn-rgmii + SECTION:=kernel + SUBMENU:=Other modules + TITLE:=Enable RGMII connected Quantenna module on MT7621 + DEPENDS:=@TARGET_ramips_mt7621 + HIDDEN:=1 + FILES:=$(PKG_BUILD_DIR)/mt7621-qtn-rgmii.ko + AUTOLOAD:=$(call AutoLoad,30,mt7621-qtn-rgmii,1) +endef + +define KernelPackage/mt7621-qtn-rgmii/description + Enable RGMII connected Quantenna module on MT7621. + + The Mitrastar designed ZyXEL WAP6805 has a Quantenna QV840 + module connected to the RGMII pins of the MT7621 SoC. For + unknown reasons, it is necessary to change the value of + the register at 0x1e110008 from default (usually 0xc000c) + to 0x9000c for this connection wo work. + + This driver simply does that without much fuzz. +endef + +define Build/Compile + $(KERNEL_MAKE) M=$(PKG_BUILD_DIR) modules +endef + +$(eval $(call KernelPackage,mt7621-qtn-rgmii)) diff --git a/package/kernel/mt7621-qtn-rgmii/src/Makefile b/package/kernel/mt7621-qtn-rgmii/src/Makefile new file mode 100644 index 0000000000..c993ac45bd --- /dev/null +++ b/package/kernel/mt7621-qtn-rgmii/src/Makefile @@ -0,0 +1 @@ +obj-m += mt7621-qtn-rgmii.o diff --git a/package/kernel/mt7621-qtn-rgmii/src/mt7621-qtn-rgmii.c b/package/kernel/mt7621-qtn-rgmii/src/mt7621-qtn-rgmii.c new file mode 100644 index 0000000000..5f223b5d75 --- /dev/null +++ b/package/kernel/mt7621-qtn-rgmii/src/mt7621-qtn-rgmii.c @@ -0,0 +1,48 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020 Bjørn Mork + */ +#include +#include + +#define MODULE_NAME "mt7621-qtn-rgmii" +#define RGMII_REG_BASE 0x1e110008 +#define RGMII_REG_SIZE 4 +#define RGMII_REG_VALUE 0x9000c + +static u32 oldval; + +static int __init mt7621_qtn_rgmii_init(void) +{ + void __iomem *base = ioremap(RGMII_REG_BASE, RGMII_REG_SIZE); + + if (!base) + return -ENOMEM; + oldval = ioread32(base); + if (oldval != RGMII_REG_VALUE) { + iowrite32(RGMII_REG_VALUE, base); + pr_info(MODULE_NAME ": changed register 0x%08x value from 0x%08x to 0x%08x\n", RGMII_REG_BASE, oldval, RGMII_REG_VALUE); + } + iounmap(base); + return 0; +} + +static void __exit mt7621_qtn_rgmii_exit(void) +{ + void __iomem *base = ioremap(RGMII_REG_BASE, RGMII_REG_SIZE); + + if (!base) + return; + if (oldval != RGMII_REG_VALUE) { + iowrite32(oldval, base); + pr_info(MODULE_NAME ": reset register 0x%08x back to 0x%08x\n", RGMII_REG_BASE, oldval); + } + iounmap(base); +} + +module_init(mt7621_qtn_rgmii_init); +module_exit(mt7621_qtn_rgmii_exit); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Bjørn Mork "); +MODULE_DESCRIPTION("Enable RGMII connected Quantenna module on MT7621"); -- 2.30.2