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[openwrt/openwrt.git] / package / ath9k / src / drivers / net / wireless / ath9k / main.c
1 /*
2 * Copyright (c) 2008 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 /* mac80211 and PCI callbacks */
18
19 #include <linux/nl80211.h>
20 #include "core.h"
21
22 #define ATH_PCI_VERSION "0.1"
23
24 #define IEEE80211_HTCAP_MAXRXAMPDU_FACTOR 13
25 #define IEEE80211_ACTION_CAT_HT 7
26 #define IEEE80211_ACTION_HT_TXCHWIDTH 0
27
28 static char *dev_info = "ath9k";
29
30 MODULE_AUTHOR("Atheros Communications");
31 MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
32 MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
33 MODULE_LICENSE("Dual BSD/GPL");
34
35 static struct pci_device_id ath_pci_id_table[] __devinitdata = {
36 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
37 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
38 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
39 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
40 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
41 { 0 }
42 };
43
44 static int test_update_chan(enum ieee80211_band band,
45 const struct hal_channel *chan,
46 struct ath_softc *sc)
47 {
48 int i;
49
50 for (i = 0; i < sc->sbands[band].n_channels; i++) {
51 if (sc->channels[band][i].center_freq == chan->channel)
52 return 1;
53 }
54
55 return 0;
56 }
57
58 static int ath_check_chanflags(struct ieee80211_channel *chan,
59 u_int32_t mode,
60 struct ath_softc *sc)
61 {
62 struct ieee80211_hw *hw = sc->hw;
63 struct ieee80211_supported_band *band;
64 struct ieee80211_channel *band_channel;
65 int i;
66
67 band = hw->wiphy->bands[chan->band];
68
69 for (i = 0; i < band->n_channels; i++) {
70 band_channel = &band->channels[i];
71
72 if ((band_channel->center_freq == chan->center_freq) &&
73 ((band_channel->hw_value & mode) == mode))
74 return 1;
75 }
76 return 0;
77 }
78
79 static int ath_setkey_tkip(struct ath_softc *sc,
80 struct ieee80211_key_conf *key,
81 struct hal_keyval *hk,
82 const u8 *addr)
83 {
84 u8 *key_rxmic = NULL;
85 u8 *key_txmic = NULL;
86
87 key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
88 key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
89
90 if (addr == NULL) {
91 /* Group key installation */
92 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
93 return ath_keyset(sc, key->keyidx, hk, addr);
94 }
95 if (!sc->sc_splitmic) {
96 /*
97 * data key goes at first index,
98 * the hal handles the MIC keys at index+64.
99 */
100 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
101 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
102 return ath_keyset(sc, key->keyidx, hk, addr);
103 }
104 /*
105 * TX key goes at first index, RX key at +32.
106 * The hal handles the MIC keys at index+64.
107 */
108 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
109 if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
110 /* Txmic entry failed. No need to proceed further */
111 DPRINTF(sc, ATH_DEBUG_KEYCACHE,
112 "%s Setting TX MIC Key Failed\n", __func__);
113 return 0;
114 }
115
116 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
117 /* XXX delete tx key on failure? */
118 return ath_keyset(sc, key->keyidx+32, hk, addr);
119 }
120
121 static int ath_key_config(struct ath_softc *sc,
122 const u8 *addr,
123 struct ieee80211_key_conf *key)
124 {
125 struct ieee80211_vif *vif;
126 struct hal_keyval hk;
127 const u8 *mac = NULL;
128 int ret = 0;
129 enum ieee80211_if_types opmode;
130
131 memset(&hk, 0, sizeof(hk));
132
133 switch (key->alg) {
134 case ALG_WEP:
135 hk.kv_type = HAL_CIPHER_WEP;
136 break;
137 case ALG_TKIP:
138 hk.kv_type = HAL_CIPHER_TKIP;
139 break;
140 case ALG_CCMP:
141 hk.kv_type = HAL_CIPHER_AES_CCM;
142 break;
143 default:
144 return -EINVAL;
145 }
146
147 hk.kv_len = key->keylen;
148 memcpy(hk.kv_val, key->key, key->keylen);
149
150 if (!sc->sc_vaps[0])
151 return -EIO;
152
153 vif = sc->sc_vaps[0]->av_if_data;
154 opmode = vif->type;
155
156 /*
157 * Strategy:
158 * For _M_STA mc tx, we will not setup a key at all since we never
159 * tx mc.
160 * _M_STA mc rx, we will use the keyID.
161 * for _M_IBSS mc tx, we will use the keyID, and no macaddr.
162 * for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
163 * peer node. BUT we will plumb a cleartext key so that we can do
164 * perSta default key table lookup in software.
165 */
166 if (is_broadcast_ether_addr(addr)) {
167 switch (opmode) {
168 case IEEE80211_IF_TYPE_STA:
169 /* default key: could be group WPA key
170 * or could be static WEP key */
171 mac = NULL;
172 break;
173 case IEEE80211_IF_TYPE_IBSS:
174 break;
175 case IEEE80211_IF_TYPE_AP:
176 break;
177 default:
178 ASSERT(0);
179 break;
180 }
181 } else {
182 mac = addr;
183 }
184
185 if (key->alg == ALG_TKIP)
186 ret = ath_setkey_tkip(sc, key, &hk, mac);
187 else
188 ret = ath_keyset(sc, key->keyidx, &hk, mac);
189
190 if (!ret)
191 return -EIO;
192
193 sc->sc_keytype = hk.kv_type;
194 return 0;
195 }
196
197 static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
198 {
199 #define ATH_MAX_NUM_KEYS 4
200 int freeslot;
201
202 freeslot = (key->keyidx >= ATH_MAX_NUM_KEYS) ? 1 : 0;
203 ath_key_reset(sc, key->keyidx, freeslot);
204 #undef ATH_MAX_NUM_KEYS
205 }
206
207 static void setup_ht_cap(struct ieee80211_ht_info *ht_info)
208 {
209 /* Until mac80211 includes these fields */
210
211 #define IEEE80211_HT_CAP_DSSSCCK40 0x1000
212 #define IEEE80211_HT_CAP_MAXRXAMPDU_65536 0x3 /* 2 ^ 16 */
213 #define IEEE80211_HT_CAP_MPDUDENSITY_8 0x6 /* 8 usec */
214
215 ht_info->ht_supported = 1;
216 ht_info->cap = (u16)IEEE80211_HT_CAP_SUP_WIDTH
217 |(u16)IEEE80211_HT_CAP_MIMO_PS
218 |(u16)IEEE80211_HT_CAP_SGI_40
219 |(u16)IEEE80211_HT_CAP_DSSSCCK40;
220
221 ht_info->ampdu_factor = IEEE80211_HT_CAP_MAXRXAMPDU_65536;
222 ht_info->ampdu_density = IEEE80211_HT_CAP_MPDUDENSITY_8;
223 /* setup supported mcs set */
224 memset(ht_info->supp_mcs_set, 0, 16);
225 ht_info->supp_mcs_set[0] = 0xff;
226 ht_info->supp_mcs_set[1] = 0xff;
227 ht_info->supp_mcs_set[12] = IEEE80211_HT_CAP_MCS_TX_DEFINED;
228 }
229
230 static int ath_rate2idx(struct ath_softc *sc, int rate)
231 {
232 int i = 0, cur_band, n_rates;
233 struct ieee80211_hw *hw = sc->hw;
234
235 cur_band = hw->conf.channel->band;
236 n_rates = sc->sbands[cur_band].n_bitrates;
237
238 for (i = 0; i < n_rates; i++) {
239 if (sc->sbands[cur_band].bitrates[i].bitrate == rate)
240 break;
241 }
242
243 /*
244 * NB:mac80211 validates rx rate index against the supported legacy rate
245 * index only (should be done against ht rates also), return the highest
246 * legacy rate index for rx rate which does not match any one of the
247 * supported basic and extended rates to make mac80211 happy.
248 * The following hack will be cleaned up once the issue with
249 * the rx rate index validation in mac80211 is fixed.
250 */
251 if (i == n_rates)
252 return n_rates - 1;
253 return i;
254 }
255
256 static void ath9k_rx_prepare(struct ath_softc *sc,
257 struct sk_buff *skb,
258 struct ath_recv_status *status,
259 struct ieee80211_rx_status *rx_status)
260 {
261 struct ieee80211_hw *hw = sc->hw;
262 struct ieee80211_channel *curchan = hw->conf.channel;
263
264 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
265
266 rx_status->mactime = status->tsf;
267 rx_status->band = curchan->band;
268 rx_status->freq = curchan->center_freq;
269 rx_status->signal = (status->rssi * 64) / 100;
270 rx_status->noise = ATH_DEFAULT_NOISE_FLOOR;
271 rx_status->rate_idx = ath_rate2idx(sc, (status->rateKbps / 100));
272 rx_status->antenna = status->antenna;
273
274 if (status->flags & ATH_RX_MIC_ERROR)
275 rx_status->flag |= RX_FLAG_MMIC_ERROR;
276 if (status->flags & ATH_RX_FCS_ERROR)
277 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
278
279 rx_status->flag |= RX_FLAG_TSFT;
280 }
281
282 /*
283 * Update all associated nodes and VAPs
284 *
285 * Called when local channel width changed. e.g. if AP mode,
286 * update all associated STAs when the AP's channel width changes.
287 */
288 static void cwm_rate_updateallnodes(struct ath_softc *sc)
289 {
290 int flags = 0, error;
291 struct ieee80211_vif *vif;
292 enum ieee80211_if_types opmode;
293 struct ieee80211_hw *hw = sc->hw;
294
295 if (sc->sc_vaps[0]) {
296 vif = sc->sc_vaps[0]->av_if_data;
297 opmode = vif->type;
298 switch (opmode) {
299 case IEEE80211_IF_TYPE_STA:
300 /* sync with next received beacon */
301 flags |= ATH_IF_BEACON_SYNC;
302 if (hw->conf.ht_conf.ht_supported)
303 flags |= ATH_IF_HT;
304 error = ath_vap_up(sc, 0,
305 /* sc->sc_vaps[i]->av_btxctl->if_id, FIX ME if_id */
306 /* sc->sc_vaps[i]->bssid, FIX ME bssid */
307 sc->sc_curbssid,
308 sc->sc_curaid,
309 flags);
310 if (error)/* FIX ME if_id */
311 DPRINTF(sc, ATH_DEBUG_CWM,
312 "%s: Unable to up vap: "
313 "%d\n", __func__, 0);
314 else
315 DPRINTF(sc, ATH_DEBUG_CWM,
316 "%s: VAP up for id: "
317 "%d\n", __func__, 0);
318 break;
319 case IEEE80211_IF_TYPE_IBSS:
320 case IEEE80211_IF_TYPE_AP:
321 /* FIXME */
322 break;
323 default:
324 break;
325 }
326 }
327 }
328
329 /* Action: switch MAC from 40 to 20 (OR) 20 to 40 based on ch_width arg */
330 static void cwm_action_mac_change_chwidth(struct ath_softc *sc,
331 enum hal_ht_macmode ch_width)
332 {
333 ath_set_macmode(sc, ch_width);
334
335 /* notify rate control of new mode (select new rate table) */
336 cwm_rate_updateallnodes(sc);
337
338 /* XXX: all virtual APs - send ch width action management frame */
339 }
340
341 static u_int8_t parse_mpdudensity(u_int8_t mpdudensity)
342 {
343 /*
344 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
345 * 0 for no restriction
346 * 1 for 1/4 us
347 * 2 for 1/2 us
348 * 3 for 1 us
349 * 4 for 2 us
350 * 5 for 4 us
351 * 6 for 8 us
352 * 7 for 16 us
353 */
354 switch (mpdudensity) {
355 case 0:
356 return 0;
357 case 1:
358 case 2:
359 case 3:
360 /* Our lower layer calculations limit our precision to
361 1 microsecond */
362 return 1;
363 case 4:
364 return 2;
365 case 5:
366 return 4;
367 case 6:
368 return 8;
369 case 7:
370 return 16;
371 default:
372 return 0;
373 }
374 }
375
376 static int ath9k_start(struct ieee80211_hw *hw)
377 {
378 struct ath_softc *sc = hw->priv;
379 struct ieee80211_channel *curchan = hw->conf.channel;
380 struct hal_channel hchan;
381 int error = 0;
382
383 DPRINTF(sc, ATH_DEBUG_CONFIG, "%s: Starting driver with "
384 "initial channel: %d MHz\n", __func__, curchan->center_freq);
385
386 /* setup initial channel */
387
388 hchan.channel = curchan->center_freq;
389 hchan.channelFlags = ath_chan2flags(curchan, sc);
390
391 /* open ath_dev */
392 error = ath_open(sc, &hchan);
393 if (error) {
394 DPRINTF(sc, ATH_DEBUG_FATAL,
395 "%s: Unable to complete ath_open\n", __func__);
396 return error;
397 }
398
399 ieee80211_wake_queues(hw);
400 return 0;
401 }
402
403 static int ath9k_tx(struct ieee80211_hw *hw,
404 struct sk_buff *skb)
405 {
406 struct ath_softc *sc = hw->priv;
407 int hdrlen, padsize;
408
409 /* Add the padding after the header if this is not already done */
410 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
411 if (hdrlen & 3) {
412 padsize = hdrlen % 4;
413 if (skb_headroom(skb) < padsize)
414 return -1;
415 skb_push(skb, padsize);
416 memmove(skb->data, skb->data + padsize, hdrlen);
417 }
418
419 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: transmitting packet, skb: %p\n",
420 __func__,
421 skb);
422
423 if (ath_tx_start(sc, skb) != 0) {
424 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: TX failed\n", __func__);
425 dev_kfree_skb_any(skb);
426 /* FIXME: Check for proper return value from ATH_DEV */
427 return 0;
428 }
429
430 return 0;
431 }
432
433 static int ath9k_beacon_update(struct ieee80211_hw *hw,
434 struct sk_buff *skb)
435
436 {
437 struct ath_softc *sc = hw->priv;
438
439 DPRINTF(sc, ATH_DEBUG_BEACON, "%s: Update Beacon\n", __func__);
440 return ath9k_tx(hw, skb);
441 }
442
443 static void ath9k_stop(struct ieee80211_hw *hw)
444 {
445 struct ath_softc *sc = hw->priv;
446 int error;
447
448 DPRINTF(sc, ATH_DEBUG_CONFIG, "%s: Driver halt\n", __func__);
449
450 error = ath_suspend(sc);
451 if (error)
452 DPRINTF(sc, ATH_DEBUG_CONFIG,
453 "%s: Device is no longer present\n", __func__);
454
455 ieee80211_stop_queues(hw);
456 }
457
458 static int ath9k_add_interface(struct ieee80211_hw *hw,
459 struct ieee80211_if_init_conf *conf)
460 {
461 struct ath_softc *sc = hw->priv;
462 int error, ic_opmode = 0;
463
464 /* Support only vap for now */
465
466 if (sc->sc_nvaps)
467 return -1;
468
469 switch (conf->type) {
470 case IEEE80211_IF_TYPE_STA:
471 ic_opmode = HAL_M_STA;
472 default:
473 break;
474 }
475
476 DPRINTF(sc, ATH_DEBUG_CONFIG, "%s: Attach a VAP of type: %d\n",
477 __func__,
478 ic_opmode);
479
480 error = ath_vap_attach(sc, 0, conf->vif, ic_opmode, ic_opmode, 0);
481 if (error) {
482 DPRINTF(sc, ATH_DEBUG_FATAL,
483 "%s: Unable to attach vap, error: %d\n",
484 __func__, error);
485 goto bad;
486 }
487
488 return 0;
489 bad:
490 return -1;
491 }
492
493 static void ath9k_remove_interface(struct ieee80211_hw *hw,
494 struct ieee80211_if_init_conf *conf)
495 {
496 struct ath_softc *sc = hw->priv;
497 int error, flags = 0;
498
499 DPRINTF(sc, ATH_DEBUG_CONFIG, "%s: Detach VAP\n", __func__);
500
501 flags |= ATH_IF_HW_OFF;
502
503 error = ath_vap_down(sc, 0, flags);
504 if (error)
505 DPRINTF(sc, ATH_DEBUG_FATAL,
506 "%s: Unable to down vap, error: %d\n", __func__, error);
507
508 error = ath_vap_detach(sc, 0);
509 if (error)
510 DPRINTF(sc, ATH_DEBUG_FATAL,
511 "%s: Unable to detach vap, error: %d\n",
512 __func__, error);
513 }
514
515 static int ath9k_config(struct ieee80211_hw *hw,
516 struct ieee80211_conf *conf)
517 {
518 struct ath_softc *sc = hw->priv;
519 struct ieee80211_channel *curchan = hw->conf.channel;
520 struct hal_channel hchan;
521
522 DPRINTF(sc, ATH_DEBUG_CONFIG, "%s: Set channel: %d MHz\n",
523 __func__,
524 curchan->center_freq);
525
526 hchan.channel = curchan->center_freq;
527 hchan.channelFlags = ath_chan2flags(curchan, sc);
528 sc->sc_config.txpowlimit = 2 * conf->power_level;
529
530 /* set h/w channel */
531 if (ath_set_channel(sc, &hchan) < 0)
532 DPRINTF(sc, ATH_DEBUG_FATAL, "%s: Unable to set channel\n",
533 __func__);
534
535 return 0;
536 }
537
538 static int ath9k_config_interface(struct ieee80211_hw *hw,
539 struct ieee80211_vif *vif,
540 struct ieee80211_if_conf *conf)
541 {
542 struct ath_softc *sc = hw->priv;
543 int error = 0, flags = 0;
544 struct sk_buff *beacon;
545
546 if (!conf->bssid)
547 return 0;
548
549 switch (vif->type) {
550 case IEEE80211_IF_TYPE_STA:
551 /* XXX: Handle (conf->changed & IEEE80211_IFCC_SSID) */
552 flags |= ATH_IF_HW_ON;
553 /* sync with next received beacon */
554 flags |= ATH_IF_BEACON_SYNC;
555
556 DPRINTF(sc, ATH_DEBUG_CONFIG, "%s: Bring up VAP: %d\n",
557 __func__, 0);
558
559 error = ath_vap_up(sc, 0, conf->bssid, 0, flags);
560 if (error) {
561 DPRINTF(sc, ATH_DEBUG_FATAL,
562 "%s: Unable to bring up VAP: %d, error: %d\n",
563 __func__, 0, error);
564 return -1;
565 }
566
567 break;
568 case IEEE80211_IF_TYPE_IBSS:
569 if (!(conf->changed & IEEE80211_IFCC_BEACON))
570 break;
571 beacon = ieee80211_beacon_get(hw, vif);
572 if (!beacon)
573 return -ENOMEM;
574 ath9k_beacon_update(hw, beacon);
575 default:
576 break;
577 }
578
579 return 0;
580 }
581
582 #define SUPPORTED_FILTERS \
583 (FIF_PROMISC_IN_BSS | \
584 FIF_ALLMULTI | \
585 FIF_CONTROL | \
586 FIF_OTHER_BSS | \
587 FIF_BCN_PRBRESP_PROMISC | \
588 FIF_FCSFAIL)
589
590 /* Accept unicast, bcast and mcast frames */
591
592 static void ath9k_configure_filter(struct ieee80211_hw *hw,
593 unsigned int changed_flags,
594 unsigned int *total_flags,
595 int mc_count,
596 struct dev_mc_list *mclist)
597 {
598 struct ath_softc *sc = hw->priv;
599
600 changed_flags &= SUPPORTED_FILTERS;
601 *total_flags &= SUPPORTED_FILTERS;
602
603 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
604 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
605 ath_scan_start(sc);
606 else
607 ath_scan_end(sc);
608 }
609 }
610
611 static void ath9k_sta_notify(struct ieee80211_hw *hw,
612 struct ieee80211_vif *vif,
613 enum sta_notify_cmd cmd,
614 const u8 *addr)
615 {
616 struct ath_softc *sc = hw->priv;
617 struct ath_node *an;
618 unsigned long flags;
619 DECLARE_MAC_BUF(mac);
620
621 spin_lock_irqsave(&sc->node_lock, flags);
622 an = ath_node_find(sc, (u8 *) addr);
623 spin_unlock_irqrestore(&sc->node_lock, flags);
624
625 switch (cmd) {
626 case STA_NOTIFY_ADD:
627 spin_lock_irqsave(&sc->node_lock, flags);
628 if (!an) {
629 ath_node_attach(sc, (u8 *)addr, 0);
630 DPRINTF(sc, ATH_DEBUG_NODE, "%s: Attach a node: %s\n",
631 __func__,
632 print_mac(mac, addr));
633 } else {
634 ath_node_get(sc, (u8 *)addr);
635 }
636 spin_unlock_irqrestore(&sc->node_lock, flags);
637 break;
638 case STA_NOTIFY_REMOVE:
639 if (!an)
640 DPRINTF(sc, ATH_DEBUG_FATAL,
641 "%s: Removal of a non-existent node\n",
642 __func__);
643 else {
644 ath_node_put(sc, an, ATH9K_BH_STATUS_INTACT);
645 DPRINTF(sc, ATH_DEBUG_NODE, "%s: Put a node: %s\n",
646 __func__,
647 print_mac(mac, addr));
648 }
649 break;
650 default:
651 break;
652 }
653 }
654
655 static int ath9k_conf_tx(struct ieee80211_hw *hw,
656 u16 queue,
657 const struct ieee80211_tx_queue_params *params)
658 {
659 struct ath_softc *sc = hw->priv;
660 struct hal_txq_info qi;
661 int ret = 0, qnum;
662
663 if (queue >= WME_NUM_AC)
664 return 0;
665
666 qi.tqi_aifs = params->aifs;
667 qi.tqi_cwmin = params->cw_min;
668 qi.tqi_cwmax = params->cw_max;
669 qi.tqi_burstTime = params->txop;
670 qnum = ath_get_hal_qnum(queue, sc);
671
672 DPRINTF(sc, ATH_DEBUG_CONFIG,
673 "%s: Configure tx [queue/halq] [%d/%d], "
674 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
675 __func__,
676 queue,
677 qnum,
678 params->aifs,
679 params->cw_min,
680 params->cw_max,
681 params->txop);
682
683 ret = ath_txq_update(sc, qnum, &qi);
684 if (ret)
685 DPRINTF(sc, ATH_DEBUG_FATAL,
686 "%s: TXQ Update failed\n", __func__);
687
688 return ret;
689 }
690
691 static int ath9k_set_key(struct ieee80211_hw *hw,
692 enum set_key_cmd cmd,
693 const u8 *local_addr,
694 const u8 *addr,
695 struct ieee80211_key_conf *key)
696 {
697 struct ath_softc *sc = hw->priv;
698 int ret = 0;
699
700 DPRINTF(sc, ATH_DEBUG_KEYCACHE, " %s: Set HW Key\n", __func__);
701
702 switch (cmd) {
703 case SET_KEY:
704 ret = ath_key_config(sc, addr, key);
705 if (!ret) {
706 set_bit(key->keyidx, sc->sc_keymap);
707 key->hw_key_idx = key->keyidx;
708 /* push IV and Michael MIC generation to stack */
709 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
710 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
711 }
712 break;
713 case DISABLE_KEY:
714 ath_key_delete(sc, key);
715 clear_bit(key->keyidx, sc->sc_keymap);
716 sc->sc_keytype = HAL_CIPHER_CLR;
717 break;
718 default:
719 ret = -EINVAL;
720 }
721
722 return ret;
723 }
724
725 static void ath9k_ht_conf(struct ath_softc *sc,
726 struct ieee80211_bss_conf *bss_conf)
727 {
728 #define IEEE80211_HT_CAP_40MHZ_INTOLERANT BIT(14)
729 struct ath_ht_info *ht_info = &sc->sc_ht_info;
730
731 if (bss_conf->assoc_ht) {
732 ht_info->ext_chan_offset =
733 bss_conf->ht_bss_conf->bss_cap &
734 IEEE80211_HT_IE_CHA_SEC_OFFSET;
735
736 if (!(bss_conf->ht_conf->cap &
737 IEEE80211_HT_CAP_40MHZ_INTOLERANT) &&
738 (bss_conf->ht_bss_conf->bss_cap &
739 IEEE80211_HT_IE_CHA_WIDTH))
740 ht_info->tx_chan_width = HAL_HT_MACMODE_2040;
741 else
742 ht_info->tx_chan_width = HAL_HT_MACMODE_20;
743
744 cwm_action_mac_change_chwidth(sc, ht_info->tx_chan_width);
745 ht_info->maxampdu = 1 << (IEEE80211_HTCAP_MAXRXAMPDU_FACTOR +
746 bss_conf->ht_conf->ampdu_factor);
747 ht_info->mpdudensity =
748 parse_mpdudensity(bss_conf->ht_conf->ampdu_density);
749
750 }
751
752 #undef IEEE80211_HT_CAP_40MHZ_INTOLERANT
753 }
754
755 static void ath9k_bss_assoc_info(struct ath_softc *sc,
756 struct ieee80211_bss_conf *bss_conf)
757 {
758 struct ieee80211_hw *hw = sc->hw;
759 struct ieee80211_channel *curchan = hw->conf.channel;
760 struct hal_channel hchan;
761
762 if (bss_conf->assoc) {
763 /* FIXME : Do we need any other info
764 * which is part of association */
765 DPRINTF(sc, ATH_DEBUG_CONFIG, "%s: Bss Info ASSOC %d\n",
766 __func__,
767 bss_conf->aid);
768 sc->sc_curaid = bss_conf->aid;
769
770 DPRINTF(sc, ATH_DEBUG_CONFIG, "%s: Set channel: %d MHz\n",
771 __func__,
772 curchan->center_freq);
773
774 hchan.channel = curchan->center_freq;
775 hchan.channelFlags = ath_chan2flags(curchan, sc);
776
777 /* set h/w channel */
778 if (ath_set_channel(sc, &hchan) < 0)
779 DPRINTF(sc, ATH_DEBUG_FATAL,
780 "%s: Unable to set channel\n",
781 __func__);
782 } else {
783 DPRINTF(sc, ATH_DEBUG_CONFIG,
784 "%s: Bss Info DISSOC\n", __func__);
785 sc->sc_curaid = 0;
786 }
787 }
788
789 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
790 struct ieee80211_vif *vif,
791 struct ieee80211_bss_conf *bss_conf,
792 u32 changed)
793 {
794 struct ath_softc *sc = hw->priv;
795
796 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
797 DPRINTF(sc, ATH_DEBUG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
798 __func__,
799 bss_conf->use_short_preamble);
800 if (bss_conf->use_short_preamble)
801 sc->sc_flags |= ATH_PREAMBLE_SHORT;
802 else
803 sc->sc_flags &= ~ATH_PREAMBLE_SHORT;
804 }
805
806 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
807 DPRINTF(sc, ATH_DEBUG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
808 __func__,
809 bss_conf->use_cts_prot);
810 if (bss_conf->use_cts_prot &&
811 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
812 sc->sc_flags |= ATH_PROTECT_ENABLE;
813 else
814 sc->sc_flags &= ~ATH_PROTECT_ENABLE;
815 }
816
817 if (changed & BSS_CHANGED_HT) {
818 DPRINTF(sc, ATH_DEBUG_CONFIG, "%s: BSS Changed HT %d\n",
819 __func__,
820 bss_conf->assoc_ht);
821 ath9k_ht_conf(sc, bss_conf);
822 }
823
824 if (changed & BSS_CHANGED_ASSOC) {
825 DPRINTF(sc, ATH_DEBUG_CONFIG, "%s: BSS Changed ASSOC %d\n",
826 __func__,
827 bss_conf->assoc);
828 ath9k_bss_assoc_info(sc, bss_conf);
829 }
830 }
831
832 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
833 {
834 u_int64_t tsf;
835 struct ath_softc *sc = hw->priv;
836 struct ath_hal *ah = sc->sc_ah;
837
838 tsf = ath9k_hw_gettsf64(ah);
839
840 return tsf;
841 }
842
843 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
844 {
845 struct ath_softc *sc = hw->priv;
846 struct ath_hal *ah = sc->sc_ah;
847
848 ath9k_hw_reset_tsf(ah);
849 }
850
851 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
852 enum ieee80211_ampdu_mlme_action action,
853 const u8 *addr,
854 u16 tid,
855 u16 *ssn)
856 {
857 struct ath_softc *sc = hw->priv;
858 int ret = 0;
859
860 switch (action) {
861 case IEEE80211_AMPDU_RX_START:
862 ret = ath_rx_aggr_start(sc, addr, tid, ssn);
863 if (ret < 0)
864 DPRINTF(sc, ATH_DEBUG_FATAL,
865 "%s: Unable to start RX aggregation\n",
866 __func__);
867 break;
868 case IEEE80211_AMPDU_RX_STOP:
869 ret = ath_rx_aggr_stop(sc, addr, tid);
870 if (ret < 0)
871 DPRINTF(sc, ATH_DEBUG_FATAL,
872 "%s: Unable to stop RX aggregation\n",
873 __func__);
874 break;
875 case IEEE80211_AMPDU_TX_START:
876 ret = ath_tx_aggr_start(sc, addr, tid, ssn);
877 if (ret < 0)
878 DPRINTF(sc, ATH_DEBUG_FATAL,
879 "%s: Unable to start TX aggregation\n",
880 __func__);
881 else
882 ieee80211_start_tx_ba_cb_irqsafe(hw, (u8 *)addr, tid);
883 break;
884 case IEEE80211_AMPDU_TX_STOP:
885 ret = ath_tx_aggr_stop(sc, addr, tid);
886 if (ret < 0)
887 DPRINTF(sc, ATH_DEBUG_FATAL,
888 "%s: Unable to stop TX aggregation\n",
889 __func__);
890
891 ieee80211_stop_tx_ba_cb_irqsafe(hw, (u8 *)addr, tid);
892 break;
893 default:
894 DPRINTF(sc, ATH_DEBUG_FATAL,
895 "%s: Unknown AMPDU action\n", __func__);
896 }
897
898 return ret;
899 }
900
901 static struct ieee80211_ops ath9k_ops = {
902 .tx = ath9k_tx,
903 .start = ath9k_start,
904 .stop = ath9k_stop,
905 .add_interface = ath9k_add_interface,
906 .remove_interface = ath9k_remove_interface,
907 .config = ath9k_config,
908 .config_interface = ath9k_config_interface,
909 .configure_filter = ath9k_configure_filter,
910 .get_stats = NULL,
911 .sta_notify = ath9k_sta_notify,
912 .conf_tx = ath9k_conf_tx,
913 .get_tx_stats = NULL,
914 .bss_info_changed = ath9k_bss_info_changed,
915 .set_tim = NULL,
916 .set_key = ath9k_set_key,
917 .hw_scan = NULL,
918 .get_tkip_seq = NULL,
919 .set_rts_threshold = NULL,
920 .set_frag_threshold = NULL,
921 .set_retry_limit = NULL,
922 .get_tsf = ath9k_get_tsf,
923 .reset_tsf = ath9k_reset_tsf,
924 .tx_last_beacon = NULL,
925 .ampdu_action = ath9k_ampdu_action
926 };
927
928 u_int32_t ath_chan2flags(struct ieee80211_channel *chan,
929 struct ath_softc *sc)
930 {
931 struct ieee80211_hw *hw = sc->hw;
932 struct ath_ht_info *ht_info = &sc->sc_ht_info;
933
934 if (sc->sc_scanning) {
935 if (chan->band == IEEE80211_BAND_5GHZ) {
936 if (ath_check_chanflags(chan, CHANNEL_A_HT20, sc))
937 return CHANNEL_A_HT20;
938 else
939 return CHANNEL_A;
940 } else {
941 if (ath_check_chanflags(chan, CHANNEL_G_HT20, sc))
942 return CHANNEL_G_HT20;
943 else if (ath_check_chanflags(chan, CHANNEL_G, sc))
944 return CHANNEL_G;
945 else
946 return CHANNEL_B;
947 }
948 } else {
949 if (chan->band == IEEE80211_BAND_2GHZ) {
950 if (!hw->conf.ht_conf.ht_supported) {
951 if (ath_check_chanflags(chan, CHANNEL_G, sc))
952 return CHANNEL_G;
953 else
954 return CHANNEL_B;
955 }
956 if ((ht_info->ext_chan_offset ==
957 IEEE80211_HT_IE_CHA_SEC_NONE) &&
958 (ht_info->tx_chan_width == HAL_HT_MACMODE_20))
959 return CHANNEL_G_HT20;
960 if ((ht_info->ext_chan_offset ==
961 IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
962 (ht_info->tx_chan_width == HAL_HT_MACMODE_2040))
963 return CHANNEL_G_HT40PLUS;
964 if ((ht_info->ext_chan_offset ==
965 IEEE80211_HT_IE_CHA_SEC_BELOW) &&
966 (ht_info->tx_chan_width == HAL_HT_MACMODE_2040))
967 return CHANNEL_G_HT40MINUS;
968 return CHANNEL_B;
969 } else {
970 if (!hw->conf.ht_conf.ht_supported)
971 return CHANNEL_A;
972 if ((ht_info->ext_chan_offset ==
973 IEEE80211_HT_IE_CHA_SEC_NONE) &&
974 (ht_info->tx_chan_width == HAL_HT_MACMODE_20))
975 return CHANNEL_A_HT20;
976 if ((ht_info->ext_chan_offset ==
977 IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
978 (ht_info->tx_chan_width == HAL_HT_MACMODE_2040))
979 return CHANNEL_A_HT40PLUS;
980 if ((ht_info->ext_chan_offset ==
981 IEEE80211_HT_IE_CHA_SEC_BELOW) &&
982 (ht_info->tx_chan_width == HAL_HT_MACMODE_2040))
983 return CHANNEL_A_HT40MINUS;
984 return CHANNEL_A;
985 }
986 }
987 }
988
989 void ath_setup_channel_list(struct ath_softc *sc,
990 enum ieee80211_clist_cmd cmd,
991 const struct hal_channel *chans,
992 int nchan,
993 const u_int8_t *regclassids,
994 u_int nregclass,
995 int countrycode)
996 {
997 const struct hal_channel *c;
998 int i, a = 0, b = 0, flags;
999
1000 if (countrycode == CTRY_DEFAULT) {
1001 for (i = 0; i < nchan; i++) {
1002 c = &chans[i];
1003 flags = 0;
1004 /* XXX: Ah! make more readable, and
1005 * idententation friendly */
1006 if (IS_CHAN_2GHZ(c) &&
1007 !test_update_chan(IEEE80211_BAND_2GHZ, c, sc)) {
1008 sc->channels[IEEE80211_BAND_2GHZ][a].band =
1009 IEEE80211_BAND_2GHZ;
1010 sc->channels[IEEE80211_BAND_2GHZ][a].
1011 center_freq =
1012 c->channel;
1013 sc->channels[IEEE80211_BAND_2GHZ][a].max_power =
1014 c->maxTxPower;
1015 sc->channels[IEEE80211_BAND_2GHZ][a].hw_value =
1016 c->channelFlags;
1017
1018 if (c->privFlags & CHANNEL_DISALLOW_ADHOC)
1019 flags |= IEEE80211_CHAN_NO_IBSS;
1020 if (IS_CHAN_PASSIVE(c))
1021 flags |= IEEE80211_CHAN_PASSIVE_SCAN;
1022
1023 sc->channels[IEEE80211_BAND_2GHZ][a].flags =
1024 flags;
1025 sc->sbands[IEEE80211_BAND_2GHZ].n_channels++;
1026 a++;
1027 DPRINTF(sc, ATH_DEBUG_CONFIG,
1028 "%s: 2MHz channel: %d, "
1029 "channelFlags: 0x%x\n",
1030 __func__,
1031 c->channel,
1032 c->channelFlags);
1033 } else if (IS_CHAN_5GHZ(c) &&
1034 !test_update_chan(IEEE80211_BAND_5GHZ, c, sc)) {
1035 sc->channels[IEEE80211_BAND_5GHZ][b].band =
1036 IEEE80211_BAND_5GHZ;
1037 sc->channels[IEEE80211_BAND_5GHZ][b].
1038 center_freq =
1039 c->channel;
1040 sc->channels[IEEE80211_BAND_5GHZ][b].max_power =
1041 c->maxTxPower;
1042 sc->channels[IEEE80211_BAND_5GHZ][b].hw_value =
1043 c->channelFlags;
1044
1045 if (c->privFlags & CHANNEL_DISALLOW_ADHOC)
1046 flags |= IEEE80211_CHAN_NO_IBSS;
1047 if (IS_CHAN_PASSIVE(c))
1048 flags |= IEEE80211_CHAN_PASSIVE_SCAN;
1049
1050 sc->channels[IEEE80211_BAND_5GHZ][b].
1051 flags = flags;
1052 sc->sbands[IEEE80211_BAND_5GHZ].n_channels++;
1053 b++;
1054 DPRINTF(sc, ATH_DEBUG_CONFIG,
1055 "%s: 5MHz channel: %d, "
1056 "channelFlags: 0x%x\n",
1057 __func__,
1058 c->channel,
1059 c->channelFlags);
1060 }
1061 }
1062 }
1063 }
1064
1065 void ath_get_beaconconfig(struct ath_softc *sc,
1066 int if_id,
1067 struct ath_beacon_config *conf)
1068 {
1069 struct ieee80211_hw *hw = sc->hw;
1070
1071 /* fill in beacon config data */
1072
1073 conf->beacon_interval = hw->conf.beacon_int;
1074 conf->listen_interval = 100;
1075 conf->dtim_count = 1;
1076 conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
1077 }
1078
1079 struct sk_buff *ath_get_beacon(struct ath_softc *sc,
1080 int if_id,
1081 struct ath_beacon_offset *bo,
1082 struct ath_tx_control *txctl)
1083 {
1084 return NULL;
1085 }
1086
1087 int ath_update_beacon(struct ath_softc *sc,
1088 int if_id,
1089 struct ath_beacon_offset *bo,
1090 struct sk_buff *skb,
1091 int mcast)
1092 {
1093 return 0;
1094 }
1095
1096 void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
1097 struct ath_xmit_status *tx_status, struct ath_node *an)
1098 {
1099 struct ieee80211_hw *hw = sc->hw;
1100 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
1101
1102 DPRINTF(sc, ATH_DEBUG_XMIT,
1103 "%s: TX complete: skb: %p\n", __func__, skb);
1104
1105 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
1106 tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
1107 /* free driver's private data area of tx_info */
1108 if (tx_info->driver_data[0] != NULL)
1109 kfree(tx_info->driver_data[0]);
1110 tx_info->driver_data[0] = NULL;
1111 }
1112
1113 if (tx_status->flags & ATH_TX_BAR) {
1114 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
1115 tx_status->flags &= ~ATH_TX_BAR;
1116 }
1117 if (tx_status->flags)
1118 tx_info->status.excessive_retries = 1;
1119
1120 tx_info->status.retry_count = tx_status->retries;
1121
1122 ieee80211_tx_status(hw, skb);
1123 if (an)
1124 ath_node_put(sc, an, ATH9K_BH_STATUS_CHANGE);
1125 }
1126
1127 int ath__rx_indicate(struct ath_softc *sc,
1128 struct sk_buff *skb,
1129 struct ath_recv_status *status,
1130 u_int16_t keyix)
1131 {
1132 struct ieee80211_hw *hw = sc->hw;
1133 struct ath_node *an = NULL;
1134 struct ieee80211_rx_status rx_status;
1135 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1136 int hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1137 int padsize;
1138 enum ATH_RX_TYPE st;
1139
1140 /* see if any padding is done by the hw and remove it */
1141 if (hdrlen & 3) {
1142 padsize = hdrlen % 4;
1143 memmove(skb->data + padsize, skb->data, hdrlen);
1144 skb_pull(skb, padsize);
1145 }
1146
1147 /* remove FCS before passing up to protocol stack */
1148 skb_trim(skb, (skb->len - FCS_LEN));
1149
1150 /* Prepare rx status */
1151 ath9k_rx_prepare(sc, skb, status, &rx_status);
1152
1153 if (!(keyix == HAL_RXKEYIX_INVALID) &&
1154 !(status->flags & ATH_RX_DECRYPT_ERROR)) {
1155 rx_status.flag |= RX_FLAG_DECRYPTED;
1156 } else if ((le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_PROTECTED)
1157 && !(status->flags & ATH_RX_DECRYPT_ERROR)
1158 && skb->len >= hdrlen + 4) {
1159 keyix = skb->data[hdrlen + 3] >> 6;
1160
1161 if (test_bit(keyix, sc->sc_keymap))
1162 rx_status.flag |= RX_FLAG_DECRYPTED;
1163 }
1164
1165 spin_lock_bh(&sc->node_lock);
1166 an = ath_node_find(sc, hdr->addr2);
1167 spin_unlock_bh(&sc->node_lock);
1168
1169 if (an) {
1170 ath_rx_input(sc, an,
1171 hw->conf.ht_conf.ht_supported,
1172 skb, status, &st);
1173 }
1174 if (!an || (st != ATH_RX_CONSUMED))
1175 __ieee80211_rx(hw, skb, &rx_status);
1176
1177 return 0;
1178 }
1179
1180 int ath_rx_subframe(struct ath_node *an,
1181 struct sk_buff *skb,
1182 struct ath_recv_status *status)
1183 {
1184 struct ath_softc *sc = an->an_sc;
1185 struct ieee80211_hw *hw = sc->hw;
1186 struct ieee80211_rx_status rx_status;
1187
1188 /* Prepare rx status */
1189 ath9k_rx_prepare(sc, skb, status, &rx_status);
1190 if (!(status->flags & ATH_RX_DECRYPT_ERROR))
1191 rx_status.flag |= RX_FLAG_DECRYPTED;
1192
1193 __ieee80211_rx(hw, skb, &rx_status);
1194
1195 return 0;
1196 }
1197
1198 enum hal_ht_macmode ath_cwm_macmode(struct ath_softc *sc)
1199 {
1200 return sc->sc_ht_info.tx_chan_width;
1201 }
1202
1203 void ath_setup_rate(struct ath_softc *sc,
1204 enum wireless_mode wMode,
1205 enum RATE_TYPE type,
1206 const struct hal_rate_table *rt)
1207 {
1208 int i, maxrates, a = 0, b = 0;
1209 struct ieee80211_supported_band *band_2ghz;
1210 struct ieee80211_supported_band *band_5ghz;
1211 struct ieee80211_rate *rates_2ghz;
1212 struct ieee80211_rate *rates_5ghz;
1213
1214 if ((wMode >= WIRELESS_MODE_MAX) || (type != NORMAL_RATE))
1215 return;
1216
1217 band_2ghz = &sc->sbands[IEEE80211_BAND_2GHZ];
1218 band_5ghz = &sc->sbands[IEEE80211_BAND_5GHZ];
1219 rates_2ghz = sc->rates[IEEE80211_BAND_2GHZ];
1220 rates_5ghz = sc->rates[IEEE80211_BAND_5GHZ];
1221
1222 if (rt->rateCount > ATH_RATE_MAX)
1223 maxrates = ATH_RATE_MAX;
1224 else
1225 maxrates = rt->rateCount;
1226
1227 if ((band_2ghz->n_bitrates != 0) && (band_5ghz->n_bitrates != 0)) {
1228 DPRINTF(sc, ATH_DEBUG_CONFIG,
1229 "%s: Rates already setup\n", __func__);
1230 return;
1231 }
1232
1233 for (i = 0; i < maxrates; i++) {
1234 switch (wMode) {
1235 case WIRELESS_MODE_11b:
1236 case WIRELESS_MODE_11g:
1237 rates_2ghz[a].bitrate = rt->info[i].rateKbps / 100;
1238 rates_2ghz[a].hw_value = rt->info[i].rateCode;
1239 a++;
1240 band_2ghz->n_bitrates = a;
1241 break;
1242 case WIRELESS_MODE_11a:
1243 rates_5ghz[b].bitrate = rt->info[i].rateKbps / 100;
1244 rates_5ghz[b].hw_value = rt->info[i].rateCode;
1245 b++;
1246 band_5ghz->n_bitrates = b;
1247 break;
1248 default:
1249 break;
1250 }
1251 }
1252
1253 if (band_2ghz->n_bitrates) {
1254 for (i = 0; i < band_2ghz->n_bitrates; i++) {
1255 DPRINTF(sc, ATH_DEBUG_CONFIG,
1256 "%s: 2GHz Rate: %2dMbps, ratecode: %2d\n",
1257 __func__,
1258 rates_2ghz[i].bitrate / 10,
1259 rates_2ghz[i].hw_value);
1260 }
1261 } else if (band_5ghz->n_bitrates) {
1262 for (i = 0; i < band_5ghz->n_bitrates; i++) {
1263 DPRINTF(sc, ATH_DEBUG_CONFIG,
1264 "%s: 5Ghz Rate: %2dMbps, ratecode: %2d\n",
1265 __func__,
1266 rates_5ghz[i].bitrate / 10,
1267 rates_5ghz[i].hw_value);
1268 }
1269 }
1270 }
1271
1272 static int ath_detach(struct ath_softc *sc)
1273 {
1274 struct ieee80211_hw *hw = sc->hw;
1275
1276 DPRINTF(sc, ATH_DEBUG_CONFIG, "%s: Detach ATH hw\n", __func__);
1277
1278 /* Unregister hw */
1279
1280 ieee80211_unregister_hw(hw);
1281
1282 /* unregister Rate control */
1283 ath_rate_control_unregister();
1284
1285 /* tx/rx cleanup */
1286
1287 ath_rx_cleanup(sc);
1288 ath_tx_cleanup(sc);
1289
1290 /* Deinit */
1291
1292 ath_deinit(sc);
1293
1294 return 0;
1295 }
1296
1297 static int ath_attach(u_int16_t devid,
1298 struct ath_softc *sc)
1299 {
1300 struct ieee80211_hw *hw = sc->hw;
1301 int error = 0;
1302
1303 DPRINTF(sc, ATH_DEBUG_CONFIG, "%s: Attach ATH hw\n", __func__);
1304
1305 error = ath_init(devid, sc);
1306 if (error != 0)
1307 return error;
1308
1309 /* Init nodes */
1310
1311 INIT_LIST_HEAD(&sc->node_list);
1312 spin_lock_init(&sc->node_lock);
1313
1314 /* get mac address from hardware and set in mac80211 */
1315
1316 SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
1317
1318 /* setup channels and rates */
1319
1320 sc->sbands[IEEE80211_BAND_2GHZ].channels =
1321 sc->channels[IEEE80211_BAND_2GHZ];
1322 sc->sbands[IEEE80211_BAND_2GHZ].bitrates =
1323 sc->rates[IEEE80211_BAND_2GHZ];
1324 sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
1325
1326 if (sc->sc_hashtsupport)
1327 /* Setup HT capabilities for 2.4Ghz*/
1328 setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_info);
1329
1330 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
1331 &sc->sbands[IEEE80211_BAND_2GHZ];
1332
1333 if (sc->sc_ah->ah_caps.halWirelessModes & ATH9K_MODE_SEL_11A) {
1334 sc->sbands[IEEE80211_BAND_5GHZ].channels =
1335 sc->channels[IEEE80211_BAND_5GHZ];
1336 sc->sbands[IEEE80211_BAND_5GHZ].bitrates =
1337 sc->rates[IEEE80211_BAND_5GHZ];
1338 sc->sbands[IEEE80211_BAND_5GHZ].band =
1339 IEEE80211_BAND_5GHZ;
1340
1341 if (sc->sc_hashtsupport)
1342 /* Setup HT capabilities for 5Ghz*/
1343 setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_info);
1344
1345 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
1346 &sc->sbands[IEEE80211_BAND_5GHZ];
1347 }
1348
1349 /* FIXME: Have to figure out proper hw init values later */
1350
1351 hw->queues = 4;
1352 hw->ampdu_queues = 1;
1353
1354 /* Register rate control */
1355 hw->rate_control_algorithm = "ath9k_rate_control";
1356 error = ath_rate_control_register();
1357 if (error != 0) {
1358 DPRINTF(sc, ATH_DEBUG_FATAL,
1359 "%s: Unable to register rate control "
1360 "algorithm:%d\n", __func__, error);
1361 ath_rate_control_unregister();
1362 goto bad;
1363 }
1364
1365 error = ieee80211_register_hw(hw);
1366 if (error != 0) {
1367 ath_rate_control_unregister();
1368 goto bad;
1369 }
1370
1371 /* initialize tx/rx engine */
1372
1373 error = ath_tx_init(sc, ATH_TXBUF);
1374 if (error != 0)
1375 goto bad1;
1376
1377 error = ath_rx_init(sc, ATH_RXBUF);
1378 if (error != 0)
1379 goto bad1;
1380
1381 return 0;
1382 bad1:
1383 ath_detach(sc);
1384 bad:
1385 return error;
1386 }
1387
1388 static irqreturn_t ath_isr(int irq, void *dev_id)
1389 {
1390 struct ath_softc *sc = dev_id;
1391 int sched;
1392
1393 /* always acknowledge the interrupt */
1394 sched = ath_intr(sc);
1395
1396 switch (sched) {
1397 case ATH_ISR_NOSCHED:
1398 return IRQ_HANDLED;
1399 case ATH_ISR_NOTMINE:
1400 return IRQ_NONE;
1401 default:
1402 tasklet_schedule(&sc->intr_tq);
1403 return IRQ_HANDLED;
1404
1405 }
1406 }
1407
1408 static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1409 {
1410 void __iomem *mem;
1411 struct ath_softc *sc;
1412 struct ieee80211_hw *hw;
1413 const char *athname;
1414 u_int8_t csz;
1415 u32 val;
1416 int ret = 0;
1417
1418 if (pci_enable_device(pdev))
1419 return -EIO;
1420
1421 /* XXX 32-bit addressing only */
1422 if (pci_set_dma_mask(pdev, 0xffffffff)) {
1423 printk(KERN_ERR "ath_pci: 32-bit DMA not available\n");
1424 ret = -ENODEV;
1425 goto bad;
1426 }
1427
1428 /*
1429 * Cache line size is used to size and align various
1430 * structures used to communicate with the hardware.
1431 */
1432 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
1433 if (csz == 0) {
1434 /*
1435 * Linux 2.4.18 (at least) writes the cache line size
1436 * register as a 16-bit wide register which is wrong.
1437 * We must have this setup properly for rx buffer
1438 * DMA to work so force a reasonable value here if it
1439 * comes up zero.
1440 */
1441 csz = L1_CACHE_BYTES / sizeof(u_int32_t);
1442 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
1443 }
1444 /*
1445 * The default setting of latency timer yields poor results,
1446 * set it to the value used by other systems. It may be worth
1447 * tweaking this setting more.
1448 */
1449 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
1450
1451 pci_set_master(pdev);
1452
1453 /*
1454 * Disable the RETRY_TIMEOUT register (0x41) to keep
1455 * PCI Tx retries from interfering with C3 CPU state.
1456 */
1457 pci_read_config_dword(pdev, 0x40, &val);
1458 if ((val & 0x0000ff00) != 0)
1459 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1460
1461 ret = pci_request_region(pdev, 0, "ath9k");
1462 if (ret) {
1463 dev_err(&pdev->dev, "PCI memory region reserve error\n");
1464 ret = -ENODEV;
1465 goto bad;
1466 }
1467
1468 mem = pci_iomap(pdev, 0, 0);
1469 if (!mem) {
1470 printk(KERN_ERR "PCI memory map error\n") ;
1471 ret = -EIO;
1472 goto bad1;
1473 }
1474
1475 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
1476 if (hw == NULL) {
1477 printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
1478 goto bad2;
1479 }
1480
1481 SET_IEEE80211_DEV(hw, &pdev->dev);
1482 pci_set_drvdata(pdev, hw);
1483
1484 sc = hw->priv;
1485 sc->hw = hw;
1486 sc->pdev = pdev;
1487 sc->mem = mem;
1488
1489 if (ath_attach(id->device, sc) != 0) {
1490 ret = -ENODEV;
1491 goto bad3;
1492 }
1493
1494 /* setup interrupt service routine */
1495
1496 if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
1497 printk(KERN_ERR "%s: request_irq failed\n",
1498 wiphy_name(hw->wiphy));
1499 ret = -EIO;
1500 goto bad4;
1501 }
1502
1503 athname = ath9k_hw_probe(id->vendor, id->device);
1504
1505 printk(KERN_INFO "%s: %s: mem=0x%lx, irq=%d\n",
1506 wiphy_name(hw->wiphy),
1507 athname ? athname : "Atheros ???",
1508 (unsigned long)mem, pdev->irq);
1509
1510 return 0;
1511 bad4:
1512 ath_detach(sc);
1513 bad3:
1514 ieee80211_free_hw(hw);
1515 bad2:
1516 pci_iounmap(pdev, mem);
1517 bad1:
1518 pci_release_region(pdev, 0);
1519 bad:
1520 pci_disable_device(pdev);
1521 return ret;
1522 }
1523
1524 static void ath_pci_remove(struct pci_dev *pdev)
1525 {
1526 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1527 struct ath_softc *sc = hw->priv;
1528
1529 if (pdev->irq)
1530 free_irq(pdev->irq, sc);
1531 ath_detach(sc);
1532 pci_iounmap(pdev, sc->mem);
1533 pci_release_region(pdev, 0);
1534 pci_disable_device(pdev);
1535 ieee80211_free_hw(hw);
1536 }
1537
1538 #ifdef CONFIG_PM
1539
1540 static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1541 {
1542 pci_save_state(pdev);
1543 pci_disable_device(pdev);
1544 pci_set_power_state(pdev, 3);
1545
1546 return 0;
1547 }
1548
1549 static int ath_pci_resume(struct pci_dev *pdev)
1550 {
1551 u32 val;
1552 int err;
1553
1554 err = pci_enable_device(pdev);
1555 if (err)
1556 return err;
1557 pci_restore_state(pdev);
1558 /*
1559 * Suspend/Resume resets the PCI configuration space, so we have to
1560 * re-disable the RETRY_TIMEOUT register (0x41) to keep
1561 * PCI Tx retries from interfering with C3 CPU state
1562 */
1563 pci_read_config_dword(pdev, 0x40, &val);
1564 if ((val & 0x0000ff00) != 0)
1565 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1566
1567 return 0;
1568 }
1569
1570 #endif /* CONFIG_PM */
1571
1572 MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
1573
1574 static struct pci_driver ath_pci_driver = {
1575 .name = "ath9k",
1576 .id_table = ath_pci_id_table,
1577 .probe = ath_pci_probe,
1578 .remove = ath_pci_remove,
1579 #ifdef CONFIG_PM
1580 .suspend = ath_pci_suspend,
1581 .resume = ath_pci_resume,
1582 #endif /* CONFIG_PM */
1583 };
1584
1585 static int __init init_ath_pci(void)
1586 {
1587 printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
1588
1589 if (pci_register_driver(&ath_pci_driver) < 0) {
1590 printk(KERN_ERR
1591 "ath_pci: No devices found, driver not installed.\n");
1592 pci_unregister_driver(&ath_pci_driver);
1593 return -ENODEV;
1594 }
1595
1596 return 0;
1597 }
1598 module_init(init_ath_pci);
1599
1600 static void __exit exit_ath_pci(void)
1601 {
1602 pci_unregister_driver(&ath_pci_driver);
1603 printk(KERN_INFO "%s: driver unloaded\n", dev_info);
1604 }
1605 module_exit(exit_ath_pci);
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