package/boot/uboot-lantiq/patches/0045-no_extern_inline.patch

   1 From b11c5d1dc29e81326d1215011d19377737082aeb Mon Sep 17 00:00:00 2001
   2 From: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
   3 Date: Wed, 1 Jul 2015 16:36:43 +0200
   4 Subject: [PATCH] MIPS: change 'extern inline' to 'static inline'
   5
   6 The kernel changed it a long time ago. Also this is now broken
   7 on gcc-5.x.
   8
   9 Reported-by: Andy Kennedy <andy.kennedy@adtran.com>
  10 Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
  11 ---
  12  arch/mips/include/asm/io.h     | 12 ++++++------
  13  arch/mips/include/asm/system.h |  6 +++---
  14  2 files changed, 9 insertions(+), 9 deletions(-)
  15
  16 diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
  17 index 3fa37f5..a7ab087 100644
  18 --- a/arch/mips/include/asm/io.h
  19 +++ b/arch/mips/include/asm/io.h
  20 @@ -117,7 +117,7 @@ static inline void set_io_port_base(unsigned long base)
  21   * Change virtual addresses to physical addresses and vv.
  22   * These are trivial on the 1:1 Linux/MIPS mapping
  23   */
  24 -extern inline phys_addr_t virt_to_phys(volatile void * address)
  25 +static inline phys_addr_t virt_to_phys(volatile void * address)
  26  {
  27  #ifndef CONFIG_64BIT
  28         return CPHYSADDR(address);
  29 @@ -126,7 +126,7 @@ extern inline phys_addr_t virt_to_phys(volatile void * address)
  30  #endif
  31  }
  32
  33 -extern inline void * phys_to_virt(unsigned long address)
  34 +static inline void * phys_to_virt(unsigned long address)
  35  {
  36  #ifndef CONFIG_64BIT
  37         return (void *)KSEG0ADDR(address);
  38 @@ -138,7 +138,7 @@ extern inline void * phys_to_virt(unsigned long address)
  39  /*
  40   * IO bus memory addresses are also 1:1 with the physical address
  41   */
  42 -extern inline unsigned long virt_to_bus(volatile void * address)
  43 +static inline unsigned long virt_to_bus(volatile void * address)
  44  {
  45  #ifndef CONFIG_64BIT
  46         return CPHYSADDR(address);
  47 @@ -147,7 +147,7 @@ extern inline unsigned long virt_to_bus(volatile void * address)
  48  #endif
  49  }
  50
  51 -extern inline void * bus_to_virt(unsigned long address)
  52 +static inline void * bus_to_virt(unsigned long address)
  53  {
  54  #ifndef CONFIG_64BIT
  55         return (void *)KSEG0ADDR(address);
  56 @@ -165,12 +165,12 @@ extern unsigned long isa_slot_offset;
  57  extern void * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
  58
  59  #if 0
  60 -extern inline void *ioremap(unsigned long offset, unsigned long size)
  61 +static inline void *ioremap(unsigned long offset, unsigned long size)
  62  {
  63         return __ioremap(offset, size, _CACHE_UNCACHED);
  64  }
  65
  66 -extern inline void *ioremap_nocache(unsigned long offset, unsigned long size)
  67 +static inline void *ioremap_nocache(unsigned long offset, unsigned long size)
  68  {
  69         return __ioremap(offset, size, _CACHE_UNCACHED);
  70  }
  71 diff --git a/arch/mips/include/asm/system.h b/arch/mips/include/asm/system.h
  72 index 7a28952..d56f73b 100644
  73 --- a/arch/mips/include/asm/system.h
  74 +++ b/arch/mips/include/asm/system.h
  75 @@ -22,7 +22,7 @@
  76  #include <linux/kernel.h>
  77  #endif
  78
  79 -extern __inline__ void
  80 +static __inline__ void
  81  __sti(void)
  82  {
  83         __asm__ __volatile__(
  84 @@ -46,7 +46,7 @@ __sti(void)
  85   * R4000/R4400 need three nops, the R4600 two nops and the R10000 needs
  86   * no nops at all.
  87   */
  88 -extern __inline__ void
  89 +static __inline__ void
  90  __cli(void)
  91  {
  92         __asm__ __volatile__(
  93 @@ -207,7 +207,7 @@ do { \
  94   * For 32 and 64 bit operands we can take advantage of ll and sc.
  95   * FIXME: This doesn't work for R3000 machines.
  96   */
  97 -extern __inline__ unsigned long xchg_u32(volatile int * m, unsigned long val)
  98 +static __inline__ unsigned long xchg_u32(volatile int * m, unsigned long val)
  99  {
 100  #ifdef CONFIG_CPU_HAS_LLSC
 101         unsigned long dummy;