package/boot/uboot-lantiq/patches/0106-MIPS-add-board-support-for-Gigaset-SX76X.patch

   1 From 9e9dec563e4d061e7b34d2d59a89eb05c60f43a7 Mon Sep 17 00:00:00 2001
   2 From: Luka Perkov <luka@openwrt.org>
   3 Date: Sat, 2 Mar 2013 23:34:00 +0100
   4 Subject: MIPS: add board support for Gigaset SX76X
   5
   6 Signed-off-by: Luka Perkov <luka@openwrt.org>
   7 Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
   8
   9 --- /dev/null
  10 +++ b/board/gigaset/sx76x/Makefile
  11 @@ -0,0 +1,27 @@
  12 +#
  13 +# Copyright (C) 2000-2011 Wolfgang Denk, DENX Software Engineering, wd@denx.de
  14 +#
  15 +# SPDX-License-Identifier:     GPL-2.0+
  16 +#
  17 +
  18 +include $(TOPDIR)/config.mk
  19 +
  20 +LIB    = $(obj)lib$(BOARD).o
  21 +
  22 +COBJS  = $(BOARD).o
  23 +
  24 +SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
  25 +OBJS   := $(addprefix $(obj),$(COBJS))
  26 +SOBJS  := $(addprefix $(obj),$(SOBJS))
  27 +
  28 +$(LIB):        $(obj).depend $(OBJS) $(SOBJS)
  29 +       $(call cmd_link_o_target, $(OBJS) $(SOBJS))
  30 +
  31 +#########################################################################
  32 +
  33 +# defines $(obj).depend target
  34 +include $(SRCTREE)/rules.mk
  35 +
  36 +sinclude $(obj).depend
  37 +
  38 +#########################################################################
  39 --- /dev/null
  40 +++ b/board/gigaset/sx76x/config.mk
  41 @@ -0,0 +1,7 @@
  42 +#
  43 +# Copyright (C) 2011-2013 Daniel Schwierzeck, daniel.schwierzeck@gmail.com
  44 +#
  45 +# SPDX-License-Identifier:     GPL-2.0+
  46 +#
  47 +
  48 +PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(BOARDDIR)
  49 --- /dev/null
  50 +++ b/board/gigaset/sx76x/ddr_settings.h
  51 @@ -0,0 +1,55 @@
  52 +/*
  53 + * Copyright (C) 2011-2013 Luka Perkov <luka@openwrt.org>
  54 + *
  55 + * This file has been generated with lantiq_ram_extract_magic.awk script.
  56 + *
  57 + * SPDX-License-Identifier:    GPL-2.0+
  58 + */
  59 +
  60 +#define MC_DC00_VALUE  0x1B1B
  61 +#define MC_DC01_VALUE  0x0
  62 +#define MC_DC02_VALUE  0x0
  63 +#define MC_DC03_VALUE  0x0
  64 +#define MC_DC04_VALUE  0x0
  65 +#define MC_DC05_VALUE  0x200
  66 +#define MC_DC06_VALUE  0x605
  67 +#define MC_DC07_VALUE  0x303
  68 +#define MC_DC08_VALUE  0x202
  69 +#define MC_DC09_VALUE  0x70A
  70 +#define MC_DC10_VALUE  0x203
  71 +#define MC_DC11_VALUE  0xC02
  72 +#define MC_DC12_VALUE  0x1C8
  73 +#define MC_DC13_VALUE  0x1
  74 +#define MC_DC14_VALUE  0x0
  75 +#define MC_DC15_VALUE  0xF3E
  76 +#define MC_DC16_VALUE  0xC800
  77 +#define MC_DC17_VALUE  0xD
  78 +#define MC_DC18_VALUE  0x300
  79 +#define MC_DC19_VALUE  0x200
  80 +#define MC_DC20_VALUE  0xA04
  81 +#define MC_DC21_VALUE  0xF00
  82 +#define MC_DC22_VALUE  0xF0F
  83 +#define MC_DC23_VALUE  0x0
  84 +#define MC_DC24_VALUE  0x63
  85 +#define MC_DC25_VALUE  0x0
  86 +#define MC_DC26_VALUE  0x100
  87 +#define MC_DC27_VALUE  0x0
  88 +#define MC_DC28_VALUE  0x514
  89 +#define MC_DC29_VALUE  0x2D89
  90 +#define MC_DC30_VALUE  0x8300
  91 +#define MC_DC31_VALUE  0x2002
  92 +#define MC_DC32_VALUE  0x0
  93 +#define MC_DC33_VALUE  0x0
  94 +#define MC_DC34_VALUE  0x0
  95 +#define MC_DC35_VALUE  0x0
  96 +#define MC_DC36_VALUE  0x0
  97 +#define MC_DC37_VALUE  0x0
  98 +#define MC_DC38_VALUE  0x0
  99 +#define MC_DC39_VALUE  0x0
 100 +#define MC_DC40_VALUE  0x0
 101 +#define MC_DC41_VALUE  0x0
 102 +#define MC_DC42_VALUE  0x0
 103 +#define MC_DC43_VALUE  0x0
 104 +#define MC_DC44_VALUE  0x0
 105 +#define MC_DC45_VALUE  0x500
 106 +#define MC_DC46_VALUE  0x0
 107 --- /dev/null
 108 +++ b/board/gigaset/sx76x/sx76x.c
 109 @@ -0,0 +1,65 @@
 110 +/*
 111 + * Copyright (C) 2011 Luka Perkov <luka@openwrt.org>
 112 + *
 113 + * SPDX-License-Identifier:    GPL-2.0+
 114 + */
 115 +
 116 +#include <common.h>
 117 +#include <switch.h>
 118 +#include <asm/gpio.h>
 119 +#include <asm/lantiq/eth.h>
 120 +#include <asm/lantiq/reset.h>
 121 +#include <asm/lantiq/chipid.h>
 122 +
 123 +static void gpio_init(void)
 124 +{
 125 +       /* Activate reset line of ADM6996I switch */
 126 +       gpio_direction_output(19, 0);
 127 +}
 128 +
 129 +int board_early_init_f(void)
 130 +{
 131 +       gpio_init();
 132 +
 133 +       return 0;
 134 +}
 135 +
 136 +int checkboard(void)
 137 +{
 138 +       puts("Board: " CONFIG_BOARD_NAME "\n");
 139 +       ltq_chip_print_info();
 140 +
 141 +       return 0;
 142 +}
 143 +
 144 +static const struct ltq_eth_port_config eth_port_config[] = {
 145 +       /* MAC0: Lantiq ADM6996I switch */
 146 +       { 0, 0x0, LTQ_ETH_PORT_SWITCH, PHY_INTERFACE_MODE_RMII },
 147 +};
 148 +
 149 +static const struct ltq_eth_board_config eth_board_config = {
 150 +       .ports = eth_port_config,
 151 +       .num_ports = ARRAY_SIZE(eth_port_config),
 152 +};
 153 +
 154 +int board_eth_init(bd_t *bis)
 155 +{
 156 +       return ltq_eth_initialize(&eth_board_config);
 157 +}
 158 +
 159 +static struct switch_device adm6996i_dev = {
 160 +       .name = "adm6996i",
 161 +       .cpu_port = 5,
 162 +       .port_mask = 0xF,
 163 +};
 164 +
 165 +int board_switch_init(void)
 166 +{
 167 +       /* Deactivate reset line of ADM6996I switch */
 168 +       gpio_set_value(19, 1);
 169 +
 170 +       /* ADM6996I needs some time to come out of reset */
 171 +       __udelay(50000);
 172 +
 173 +       return switch_device_register(&adm6996i_dev);
 174 +}
 175 --- a/boards.cfg
 176 +++ b/boards.cfg
 177 @@ -510,6 +510,8 @@ Active  mips        mips32         danub
 178  Active  mips        mips32         danube      arcadyan        arv7518pw           arv7518pw_ram                        arv7518pw:SYS_BOOT_RAM                                                                                                            Luka Perkov <luka@openwrt.org>
 179  Active  mips        mips32         danube      audiocodes      acmp252             acmp252_nor                          acmp252:SYS_BOOT_NOR                                                                                                              Daniel Golle <daniel.golle@gmail.com>
 180  Active  mips        mips32         danube      audiocodes      acmp252             acmp252_ram                          acmp252:SYS_BOOT_RAM                                                                                                              Daniel Golle <daniel.golle@gmail.com>
 181 +Active  mips        mips32         danube      gigaset         sx76x               gigasx76x_nor                        sx76x:SYS_BOOT_NOR                                                                                                                Luka Perkov <luka@openwrt.org>
 182 +Active  mips        mips32         danube      gigaset         sx76x               gigasx76x_ram                        sx76x:SYS_BOOT_RAM                                                                                                                Luka Perkov <luka@openwrt.org>
 183  Active  mips        mips32         danube      lantiq          easy50712           easy50712_nor                        easy50712:SYS_BOOT_NOR                                                                                                            Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
 184  Active  mips        mips32         danube      lantiq          easy50712           easy50712_norspl                     easy50712:SYS_BOOT_NORSPL                                                                                                         Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
 185  Active  mips        mips32         danube      lantiq          easy50712           easy50712_ram                        easy50712:SYS_BOOT_RAM                                                                                                            Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
 186 --- /dev/null
 187 +++ b/include/configs/sx76x.h
 188 @@ -0,0 +1,59 @@
 189 +/*
 190 + * Copyright (C) 2011-2013 Luka Perkov <luka@openwrt.org>
 191 + *
 192 + * SPDX-License-Identifier:    GPL-2.0+
 193 + */
 194 +
 195 +#ifndef __CONFIG_H
 196 +#define __CONFIG_H
 197 +
 198 +#define CONFIG_MACH_TYPE       "GIGASX76X"
 199 +#define CONFIG_IDENT_STRING    " "CONFIG_MACH_TYPE
 200 +#define CONFIG_BOARD_NAME      "Gigaset sx76x"
 201 +
 202 +/* Configure SoC */
 203 +#define CONFIG_LTQ_SUPPORT_UART                /* Enable ASC and UART */
 204 +
 205 +#define CONFIG_LTQ_SUPPORT_ETHERNET    /* Enable ethernet */
 206 +
 207 +#define CONFIG_LTQ_SUPPORT_NOR_FLASH   /* Have a parallel NOR flash */
 208 +
 209 +/* Switch devices */
 210 +#define CONFIG_SWITCH_MULTI
 211 +#define CONFIG_SWITCH_ADM6996I
 212 +
 213 +/* Environment */
 214 +#if defined(CONFIG_SYS_BOOT_NOR)
 215 +#define CONFIG_ENV_IS_IN_FLASH
 216 +#define CONFIG_ENV_OVERWRITE
 217 +#define CONFIG_ENV_OFFSET              (256 * 1024)
 218 +#define CONFIG_ENV_SECT_SIZE           (64 * 1024)
 219 +#else
 220 +#define CONFIG_ENV_IS_NOWHERE
 221 +#endif
 222 +
 223 +#define CONFIG_ENV_SIZE                        (8 * 1024)
 224 +#define CONFIG_LOADADDR                        CONFIG_SYS_LOAD_ADDR
 225 +
 226 +/* Console */
 227 +#define CONFIG_LTQ_ADVANCED_CONSOLE
 228 +#define CONFIG_BAUDRATE                        115200
 229 +#define CONFIG_CONSOLE_ASC             1
 230 +#define CONFIG_CONSOLE_DEV             "ttyLTQ1"
 231 +
 232 +/* Pull in default board configs for Lantiq XWAY Danube */
 233 +#include <asm/lantiq/config.h>
 234 +#include <asm/arch/config.h>
 235 +
 236 +/* Pull in default OpenWrt configs for Lantiq SoC */
 237 +#include "openwrt-lantiq-common.h"
 238 +
 239 +#define CONFIG_ENV_UPDATE_UBOOT_NOR            \
 240 +       "update-uboot-nor=run load-uboot-nor write-uboot-nor\0"
 241 +
 242 +#define CONFIG_EXTRA_ENV_SETTINGS      \
 243 +       CONFIG_ENV_LANTIQ_DEFAULTS      \
 244 +       CONFIG_ENV_UPDATE_UBOOT_NOR     \
 245 +       "kernel_addr=0xB0040000\0"
 246 +
 247 +#endif /* __CONFIG_H */