package/boot/uboot-lantiq/patches/0115-MIPS-add-board-support-for-Arcadyan-ARV7506PW11.patch

   1 --- /dev/null
   2 +++ b/board/arcadyan/arv7506pw11/Makefile
   3 @@ -0,0 +1,27 @@
   4 +#
   5 +# Copyright (C) 2000-2011 Wolfgang Denk, DENX Software Engineering, wd@denx.de
   6 +#
   7 +# SPDX-License-Identifier:     GPL-2.0+
   8 +#
   9 +
  10 +include $(TOPDIR)/config.mk
  11 +
  12 +LIB    = $(obj)lib$(BOARD).o
  13 +
  14 +COBJS  = $(BOARD).o
  15 +
  16 +SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
  17 +OBJS   := $(addprefix $(obj),$(COBJS))
  18 +SOBJS  := $(addprefix $(obj),$(SOBJS))
  19 +
  20 +$(LIB):        $(obj).depend $(OBJS) $(SOBJS)
  21 +       $(call cmd_link_o_target, $(OBJS) $(SOBJS))
  22 +
  23 +#########################################################################
  24 +
  25 +# defines $(obj).depend target
  26 +include $(SRCTREE)/rules.mk
  27 +
  28 +sinclude $(obj).depend
  29 +
  30 +#########################################################################
  31 --- /dev/null
  32 +++ b/board/arcadyan/arv7506pw11/arv7506pw11.c
  33 @@ -0,0 +1,97 @@
  34 +/*
  35 + * Copyright (C) 2016 Mathias Kresin <dev@kresin.me>
  36 + *
  37 + * SPDX-License-Identifier:    GPL-2.0+
  38 + */
  39 +
  40 +#include <common.h>
  41 +#include <switch.h>
  42 +#include <asm/gpio.h>
  43 +#include <asm/lantiq/eth.h>
  44 +#include <asm/lantiq/reset.h>
  45 +#include <asm/lantiq/chipid.h>
  46 +
  47 +#if defined(CONFIG_SYS_BOOT_RAM)
  48 +#define do_gpio_init   1
  49 +#elif defined(CONFIG_SYS_BOOT_NOR)
  50 +#define do_gpio_init   1
  51 +#else
  52 +#define do_gpio_init   0
  53 +#endif
  54 +
  55 +#define GPIO_POWER_GREEN       3
  56 +#define GPIO_POWER_RED 6
  57 +#define GPIO_GPHY_RESET 19
  58 +
  59 +static void gpio_init(void)
  60 +{
  61 +       /* Reset switch to have him in a clean state on reboot */
  62 +       gpio_direction_output(GPIO_GPHY_RESET, 0);
  63 +       udelay(20);
  64 +       gpio_direction_output(GPIO_GPHY_RESET, 1);
  65 +
  66 +       /* Turn on the green power LED */
  67 +       gpio_direction_output(GPIO_POWER_GREEN, 0);
  68 +
  69 +       /* Turn off the red power LED */
  70 +       gpio_direction_output(GPIO_POWER_RED, 1);
  71 +}
  72 +
  73 +int board_early_init_f(void)
  74 +{
  75 +       if (do_gpio_init)
  76 +               gpio_init();
  77 +
  78 +       return 0;
  79 +}
  80 +
  81 +int checkboard(void)
  82 +{
  83 +       puts("Board: " CONFIG_BOARD_NAME "\n");
  84 +       ltq_chip_print_info();
  85 +
  86 +       return 0;
  87 +}
  88 +
  89 +void show_boot_progress(int arg)
  90 +{
  91 +       if (!do_gpio_init)
  92 +               return 0;
  93 +
  94 +       if (arg >= 0) {
  95 +               /* Success - turn off the red power LED and turn on the green power LED */
  96 +               gpio_set_value(GPIO_POWER_RED, 1);
  97 +               gpio_set_value(GPIO_POWER_GREEN, 0);
  98 +       } else {
  99 +               /* Failure - turn off green power LED and turn on red power LED */
 100 +               gpio_set_value(GPIO_POWER_GREEN, 1);
 101 +               gpio_set_value(GPIO_POWER_RED, 0);
 102 +       }
 103 +
 104 +       return 0;
 105 +}
 106 +
 107 +static const struct ltq_eth_port_config eth_port_config[] = {
 108 +       /* MAC0: Realtek rtl8306 switch */
 109 +       { 0, 0x0, LTQ_ETH_PORT_SWITCH, PHY_INTERFACE_MODE_RMII },
 110 +};
 111 +
 112 +static const struct ltq_eth_board_config eth_board_config = {
 113 +       .ports = eth_port_config,
 114 +       .num_ports = ARRAY_SIZE(eth_port_config),
 115 +};
 116 +
 117 +int board_eth_init(bd_t *bis)
 118 +{
 119 +       return ltq_eth_initialize(&eth_board_config);
 120 +}
 121 +static struct switch_device rtl8306_dev = {
 122 +       .name = "rtl8306",
 123 +       .cpu_port = 5,
 124 +       .port_mask = 0xF,
 125 +};
 126 +
 127 +int board_switch_init(void)
 128 +{
 129 +       return switch_device_register(&rtl8306_dev);
 130 +}
 131 --- /dev/null
 132 +++ b/board/arcadyan/arv7506pw11/config.mk
 133 @@ -0,0 +1,7 @@
 134 +#
 135 +# Copyright (C) 2011-2013 Daniel Schwierzeck, daniel.schwierzeck@gmail.com
 136 +#
 137 +# SPDX-License-Identifier:     GPL-2.0+
 138 +#
 139 +
 140 +PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(BOARDDIR)
 141 --- /dev/null
 142 +++ b/board/arcadyan/arv7506pw11/ddr_settings.h
 143 @@ -0,0 +1,55 @@
 144 +/*
 145 + * Copyright (C) 2011-2013 Luka Perkov <luka@openwrt.org>
 146 + *
 147 + * This file has been generated with lantiq_ram_extract_magic.awk script.
 148 + *
 149 + * SPDX-License-Identifier:    GPL-2.0+
 150 + */
 151 +
 152 +#define MC_DC00_VALUE  0x1B1B
 153 +#define MC_DC01_VALUE  0x0
 154 +#define MC_DC02_VALUE  0x0
 155 +#define MC_DC03_VALUE  0x0
 156 +#define MC_DC04_VALUE  0x0
 157 +#define MC_DC05_VALUE  0x200
 158 +#define MC_DC06_VALUE  0x605
 159 +#define MC_DC07_VALUE  0x303
 160 +#define MC_DC08_VALUE  0x102
 161 +#define MC_DC09_VALUE  0x70A
 162 +#define MC_DC10_VALUE  0x203
 163 +#define MC_DC11_VALUE  0xC02
 164 +#define MC_DC12_VALUE  0x1C8
 165 +#define MC_DC13_VALUE  0x1
 166 +#define MC_DC14_VALUE  0x0
 167 +#define MC_DC15_VALUE  0x142
 168 +#define MC_DC16_VALUE  0xC800
 169 +#define MC_DC17_VALUE  0xD
 170 +#define MC_DC18_VALUE  0x301
 171 +#define MC_DC19_VALUE  0x200
 172 +#define MC_DC20_VALUE  0xA03
 173 +#define MC_DC21_VALUE  0x1300
 174 +#define MC_DC22_VALUE  0x1313
 175 +#define MC_DC23_VALUE  0x0
 176 +#define MC_DC24_VALUE  0x68
 177 +#define MC_DC25_VALUE  0x0
 178 +#define MC_DC26_VALUE  0x0
 179 +#define MC_DC27_VALUE  0x0
 180 +#define MC_DC28_VALUE  0x510
 181 +#define MC_DC29_VALUE  0x4E20
 182 +#define MC_DC30_VALUE  0x8235
 183 +#define MC_DC31_VALUE  0x0
 184 +#define MC_DC32_VALUE  0x0
 185 +#define MC_DC33_VALUE  0x0
 186 +#define MC_DC34_VALUE  0x0
 187 +#define MC_DC35_VALUE  0x0
 188 +#define MC_DC36_VALUE  0x0
 189 +#define MC_DC37_VALUE  0x0
 190 +#define MC_DC38_VALUE  0x0
 191 +#define MC_DC39_VALUE  0x0
 192 +#define MC_DC40_VALUE  0x0
 193 +#define MC_DC41_VALUE  0x0
 194 +#define MC_DC42_VALUE  0x0
 195 +#define MC_DC43_VALUE  0x0
 196 +#define MC_DC44_VALUE  0x0
 197 +#define MC_DC45_VALUE  0x500
 198 +#define MC_DC46_VALUE  0x0
 199 --- a/boards.cfg
 200 +++ b/boards.cfg
 201 @@ -505,6 +505,9 @@ Active  mips        mips32         au1x0
 202  Active  mips        mips32         danube      arcadyan        arv4519pw           arv4519pw_brn                        arv4519pw:SYS_BOOT_BRN                                                                                                            Luka Perkov <luka@openwrt.org>
 203  Active  mips        mips32         danube      arcadyan        arv4519pw           arv4519pw_nor                        arv4519pw:SYS_BOOT_NOR                                                                                                            Luka Perkov <luka@openwrt.org>
 204  Active  mips        mips32         danube      arcadyan        arv4519pw           arv4519pw_ram                        arv4519pw:SYS_BOOT_RAM                                                                                                            Luka Perkov <luka@openwrt.org>
 205 +Active  mips        mips32         danube      arcadyan        arv7506pw11         arv7506pw11_brn                      arv7506pw11:SYS_BOOT_BRN                                                                                                          Mathias Kresin <dev@kresin.me>
 206 +Active  mips        mips32         danube      arcadyan        arv7506pw11         arv7506pw11_nor                      arv7506pw11:SYS_BOOT_NOR                                                                                                          Mathias Kresin <dev@kresin.me>
 207 +Active  mips        mips32         danube      arcadyan        arv7506pw11         arv7506pw11_ram                      arv7506pw11:SYS_BOOT_RAM                                                                                                          Mathias Kresin <dev@kresin.me>
 208  Active  mips        mips32         danube      arcadyan        arv7510pw           arv7510pw_brn                        arv7510pw:SYS_BOOT_BRN                                                                                                            Luka Perkov <luka@openwrt.org>
 209  Active  mips        mips32         danube      arcadyan        arv7510pw           arv7510pw_nor                        arv7510pw:SYS_BOOT_NOR                                                                                                            Luka Perkov <luka@openwrt.org>
 210  Active  mips        mips32         danube      arcadyan        arv7510pw           arv7510pw_ram                        arv7510pw:SYS_BOOT_RAM                                                                                                            Luka Perkov <luka@openwrt.org>
 211 --- /dev/null
 212 +++ b/include/configs/arv7506pw11.h
 213 @@ -0,0 +1,62 @@
 214 +/*
 215 + * Copyright (C) 2016 Mathias Kresin <dev@kresin.me>
 216 + *
 217 + * SPDX-License-Identifier:    GPL-2.0+
 218 + */
 219 +
 220 +#ifndef __CONFIG_H
 221 +#define __CONFIG_H
 222 +
 223 +#define CONFIG_MACH_TYPE       "ARV7506PW11"
 224 +#define CONFIG_IDENT_STRING    " "CONFIG_MACH_TYPE
 225 +#define CONFIG_BOARD_NAME      "Arcadyan ARV7506PW11"
 226 +
 227 +/* Configure SoC */
 228 +#define CONFIG_LTQ_SUPPORT_UART                /* Enable ASC and UART */
 229 +
 230 +#define CONFIG_LTQ_SUPPORT_ETHERNET    /* Enable ethernet */
 231 +
 232 +#define CONFIG_LTQ_SUPPORT_NOR_FLASH   /* Have a parallel NOR flash */
 233 +
 234 +/* Switch devices */
 235 +#define CONFIG_SWITCH_MULTI
 236 +#define CONFIG_SWITCH_RTL8306
 237 +
 238 +/* Environment */
 239 +#if defined(CONFIG_SYS_BOOT_BRN)
 240 +#define CONFIG_SYS_TEXT_BASE           0x80002000
 241 +#define CONFIG_SKIP_LOWLEVEL_INIT
 242 +#define CONFIG_SYS_DISABLE_CACHE
 243 +#define CONFIG_ENV_IS_NOWHERE
 244 +#define CONFIG_ENV_OVERWRITE 1
 245 +#elif defined(CONFIG_SYS_BOOT_NOR)
 246 +#define CONFIG_ENV_IS_IN_FLASH
 247 +#define CONFIG_ENV_OVERWRITE
 248 +#define CONFIG_ENV_OFFSET              (256 * 1024)
 249 +#define CONFIG_ENV_SECT_SIZE           (64 * 1024)
 250 +#else
 251 +#define CONFIG_ENV_IS_NOWHERE
 252 +#endif
 253 +
 254 +#define CONFIG_ENV_SIZE                        (64 * 1024)
 255 +
 256 +#define CONFIG_LOADADDR                        CONFIG_SYS_LOAD_ADDR
 257 +
 258 +/* Console */
 259 +#define CONFIG_LTQ_ADVANCED_CONSOLE
 260 +#define CONFIG_BAUDRATE                        115200
 261 +#define CONFIG_CONSOLE_ASC             1
 262 +#define CONFIG_CONSOLE_DEV             "ttyLTQ1"
 263 +
 264 +/* Pull in default board configs for Lantiq XWAY Danube */
 265 +#include <asm/lantiq/config.h>
 266 +#include <asm/arch/config.h>
 267 +
 268 +/* Pull in default OpenWrt configs for Lantiq SoC */
 269 +#include "openwrt-lantiq-common.h"
 270 +
 271 +#define CONFIG_EXTRA_ENV_SETTINGS      \
 272 +       CONFIG_ENV_LANTIQ_DEFAULTS      \
 273 +       "kernel_addr=0xB0050000\0"
 274 +
 275 +#endif /* __CONFIG_H */