package/boot/uboot-layerscape/patches/0029-armv8-ls1012a-Added-CSU-assignment-for-USB2.patch

   1 From 57700b94f9111578d0fc05bb8f273c0b29951572 Mon Sep 17 00:00:00 2001
   2 From: Rajesh Bhagat <rajesh.bhagat@nxp.com>
   3 Date: Wed, 11 May 2016 14:59:39 +0530
   4 Subject: [PATCH 29/93] armv8: ls1012a: Added CSU assignment for USB2
   5
   6 Access settings for USB2 IP is added through CSU register.
   7
   8 Added CSU ID for USB2, reg: CSL23_REG[8:0]
   9
  10 Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
  11 ---
  12  .../include/asm/arch-fsl-layerscape/ns_access.h    |    2 ++
  13  1 file changed, 2 insertions(+)
  14
  15 diff --git a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
  16 index d6642a7..2fd33e1 100644
  17 --- a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
  18 +++ b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
  19 @@ -38,6 +38,7 @@ enum csu_cslx_ind {
  20         CSU_CSLX_ESDHC,
  21         CSU_CSLX_IFC = 45,
  22         CSU_CSLX_I2C1,
  23 +       CSU_CSLX_USB_2,
  24         CSU_CSLX_I2C3 = 48,
  25         CSU_CSLX_I2C2,
  26         CSU_CSLX_DUART2 = 50,
  27 @@ -117,6 +118,7 @@ static struct csu_ns_dev ns_dev[] = {
  28          {CSU_CSLX_ESDHC, CSU_ALL_RW},
  29          {CSU_CSLX_IFC, CSU_ALL_RW},
  30          {CSU_CSLX_I2C1, CSU_ALL_RW},
  31 +        {CSU_CSLX_USB_2, CSU_ALL_RW},
  32          {CSU_CSLX_I2C3, CSU_ALL_RW},
  33          {CSU_CSLX_I2C2, CSU_ALL_RW},
  34          {CSU_CSLX_DUART2, CSU_ALL_RW},
  35 --
  36 1.7.9.5
  37