package/boot/uboot-layerscape/patches/0040-DNCPE-138-CSU-config-for-PFE.patch

   1 From 0bfcfaafa23af0e8c9ae9df3236831fcaaa597b8 Mon Sep 17 00:00:00 2001
   2 From: Anji J <anji.jagarlmudi@freescale.com>
   3 Date: Mon, 4 Apr 2016 15:07:47 +0530
   4 Subject: [PATCH 40/93] DNCPE-138 CSU config for PFE
   5
   6 Configure PFE for NS access.
   7
   8 Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>>
   9 Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
  10 ---
  11  .../include/asm/arch-fsl-layerscape/ns_access.h    |    2 ++
  12  1 file changed, 2 insertions(+)
  13
  14 diff --git a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
  15 index 2fd33e1..5250ac7 100644
  16 --- a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
  17 +++ b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
  18 @@ -25,6 +25,7 @@ enum csu_cslx_ind {
  19         CSU_CSLX_PCIE3_IO,
  20         CSU_CSLX_USB3 = 20,
  21         CSU_CSLX_USB2,
  22 +       CSU_CSLX_PFE = 23,
  23         CSU_CSLX_SERDES = 32,
  24         CSU_CSLX_QDMA,
  25         CSU_CSLX_LPUART2,
  26 @@ -105,6 +106,7 @@ static struct csu_ns_dev ns_dev[] = {
  27          {CSU_CSLX_PCIE3_IO, CSU_ALL_RW},
  28          {CSU_CSLX_USB3, CSU_ALL_RW},
  29          {CSU_CSLX_USB2, CSU_ALL_RW},
  30 +        {CSU_CSLX_PFE, CSU_ALL_RW},
  31          {CSU_CSLX_SERDES, CSU_ALL_RW},
  32          {CSU_CSLX_QDMA, CSU_ALL_RW},
  33          {CSU_CSLX_LPUART2, CSU_ALL_RW},
  34 --
  35 1.7.9.5
  36