32bef358f41455735ff4076dbb9726cae1d051bc
[openwrt/openwrt.git] / package / boot / uboot-mediatek / patches / 009-board-mediatek-Add-support-for-UniElec-U7623-board.patch
1 From d13abe5b2c5b85228bdd34584fcbd642f1883668 Mon Sep 17 00:00:00 2001
2 From: David Woodhouse <dwmw2@infradead.org>
3 Date: Sun, 12 Jul 2020 23:23:05 +0100
4 Subject: [PATCH 3/3] board: mediatek: Add support for UniElec U7623 board
5
6 This is an MT7623A-based board, very similar to the Banana Pi R2.
7
8 http://www.unielecinc.com/q/news/cn/p/product/detail.html?qd_guid=OjXwKCaRlN
9
10 Signed-off-by: David Woodhouse <dwmw2@infradead.org>
11 ---
12 arch/arm/dts/Makefile | 1 +
13 .../arm/dts/mt7623a-unielec-u7623-02-emmc.dts | 211 ++++++++++++++++++
14 configs/mt7623a_unielec_u7623_02_defconfig | 54 +++++
15 3 files changed, 266 insertions(+)
16 create mode 100644 arch/arm/dts/mt7623a-unielec-u7623-02-emmc.dts
17 create mode 100644 configs/mt7623a_unielec_u7623_02_defconfig
18
19 diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
20 index 89fa448818..a140b1c8d4 100644
21 --- a/arch/arm/dts/Makefile
22 +++ b/arch/arm/dts/Makefile
23 @@ -938,6 +938,7 @@ dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-common-proc-board.dtb \
24
25 dtb-$(CONFIG_ARCH_MEDIATEK) += \
26 mt7622-rfb.dtb \
27 + mt7623a-unielec-u7623-02-emmc.dtb \
28 mt7623n-bananapi-bpi-r2.dtb \
29 mt7629-rfb.dtb \
30 mt8512-bm1-emmc.dtb \
31 diff --git a/arch/arm/dts/mt7623a-unielec-u7623-02-emmc.dts b/arch/arm/dts/mt7623a-unielec-u7623-02-emmc.dts
32 new file mode 100644
33 index 0000000000..fdeec75b05
34 --- /dev/null
35 +++ b/arch/arm/dts/mt7623a-unielec-u7623-02-emmc.dts
36 @@ -0,0 +1,211 @@
37 +/*
38 + * Copyright (C) 2018 MediaTek Inc.
39 + * Author: Ryder Lee <ryder.lee@mediatek.com>
40 + *
41 + * SPDX-License-Identifier: (GPL-2.0 OR MIT)
42 + */
43 +
44 +/dts-v1/;
45 +#include "mt7623.dtsi"
46 +#include "mt7623-u-boot.dtsi"
47 +
48 +/ {
49 + model = "UniElec U7623-02 eMMC";
50 + compatible = "unielec,u7623-02-emmc", "mediatek,mt7623";
51 +
52 + memory@80000000 {
53 + device_type = "memory";
54 + reg = <0 0x80000000 0 0x20000000>;
55 + };
56 +
57 + chosen {
58 + stdout-path = &uart2;
59 + tick-timer = &timer0;
60 + };
61 +
62 + reg_1p8v: regulator-1p8v {
63 + compatible = "regulator-fixed";
64 + regulator-name = "fixed-1.8V";
65 + regulator-min-microvolt = <1800000>;
66 + regulator-max-microvolt = <1800000>;
67 + regulator-boot-on;
68 + regulator-always-on;
69 + };
70 +
71 + reg_3p3v: regulator-3p3v {
72 + compatible = "regulator-fixed";
73 + regulator-name = "fixed-3.3V";
74 + regulator-min-microvolt = <3300000>;
75 + regulator-max-microvolt = <3300000>;
76 + regulator-boot-on;
77 + regulator-always-on;
78 + };
79 +
80 + reg_5v: regulator-5v {
81 + compatible = "regulator-fixed";
82 + regulator-name = "fixed-5V";
83 + regulator-min-microvolt = <5000000>;
84 + regulator-max-microvolt = <5000000>;
85 + regulator-boot-on;
86 + regulator-always-on;
87 + };
88 +
89 + leds {
90 + compatible = "gpio-leds";
91 +
92 + led3 {
93 + label = "u7623-01:green:led3";
94 + gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
95 + default-state = "off";
96 + };
97 +
98 + led4 {
99 + label = "u7623-01:green:led4";
100 + gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
101 + default-state = "off";
102 + };
103 + };
104 +};
105 +
106 +&eth {
107 + status = "okay";
108 + mediatek,gmac-id = <0>;
109 + phy-mode = "rgmii";
110 + mediatek,switch = "mt7530";
111 + mediatek,mcm;
112 +
113 + fixed-link {
114 + speed = <1000>;
115 + full-duplex;
116 + };
117 +};
118 +
119 +&mmc0 {
120 + pinctrl-names = "default";
121 + pinctrl-0 = <&mmc0_pins_default>;
122 + status = "okay";
123 + bus-width = <8>;
124 + max-frequency = <50000000>;
125 + cap-mmc-highspeed;
126 + vmmc-supply = <&reg_3p3v>;
127 + vqmmc-supply = <&reg_1p8v>;
128 + non-removable;
129 +};
130 +
131 +&pinctrl {
132 + ephy_default: ephy_default {
133 + mux {
134 + function = "eth";
135 + groups = "mdc_mdio", "ephy";
136 + };
137 +
138 + conf {
139 + pins = "G2_TXEN", "G2_TXD0", "G2_TXD1", "G2_TXD2",
140 + "G2_TXD3", "G2_TXC", "G2_RXC", "G2_RXD0",
141 + "G2_RXD1", "G2_RXD2", "G2_RXD3", "G2_RXDV",
142 + "MDC", "MDIO";
143 + drive-strength = <12>;
144 + mediatek,tdsel = <5>;
145 + };
146 + };
147 +
148 + mmc0_pins_default: mmc0default {
149 + mux {
150 + function = "msdc";
151 + groups = "msdc0";
152 + };
153 +
154 + conf-cmd-data {
155 + pins = "MSDC0_CMD", "MSDC0_DAT0", "MSDC0_DAT1",
156 + "MSDC0_DAT2", "MSDC0_DAT3", "MSDC0_DAT4",
157 + "MSDC0_DAT5", "MSDC0_DAT6", "MSDC0_DAT7";
158 + input-enable;
159 + bias-pull-up;
160 + };
161 +
162 + conf-clk {
163 + pins = "MSDC0_CLK";
164 + bias-pull-down;
165 + };
166 +
167 + conf-rst {
168 + pins = "MSDC0_RSTB";
169 + bias-pull-up;
170 + };
171 + };
172 +
173 + pcie_default: pcie-default {
174 + mux {
175 + function = "pcie";
176 + groups = "pcie0_0_perst", "pcie1_0_perst";
177 + };
178 + };
179 +
180 + uart0_pins_a: uart0-default {
181 + mux {
182 + function = "uart";
183 + groups = "uart0_0_txd_rxd";
184 + };
185 + };
186 +
187 + uart1_pins_a: uart1-default {
188 + mux {
189 + function = "uart";
190 + groups = "uart1_0_txd_rxd";
191 + };
192 + };
193 +
194 + uart2_pins_a: uart2-default {
195 + mux {
196 + function = "uart";
197 + groups = "uart2_0_txd_rxd";
198 + };
199 + };
200 +
201 + uart2_pins_b: uart2-alt {
202 + mux {
203 + function = "uart";
204 + groups = "uart2_1_txd_rxd";
205 + };
206 + };
207 +};
208 +
209 +&pcie {
210 + pinctrl-names = "default";
211 + pinctrl-0 = <&pcie_default>;
212 + status = "okay";
213 +
214 + pcie@0,0 {
215 + status = "okay";
216 + };
217 +
218 + pcie@1,0 {
219 + status = "okay";
220 + };
221 +};
222 +
223 +&pcie0_phy {
224 + status = "okay";
225 +};
226 +
227 +&pcie1_phy {
228 + status = "okay";
229 +};
230 +
231 +&uart0 {
232 + pinctrl-names = "default";
233 + pinctrl-0 = <&uart0_pins_a>;
234 + status = "okay";
235 +};
236 +
237 +&uart1 {
238 + pinctrl-names = "default";
239 + pinctrl-0 = <&uart1_pins_a>;
240 + status = "okay";
241 +};
242 +
243 +&uart2 {
244 + pinctrl-names = "default";
245 + pinctrl-0 = <&uart2_pins_b>;
246 + status = "okay";
247 +};
248 diff --git a/configs/mt7623a_unielec_u7623_02_defconfig b/configs/mt7623a_unielec_u7623_02_defconfig
249 new file mode 100644
250 index 0000000000..72b5f31092
251 --- /dev/null
252 +++ b/configs/mt7623a_unielec_u7623_02_defconfig
253 @@ -0,0 +1,54 @@
254 +CONFIG_ARM=y
255 +CONFIG_SYS_THUMB_BUILD=y
256 +CONFIG_ARCH_MEDIATEK=y
257 +CONFIG_SYS_TEXT_BASE=0x81e00000
258 +CONFIG_SYS_MALLOC_F_LEN=0x4000
259 +CONFIG_ENV_SIZE=0x1000
260 +CONFIG_ENV_OFFSET=0x100000
261 +CONFIG_TARGET_MT7623=y
262 +CONFIG_NR_DRAM_BANKS=1
263 +CONFIG_DISTRO_DEFAULTS=y
264 +CONFIG_FIT=y
265 +CONFIG_FIT_VERBOSE=y
266 +CONFIG_BOOTDELAY=3
267 +CONFIG_SYS_CONSOLE_IS_IN_ENV=y
268 +CONFIG_DEFAULT_FDT_FILE="mt7623a-unielec-u7623-02-emmc.dtb"
269 +# CONFIG_DISPLAY_BOARDINFO is not set
270 +CONFIG_SYS_PROMPT="U-Boot> "
271 +CONFIG_CMD_BOOTMENU=y
272 +# CONFIG_CMD_ELF is not set
273 +# CONFIG_CMD_XIMG is not set
274 +CONFIG_CMD_GPIO=y
275 +CONFIG_CMD_GPT=y
276 +CONFIG_CMD_MMC=y
277 +CONFIG_CMD_READ=y
278 +# CONFIG_CMD_SETEXPR is not set
279 +# CONFIG_CMD_NFS is not set
280 +CONFIG_DEFAULT_DEVICE_TREE="mt7623a-unielec-u7623-02-emmc"
281 +CONFIG_ENV_IS_IN_MMC=y
282 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
283 +CONFIG_NET_RANDOM_ETHADDR=y
284 +CONFIG_REGMAP=y
285 +CONFIG_SYSCON=y
286 +CONFIG_CLK=y
287 +CONFIG_DM_MMC=y
288 +# CONFIG_MMC_QUIRKS is not set
289 +CONFIG_SUPPORT_EMMC_BOOT=y
290 +CONFIG_MMC_HS400_SUPPORT=y
291 +CONFIG_MMC_MTK=y
292 +CONFIG_PHY_FIXED=y
293 +CONFIG_DM_ETH=y
294 +CONFIG_MEDIATEK_ETH=y
295 +CONFIG_PINCTRL=y
296 +CONFIG_PINCONF=y
297 +CONFIG_PINCTRL_MT7623=y
298 +CONFIG_POWER_DOMAIN=y
299 +CONFIG_MTK_POWER_DOMAIN=y
300 +CONFIG_DM_SERIAL=y
301 +CONFIG_MTK_SERIAL=y
302 +CONFIG_SYSRESET=y
303 +CONFIG_SYSRESET_WATCHDOG=y
304 +CONFIG_TIMER=y
305 +CONFIG_MTK_TIMER=y
306 +CONFIG_WDT_MTK=y
307 +CONFIG_LZMA=y
308 --
309 2.26.2
310